0% found this document useful (0 votes)
10 views27 pages

07GPIO

Class slides for a class of mine Class slides for a class of minr Class slides for a class of minr

Uploaded by

ftmarsy123
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
10 views27 pages

07GPIO

Class slides for a class of mine Class slides for a class of minr Class slides for a class of minr

Uploaded by

ftmarsy123
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 27

Microprocessor Systems

General Purpose I/O

1
Overview
n How do we make a program light up LEDs in
response to a switch?
n GPIO
n Basic Concepts
n Port Circuitry
n Control Registers
n Accessing Hardware Registers in C
n Clocking and Muxing
n Circuit Interfacing
n Inputs
n Outputs
n Additional Port Configuration
Basic Concepts

n Goal: light either LED1 or LED2 based on switch SW1 position


n GPIO = General-purpose input and output (digital)
n Input: program can determine if input signal is a 1 or a 0
n Output: program can set output to 1 or 0
n Can use this to interface with external devices
n Input: switch
n Output: LEDs
KL25Z GPIO Ports

n Port A (PTA) through


Port E (PTE)

n Not all port bits are


available

n Quantity depends on
package pin count
GPIO Port Bit Circuitry in MCU

n Control Data Bus


bit n
Address
Bus

n Direction Address
Decoder
n MUX PDDR select

n Data Port Data

Output (different
D Direction Q
n Register

ways to access it) PDOR select

n Input PSOR select


PCOR select
Set
Rst Port Data
PTOR select Pin or
Tgl Output
Pad on
D Register Q package

I/O Clock
PDIR select
Port Data Pin Control
D Input Q Register
Register MUX field
Control Registers

n One set of control registers per port


n Each bit in a control register corresponds to a port bit
PDDR: Port Data Direction
Data Bus Address
bit n Bus

n Each bit can be Address


Decoder

configured PDDR select

differently
Port Data

n Input: 0 D Direction
Register
Q

n Output: 1 PDOR select

n Reset clears port PSOR select


PCOR select
Set

bit direction to 0
Rst Port Data
PTOR select Pin or
Tgl Output
Pad on
D Register Q package

I/O Clock
PDIR select
Port Data Pin Control
D Input Q Register
Register MUX field
Writing Output Port Data
Data Bus Address

n Direct: write value to bit n Bus

PDOR Address
Decoder

PDDR select

n Toggle: write 1 to Port Data


PTOR D Direction
Register
Q

PDOR select

n Clear (to 0): Write 1 PSOR select


PCOR select
Set

to PCOR PTOR select


Rst Port Data
Tgl Output
Pin or
Pad on
D Register Q package

n Set (to 1): write 1 to I/O Clock


PSOR PDIR select
Port Data Pin Control
D Input Q Register
Register MUX field
Reading Input Port Data
Data Bus Address
bit n Bus
n Read from PDIR
Address
Decoder

n Corresponding bit PDDR select

holds value which Port Data

was read D Direction


Register
Q

PDOR select

PSOR select
Set
PCOR select
Rst Port Data
PTOR select Pin or
Tgl Output
Pad on
D Register Q package

I/O Clock
PDIR select
Port Data Pin Control
D Input Q Register
Register MUX field
Pseudocode for Program
// Make PTA1 and PTA2 outputs
set bits 1 and 2 of GPIOA_PDDR
// Make PTA5 input
clear bit 5 of GPIOA_PDDR
// Initialize the output data values: LED 1 off, LED 2 on
clear bit 1, set bit 2 of GPIOA_PDOR

// read switch, light LED accordingly


do forever {
if bit 5 of GPIOA_PDIR is 1 {
// switch is not pressed, then light LED 2
set bit 2 of GPIOA_PDOR
clear bit 1 of GPIO_PDOR
} else {
// switch is pressed, so light LED 1
set bit 1 of GPIOA_PDOR
clear bit 2 of GPIO_PDOR
}
}
CMSIS - Accessing Hardware Registers in C
n Header file MKL25Z4.h defines C data structure types to
represent hardware registers in MCU with CMSIS-Core
hardware abstraction layer

/** GPIO - Register Layout Typedef */


typedef struct {
__IO uint32_t PDOR; /**< Port Data Output Register, offset: 0x0 */
__O uint32_t PSOR; /**< Port Set Output Register, offset: 0x4 */
__O uint32_t PCOR; /**< Port Clear Output Register, offset: 0x8 */
__O uint32_t PTOR; /**< Port Toggle Output Register, offset: 0xC */
__I uint32_t PDIR; /**< Port Data Input Register, offset: 0x10 */
__IO uint32_t PDDR; /**< Port Data Direction Register, offset: 0x14 */
} GPIO_Type;
Accessing Hardware Registers in C (2)
n Header file MKL25Z4.h declares pointers to the
registers

/* GPIO - Peripheral instance base addresses */


/** Peripheral PTA base address */
#define PTA_BASE (0x400FF000u)

/** Peripheral PTA base pointer */


#define PTA ((GPIO_Type *)PTA_BASE)

PTA->PDOR = …
Coding Style and Bit Access
n Easy to make mistakes dealing with literal binary and
hexadecimal values
n To set bits 13 and 19, use “0000 0000 0000 1000 0010 0000 0000 0000”
or “0x00082000”

n Make the literal value from shifted bit positions


n = (1UL << 19) | (1UL << 13);
n Define names for bit positions
#define GREEN_LED_POS (19)
#define YELLOW_LED_POS (13)
n = (1UL << GREEN_LED_POS) | (1UL << YELLOW_LED_POS);
n Create macro to do shifting to create mask
#define MASK(x) (1UL << (x))
n = MASK(GREEN_LED_POS) | MASK(YELLOW_LED_POS);
Using Masks
n Overwrite existing value in n with mask
n = MASK(foo);

n Set in n all the bits which are one in mask, leaving others
unchanged
n |= MASK(foo);

n Complement the bit value of the mask


~MASK(foo);

n Clear in n all the bits which are zero in mask, leaving others unchanged
n &= MASK(foo);
C Code
#define LED1_POS (1)
#define LED2_POS (2)
#define SW1_POS (5)
#define MASK(x) (1UL << (x))

PTA->PDDR |= MASK(LED1_POS) | MASK (LED2_POS); // set LED bits to


outputs
PTA->PDDR &= ~MASK(SW1_POS); // clear Switch bit to input

PTA->PDOR = MASK(LED1_POS); // turn on LED1, turn off LED2

while (1) {
if (PTA->PDIR & MASK(SW1_POS)) {
// switch is not pressed, then light LED 2
PTA->PDOR = MASK(LED2_POS);
} else {
// switch is pressed, so light LED 1
PTA->PDOR = MASK(LED1_POS);
}
}
Clocking Logic
Bit Port
13 PORTE
12 PORTD
11 PORTC
10 PORTB
9 PORTA
n Need to enable clock to GPIO module
n By default, GPIO modules are disabled to save power
n Writing to an unclocked module triggers a hardware fault!
n Control register SIM_SCGC5 gates clocks to GPIO ports
n Enable clock to Port A
SIM->SCGC5 |= (1UL << 9);
n Header file MKL25Z4.h has definitions
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
Register
Freescale: is the pin
mux location in this
PDOR select diagram accurate?
Connecting a GPIO Signal to a Pin
PSOR select
Set
PCOR select
Rst Port Data
PTOR select Pin or
Tgl Output
Pad on
D Register Q package

I/O Clock
PDIR select
Port Data Pin Control
D Input Q Register
Register MUX field

n Multiplexer used to increase configurability - what should pin


be connected with internally?
n Each configurable pin has a Pin Control Register
Pin Control Register

MUX (bits Configuration


10-8)
000 Pin disabled (analog)
001 Alternative 1 – GPIO
n MUX field of PCR defines 010
011
Alternative 2
Alternative 3
connections 100 Alternative 4
101 Alternative 5
110 Alternative 6
111 Alternative 7
CMSIS C Support for PCR
n MKL25Z4.h defines PORT_Type structure with a PCR field
(array of 32 integers)

/** PORT - Register Layout Typedef */


typedef struct {
__IO uint32_t PCR[32]; /** Pin Control Register n,
array offset: 0x0, array step: 0x4 */
__O uint32_t GPCLR; /** Global Pin Control Low
Register, offset: 0x80 */
__O uint32_t GPCHR; /** Global Pin Control High
Register, offset: 0x84 */
uint8_t RESERVED_0[24];
__IO uint32_t ISFR; /** Interrupt Status Flag
Register, offset: 0xA0 */
} PORT_Type;
CMSIS C Support for PCR
n Header file defines pointers to PORT_Type registers

/* PORT - Peripheral instance base addresses */


/** Peripheral PORTA base address */
#define PORTA_BASE (0x40049000u)
/** Peripheral PORTA base pointer */
#define PORTA ((PORT_Type *)PORTA_BASE)

n Also defines macros and constants

#define PORT_PCR_MUX_MASK 0x700u


#define PORT_PCR_MUX_SHIFT 8
#define PORT_PCR_MUX(x) (((uint32_t)(((uint32_t)
(x))<<PORT_PCR_MUX_SHIFT)) &PORT_PCR_MUX_MASK)
Resulting C Code for Clock Control and Mux
// Enable Clock to Port A
SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;

// Make 3 pins GPIO


PORTA->PCR[LED1_POS] &= ~PORT_PCR_MUX_MASK;
PORTA->PCR[LED1_POS] |= PORT_PCR_MUX(1);
PORTA->PCR[LED2_POS] &= ~PORT_PCR_MUX_MASK;
PORTA->PCR[LED2_POS] |= PORT_PCR_MUX(1);
PORTA->PCR[SW1_POS] &= ~PORT_PCR_MUX_MASK;
PORTA->PCR[SW1_POS] |= PORT_PCR_MUX(1);
Inputs and Outputs, Ones and Zeros, Voltages and Currents

INTERFACING
Inputs: What’s a One? A Zero?
n Input signal’s value is
determined by voltage

n Input threshold voltages


depend on supply
voltage VDD

n Exceeding VDD or GND


may damage chip
Outputs: What’s a One? A Zero?
n Nominal output voltages
n 1: VDD-0.5 V to VDD
n 0: 0 to 0.5 V

n Note: Output voltage


depends on current drawn by
load on pin Logic 1 out
n Need to consider source-to-
drain resistance in the transistor
Above values only specified

Vout
n

when current < 5 mA (18 mA


for high-drive pads) and VDD >
2.7 V Logic 0 out

Iout
Output Example: Driving LEDs
n Need to limit current to a value which
is safe for both LED and MCU port
driver
n Use current-limiting resistor
n R = (VDD – VLED)/ILED
n Set ILED = 4 mA
n VLED depends on type of LED (mainly
color)
n Red: ~1.8V

n Blue: ~2.7 V

n Solve for R given VDD = ~3.0 V


n Red: 300 Ω
n Blue: 75 Ω
n Demonstration code in Basic Light
Switching Example
Output Example: Driving a Speaker
n Create a square wave with a
GPIO output
n Use capacitor to block DC value
n Use resistor to reduce volume if
needed
n Write to port toggle output
register (PTOR) to simplify code

void Beep(void) {
unsigned int period=20000;
while (1) {
PTC->PTOR = MASK(SPKR_POS);
Delay(period/2);
}
}
Additional Configuration in PCR

n Pull-up and pull-down resistors


n Used to ensure input signal voltage is pulled to correct value when
high-impedance
n PE: Pull Enable. 1 enables the pull resistor
n PS: Pull Select. 1 pulls up, 0 pulls down.
n High current drive strength
n DSE: Set to 1 to drive more current (e.g. 18 mA vs. 5 mA @ > 2.7 V,
or 6 mA vs. 1.5 mA @ <2.7 V)
n Available on some pins - MCU dependent

You might also like