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Assignment 02 (Nov 09, 2021)

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20 views2 pages

Assignment 02 (Nov 09, 2021)

assign

Uploaded by

Mudassir Rehman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Assignment No.

02
EE-352: ELECTRONICS
BSME 2019-23 (5TH SEMESTER)
(CLO 3)
Submission Date November 08, 2021

Note
 Copy is forbidden,
 Submit hand written assignment with complete name and Roll number.
 For any query, pl. contact [email protected]

1. Simplify the following Boolean functions, using four-variable maps:


a) F (w, x, y, z) = (1, 4, 5, 6, 12, 14, 15)
b) F (A, B, C, D) = (2, 3, 6, 7, 12, 13, 14)
c) (w, x, y, z) = (1, 3, 4, 5, 6, 7, 9, 11, 13, 15)
d) F (A, B, C, D) = (0, 2, 4, 5, 6, 7, 8, 10, 13, 15)
2. Simplify the following Boolean functions, using four-variable maps:
a. A`B`C`D` + AC`D` + B`CD` + A`BCD + BC`D
b. x`z + w`xy` + w(x`y + xy`)
c. A`B`C`D + AB`D + A`BC` + ABCD + AB`C
d. A`B`C`D` + BC`D + A`C`D + A`BCD + ACD`
3. Draw a NAND logic diagram that implements the complement of the following function:

F(A, B, C, D) = (0, 1, 2, 3, 6, 10, 11, 14)


4. Draw the multiple-level NAND circuit for the following expression:

W(x + y + z) + xyz

5. Obtain the simplified Boolean expressions for output F and G in terms of the input variables in
the circuit of Fig. below.
6. Draw the logic diagram of a 2-to-4-line decoder using
a) NOR gates only
b) NAND gates only. Include an enable input

7. Construct a 4-to-16-line decoder with five 2-to-4-line decoders with enable.


8. A combinational circuit is specified by the following three Boolean functions:

a) F1(A, B, C) = ∑(1, 4, 6)
b) F2(A, B, C) = ∑(3, 5)
c) F3(A, B, C) = ∑(2, 4,6,7)
Implement the circuit with a decoder constructed with NAND gates and NAND or AND gates
connected to the decoder outputs. Use a block diagram for the decoder. Minimize the number of
inputs in the external gates.

9. Implement a full adder with two 4 1 multiplexers

10. Implement the following Boolean function with a 4 1 multiplexer and external gates.
(a) F1 (A, B, C, D) = ∑(1, 3, 4, 11, 12, 13, 14, 15)
(b) F2 (A, B, C, D) = ∑(1, 2, 5, 7, 8, 10, 11, 13, 15)
Connect inputs A and B to the selection lines. The input requirements for the four data lines will
be a function of variables C and D. These values are obtained by expressing F as a function of C
and D for each of the four cases when AB 00, 01, 10, and 11. These functions may have to be
implemented with external gates.

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