Module Ii Adc
Module Ii Adc
OP-AMP(OPERATIONAL AMPLIFIER)
• It is a direct coupled high gain multistage amplifier to which feedback is added to control its
overall response.
• It is designed to perform mathematical operations like addition, subtraction , integration
and differentiation . Hence the name operational amplifier
OPAMP is basically a differential amp i.e., it will amplify the voltage which is differentially
present between its i/p terminals.
Input stage: The i/p stage is a dual i/p, balanced o/p differential amp. The 2 i/p are inverting
and non- inverting i/p terminals. This stage provides most of the voltage gain of the OP-AMP
and decides the value of i/p resistance RiRi.
Intermediate stage: This is usually another differential amp. The i/p stage drives the stage.
The stage is a dual –i/p unbalanced o/p differentiated amp.
Level- shifting stage: Due to direct coupling used between the 1st 2 stages, the i/p of level
shifting stage is an amplified signal with some non – zero dc level. Level shifting stage is
used to bring dc level to zero volts with respect to gnd.
Output stage: This stage is normally a complementary o/p stage. It increases the magnitude
of voltage and raises the current supplying capability of OP-AMP. It also ensures that the o/p
resistance of OPAMP is low.
SYMBOL OF OPAMP
TERMINALS
• Non Inverting input terminal(+):signal applied at the non inverting terminal after
amplification appears in phase with the input at the output.
• Output terminal
PARAMETERS OF OPAMP
• Input Resistance : Resistance between one of the input terminals and ground.(Practically
2MΩ).
• Slew Rate.The slew rate of an op amp or any amplifier circuit is the maximum rate of change
of closed loop amplifier output voltage caused by a step change on the input. It is measured
as a voltage change in a given time - typically V / µs or V / ms.
𝑑𝑉
SR= 𝑑𝑡𝑜
• Output offset voltage: Even when the voltage applied between the input terminals is zero,
there will be some output voltage as a result of the imbalance in the differential amplifier.
This voltage is called output offset voltage.
• Input Offset Voltage:It is the output voltage that must be applied between the input
terminals of an OP amp to nullify the output.
• Input Bias current:It is the average of input currents that flows to the inverting and non
inverting input terminals.
• Input offset Current.:When the ouput offset is nullified there occurs a difference in input
currents.The input offset current (Ios) is equal to the difference between the input bias
current at the non-inverting terminal (IB+) minus the input bias current at the inverting (IB- )
terminal of the amplifier.
• Bandwidth:The range of frequencies over which an amplifier will work properly is called
Band width.
• Gain Bandwidth product(GBW): GBW is a constant.
𝐴𝐶𝐿 𝑓2 = 𝑓𝑢𝑛𝑖𝑡𝑦
• CMRR(COMMON MODE REJECTION RATIO): CMRR is the ratio of Differential Mode gain to
𝐴
Common mode gain. Ie CMRR=(𝐴𝐷𝑀 )
𝐶𝑀
𝐴𝐷𝑀 Differential Mode Gain
𝐴𝐶𝑀 𝐶ommon Mode Gain
𝐴
CMRR db=20 log(𝐴𝐷𝑀 )
𝐶𝑀
Higher the value of CMRR better the OP-Amp
IDEAL AND PRACTICAL OPAMPS
IDEAL OPAMP PRACTICAL OPAMP
Infinite voltage gain, so that it can Voltage gain is not infinite, but typically
amplify input signals of any amplitude. 10^5 to 10^8, so it is not able to amplify
input signals smaller than 100 uV.
Infinite input resistance, so that almost Finite input resistance.
any signal source can drive it and there is
no loading of preceding stage.
Zero output resistance, so that output Output resistance is typically 75 ohm for
can drive an infinite number of other standard Op-Amps, so it has limit to deliver
devices. current to output devices.
Zero output voltage when input voltage It is not able to give zero at output when
is zero. input is zero, due to mismatching of input
transistors.
Infinite bandwidth, so that any frequency Finite band width, ie a range of frequencies
signal can be amplified without can only be amplified.
attenuation.
Infinite common-mode rejection ratio, Finite CMRR (90dB)
so that the output common-mode noise
voltage is zero.
Infinite slew rate, so that output voltage Slew rate is typically 0.5 to 90 V/uS so
changes occur simultaneously with input output cannot be change simultaneously
voltage changes. with input, there is some delay.
NOTE: At least study the points indicated as bold in the table.
APPLICATIONS OF OP-AMP
We know that an ideal opamp will provide infinite voltage gain. For real opamps also the gain will be
very high such that we can consider it as infinite for calculation purposes.
Gain Av=Vout/Vin
Where Vin=V1-V2
VIRTUAL GROUND
• it is virtual, not real ground. For some purposes we can consider it as equivalent to
ground.
• In opamps the term virtual ground means that the voltage at that particular node is
almost equal to ground voltage (0V) even though It is not physically connected to
ground.
• The input signal is applied to the inverting input of the Opamp through R1.
• Non inverting input terminal is connected to ground.
• The output voltage is fed back to the input(inverting terminal) through resistor Rf.
• The signal fed back is proportional to the output voltage.
• Phase inversion at the input terminal ensures that the feedback is negative.
DERIVATION
• Since the OPAMP does not draw any current (i=0) all the current flowing through R1 must flow
through Rf.
Ie I1=If
𝑉𝑖𝑛 − 𝑉2 𝑉2 − 𝑉𝑜
=
𝑅1 𝑅𝑓
But 𝑉1 = 𝑉2 = 0
𝑉𝑜 𝑅𝑓
=-
𝑉𝑖𝑛 𝑅1
The negative sign indicates a phase shift of 180 degree between Vin and Vo
NON INVERTING OP AMP
• In a Non inverting OP-AMP the input signal is applied to non inverting input terminal (V1)
• Inverting terminal is grounded so V2=0
• The output is feedback to the input via the feedback resistor Rf
• Let Vin=V1-V2 be the input voltage, A be the gain and R1 be the input resistance then
𝑉0 𝑅𝑓
𝐴= =1+
𝑉𝑖𝑛 𝑅1
SUMMING AMPLIFIER
• Figure shows an inverting summing amplifier with three inputs V1, V2 and V3 applied to the
inverting terminals through the resistors R1, R2 and R3.
• Rf is the feedback resistance.
• Voltage at the node A =0(As the non inverting terminal is grounded)
INTEGRATOR
i=𝑖𝐶
DIFFERENTIATOR
• It differentiates the input signal ie it gives an output voltage proportional to rate of change of
input voltage.
• It can provide a rectangular output from input ramp signal.
• The Differentiator circuit consists of an OP Amp, an input Capacitor C and feedback resistor R
• Point A is at virtual ground . Because of the virtual ground and infinite input impedance of
OPAMP all the input current ic flows through the feedback resistor R.
• 𝑖𝐶 = 𝑖𝑅
COMPARATOR
• When one input of the comparator is connected to ground, it is known as zero crossing
detector because the output changes when the input crosses 0V.
• When the input signal is positive going(crosses ‘0’ and goes in +ve direction), the output
is driven to positive maximum value(ie +Vsat)
• When the input is negative going,the output is driven to negative saturation(-Vsat)
LEVEL DETECTOR
A basic op-amp comparator circuit can be used to detect either a positive or a negative going input
voltage depending upon which input of the operational amplifier we connect the fixed reference
voltage source and the input voltage too.
• Also called non inverting comparator, detect when the input is greater than reference
voltage.
• The reference voltage is connected to the inverting input of the operational amplifier with
the input signal connected to the non-inverting input.
• When ViN> VREF ; output goes to +Vsat
• When ViN< VREF ; output goes to -Vsat ie here it is 0V.
• Also known as an inverting comparator circuit detects when the input signal, VIN is BELOW
or more negative than the reference voltage, VREF producing an output at VOUT which is
HIGH
• The reference voltage is connected to the non-inverting input of the operational amplifier
while the input signal is connected to the inverting input.
• Then when VIN is less than VREF the opamp comparators output will saturate towards the
positive supply rail, Vcc.
• A half wave rectifier is a rectifier that produces positive half cycles at the output for one half
cycle of the input and zero output for the other half cycle of the input.
• The working of the half wave rectifier circuit shown above is explained below
• For the positive half cycle of the sinusoidal input, the output of the op-amp will be negative.
Hence, diode D1 will be forward biased.
• When diode D1 is in forward bias, output voltage of the op-amp will be -0.7 V. So, diode
D2 will be reverse biased. Hence, the output voltage of the above circuit is zero volts.
• Therefore, there is no (zero) output of half wave rectifier for the positive half cycle of a
sinusoidal input.
• For the negative half cycle of sinusoidal input, the output of the op-amp will be positive.
Hence, the diodes D1 and D2 will be reverse biased and forward biased respectively. So, the
output voltage of above circuit will be −ve
• Therefore, the output of a half wave rectifier will be a positive half cycle for a negative half
cycle of the sinusoidal input.