CHAPTER 4: I/O

Q. Explain in detail Generic model of an I/O module

Generic Model of an I/O Module

An I/O module is an essential component in a computer system that

facilitates the exchange of data between the processor and peripheral
devices. The generic model of an I/O module consists of two major functions:
interface to the processor and memory via the system bus or central switch,
and interface to one or more peripheral devices through tailored data links.

The I/O module acts as a bridge between the processor and the external
environment, allowing for the transfer of control, status, and data between
the computer and peripheral devices. It provides a means for the processor
to communicate with external devices in a coordinated and efficient manner.

The module performs various functions, including control and timing,

processor communication, device communication, data buffering, and error
detection. It coordinates the flow of traffic between internal resources (such
as main memory and the system bus) and external devices, ensuring smooth
data transfer.

The I/O module communicates with the processor through command

decoding, accepting commands sent as signals on the control bus. It also
exchanges data with the processor over the data bus. The module may hide
the details of timing, formats, and electromechanics of external devices,
allowing the processor to interact with them through simple read and write
commands.

The complexity of an I/O module can vary, with some modules taking on
most of the detailed processing burden and presenting a high-level interface
to the processor (referred to as an I/O channel or I/O processor), while others
require detailed control and are referred to as I/O controllers or device
controllers. The module's design and capabilities depend on the specific
requirements of the system and the devices it controls.

Q. Classify and explain in detail about external devices

External Devices
External devices are devices that are connected to a computer to exchange data
with the external environment. External devices can be broadly classified into
three categories based on their purpose and functionality:

1. Human Readable Devices

These devices are designed for communicating with the computer user.
Examples of human-readable devices include video display terminals (VDTs)
and printers. They allow users to interact with the computer system by
displaying information or producing hard copies of data.

2. Machine Readable Devices

Machine-readable devices are used for communicating with equipment. They
are designed to exchange data with the computer system without human
intervention. Examples of machine-readable devices include magnetic disk
and tape systems, as well as sensors and actuators used in robotics
applications.

3. Communication Devices
Communication devices enable the computer system to exchange data with
remote devices. These devices can communicate with human-readable
devices, machine-readable devices, or even other computers. They facilitate
data transfer between the computer system and external devices over
communication lines.

Q. Explain in detail about I/O modules

I/O Modules: Overview and Functions

I/O modules play a crucial role in the input/output (I/O) operations of a

computer system. These modules serve as an interface between the
processor and memory on one side and the external devices on the other
side. They facilitate the exchange of data, control signals, and status
information between the computer and the external environment.

Major Functions of I/O Modules

The major functions or requirements of an I/O module can be categorized

into the following areas:

1. Control and Timing: I/O modules coordinate the flow of traffic between
the internal resources (such as main memory and the system bus) and
the external devices. They ensure that data transfer occurs in a
controlled and timely manner.
2. Processor Communication: I/O modules receive commands from the
processor and communicate with it via control and data buses. They
decode the commands and exchange data between the processor and
the module.
3. Device Communication: I/O modules establish communication with the
external devices. They send commands, receive status information,
and exchange data with the devices.
4. Data Buffering: I/O modules have data registers that buffer the data
being transferred between the processor and the external devices. This
buffering helps in managing the speed mismatch between the
processor/memory and the peripherals.
5. Error Detection: I/O modules are responsible for detecting and
reporting errors. They can detect mechanical and electrical
malfunctions reported by the devices, as well as unintentional changes
in the transmitted data.

Evolution of I/O Modules

I/O modules have evolved over time to handle increasing complexity and
improve system performance. They have transitioned from simple controllers
to more advanced processors capable of executing I/O programs. This
evolution has led to the development of I/O channels and I/O processors.

I/O channels are I/O modules that can execute programs and perform most
of the I/O tasks without CPU intervention. They allow the CPU to specify a
sequence of I/O activities and are particularly useful

Q. Explain the steps to control of the transfer of data from an external device
to the processor
Steps to Control the Transfer of Data from an External Device to the
Processor

1. Interrogation of Device Status: The processor first checks the

status of the attached external device by interrogating the I/O module.
This step ensures that the device is operational and ready to transmit
data.
2. Command Request: If the device is ready, the processor sends a
command to the I/O module, requesting the transfer of data. This
command is typically sent as signals on the control bus.
3. Data Retrieval: The I/O module then retrieves a unit of data (e.g., 8
or 16 bits) from the external device. This data is obtained according to
the specific protocol and interface of the device.
4. Data Transfer: The retrieved data is transferred from the I/O module
to the processor. This transfer can occur over the data bus, which is
the communication pathway between the processor and the I/O
module.
5.

Q. Explain in detail about Programmed I/O

Overview of Programmed I/O

1. Programmed I/O is one of the three techniques used for input/output

(I/O) operations. In this technique, data is exchanged between the
processor and the I/O module. The processor executes a program that
gives it direct control over the I/O operation. It includes sensing device
status, sending read or write commands, and transferring the data.
However, the processor must wait until the I/O operation is complete,
which can be wasteful of processor time if the processor is faster than
the I/O module.
2. I/O Commands
3. To execute an I/O-related instruction, the processor issues an address
that specifies the particular I/O module and external device, along with
an I/O command. There are four types of I/O commands that an I/O
module may receive: control, status, read, and write. The control
command is used to activate a peripheral and tell it what to do, while
the status command is used to check the status of the I/O module. The
read and write commands are used to transfer data between the I/O
module and the main memory.
4. I/O Instructions
5. With programmed I/O, there is a close correspondence between the
I/O-related instructions fetched by the processor from memory and the
I/O commands issued to the I/O module. The instructions are easily
 mapped into I/O commands, and there is often a simple one-to-one
relationship. The form of the instruction depends on how external
devices are addressed. Each I/O device connected through I/O modules
to the system is given a unique identifier or address. When the
processor issues an I/O command, the command contains the address
of the desired device. Each I/O module interprets the address lines to
determine if the command is for itself.

Q. EXPLAIN I/O COMMANDS

I/O Commands

I/O commands are used by the processor to communicate with I/O modules
and control peripheral devices. There are four types of I/O commands:
control, test, read, and write.

 Control commands are used to activate a peripheral device and

instruct it on what to do. For example, a magnetic-tape unit may be
instructed to rewind or move forward one record.
 Test commands are used to check the status conditions associated
with an I/O module and its peripherals. The processor can use test
commands to determine if a peripheral is powered on, available for
use, or if any errors occurred during the most recent I/O operation.
 Read commands cause the I/O module to obtain data from a
peripheral device and place it in an internal buffer. The processor can
then request the data from the I/O module and transfer it to the data
bus.
 Write commands cause the I/O module to take data from the data
bus and transmit it to the peripheral device.

Q. EXPLAIN IN DETAIL ABOUT Interrupt-Driven I/O

Interrupt-Driven I/O

Interrupt-driven I/O is an alternative to programmed I/O that allows the

processor to issue an I/O command to a module and then continue with other
tasks while waiting for the I/O module to be ready for data exchange. This
approach helps to improve system performance by reducing the waiting time
of the processor.

In interrupt-driven I/O, when the processor issues a READ command for

input, it goes on to perform other tasks. At the end of each instruction cycle,
the processor checks for interrupts. When an interrupt from the I/O module
occurs, the processor saves the context of the current program and
processes the interrupt. It reads the data from the I/O module and stores it in
memory before resuming the execution of the program it was working on.

Interrupt-driven I/O is more efficient than programmed I/O because it

eliminates unnecessary waiting. However, it still consumes a significant
amount of processor time as every data transfer between memory and the
I/O module must pass through the processor.

The occurrence of an interrupt triggers a sequence of events in both the

processor hardware and software. When an I/O device completes an
operation, it issues an interrupt signal to the processor. The processor
finishes executing the current instruction before responding to the interrupt.
It then acknowledges the interrupt and prepares to transfer control to the
interrupt routine. The processor saves the necessary information to resume
the current program and loads the program counter with the entry location
of the interrupt-handling program.

Interrupt-driven I/O allows the processor to execute other instructions while

an I/O operation is in progress. When the I/O module is ready to be serviced,
it sends an interrupt request signal to the processor. The processor suspends
the current program, branches off to the interrupt handler program for that
specific I/O device, and resumes the original execution after servicing the
device.

To identify devices for interrupt-driven I/O, various techniques are used,

including multiple interrupt lines, software poll, daisy chain, and bus
arbitration. These techniques help manage the interrupt signals between the
processor and the I/O modules efficiently.

Q. EXPLAIN IN DETAIL ABOUT Direct Memory Access

Direct Memory Access (DMA) is a mechanism that allows data to be

transferred between main memory and an I/O module without involving the
CPU. It is a form of I/O that improves efficiency by offloading data transfer
tasks from the CPU.

In DMA, a special module called a DMA module controls the exchange of data
between main memory and an I/O module. The CPU initiates the transfer by
sending a request to the DMA module, specifying the starting location in
memory, the number of words to be transferred, and the address of the I/O
device involved. The DMA module then transfers the entire block of data
directly to or from memory, without the involvement of the CPU.

Once the transfer is complete, the DMA module sends an interrupt signal to
the CPU. However, it is important to note that the CPU is only involved at the
beginning and end of the transfer, and it is not interrupted during the
transfer itself. This makes DMA more efficient than interrupt-driven or
programmed I/O for multiple-word data transfers.

DMA can be configured in different ways, such as sharing the same system
bus with other modules or using a separate I/O bus. The Intel 8237A DMA
controller is an example of a DMA controller that interfaces with processors
and DRAM memory to provide DMA capabilities.

Q. EXPLAIN IN DETAILS ABOUT I/O channels

I/O Channels

I/O channels are an extension of the DMA (Direct Memory Access) concept.
They have the ability to execute I/O instructions, which gives them complete
control over I/O operations. In a computer system with I/O channels, the CPU
does not execute I/O instructions. Instead, these instructions are stored in
main memory to be executed by a special-purpose processor in the I/O
channel itself. The CPU initiates an I/O transfer by instructing the I/O channel
to execute a program in memory. The program specifies the device or
devices, the area or areas of memory for storage, priority, and actions to be
taken for certain error conditions.

There are two types of I/O channels commonly used: selector channels and
multiplexor channels. A selector channel controls multiple high-speed
devices and is dedicated to the transfer of data with one of those devices at
any given time. On the other hand, a multiplexor channel can handle I/O with
multiple devices simultaneously. It can accept or transmit characters as fast
as possible to multiple devices, interleaving blocks of data from several high-
speed devices.

I/O channels serve as an interface between the CPU and I/O controllers. They
allow for efficient control of I/O operations, relieving the CPU of the details of
I/O operations and improving overall system performance.

Q. EXPLAIN IN DETAILS ABOUT I/O processors

I/O Processors

I/O processors are specialized modules that enhance the functionality of I/O
operations in a computer system. They have their own local memory and are
capable of executing I/O programs independently, without CPU intervention.
This allows the CPU to specify a sequence of I/O activities and be interrupted
only when the entire sequence has been performed.

With the introduction of I/O processors, a major change occurs in the

computer system architecture. The I/O module, which is enhanced to
become a processor, can control a large set of I/O devices with minimal CPU
involvement. This architecture is commonly used to control communication
with interactive terminals.

I/O processors relieve the CPU of I/O-related tasks, improving overall system
performance. They execute I/O instructions stored in main memory and have
complete control over I/O operations. The CPU initiates an I/O transfer by
instructing the I/O processor to execute a program in memory, specifying the
devices and memory areas involved.

Q. EXPLAIN IN DETAILS ABOUT: External interface - Firewire

External Interface - FireWire

FireWire is a high-speed external interface that provides a standardized way

for the host system to interact with peripheral devices over a serial bus. It is
designed to meet the I/O demands of personal computers, workstations, and
servers, offering advantages such as high speed, low cost, and ease of
implementation.

One of the key features of FireWire is its three-layer protocol stack. The
physical layer defines the permissible transmission media and the electrical
and signaling characteristics of each. The link layer describes the
transmission of data in packets, while the transaction layer defines a
request-response protocol that hides the lower-layer details from
applications.

FireWire uses a daisy-chain configuration, allowing up to 63 devices to be

connected off a single port. It also supports hot plugging, which means
peripherals can be connected and disconnected without powering down or
reconfiguring the system. Automatic configuration eliminates the need for
manual device ID settings or concerns about relative device positions.

The physical layer of FireWire specifies various transmission media and

connectors, with data rates ranging from 25 to 3200 Mbps. It also provides
an arbitration service to ensure that only one device transmits data at a
time. The arbitration can be based on a tree-structured arrangement of
nodes on the FireWire bus, with a root node acting as a central arbiter.

FireWire is widely used not only in computer systems but also in consumer
electronics products like digital cameras, DVD players/recorders, and
televisions. Its serial transmission approach offers advantages over parallel
interfaces, such as SCSI, by reducing the number of wires and simplifying
synchronization between them.

Q. EXPLAIN IN DETAIL ABOUT External interface - Infiniband

InfiniBand Architecture

InfiniBand is an interface that enables servers, remote storage, and other

network devices to be attached in a central fabric of switches and links. It
provides a switch-based architecture that can connect up to 64,000 servers,
storage systems, and networking devices. The key elements of the InfiniBand
architecture include the host channel adapter (HCA), target channel adapter
(TCA), InfiniBand switch, links, subnet, and router.

Host Channel Adapter (HCA)

The HCA is a single interface that links a server to an InfiniBand switch. It
attaches to the server at a memory controller, which has access to the
system bus and controls traffic between the processor and memory, as well
as between the HCA and memory. The HCA uses direct-memory access
(DMA) to read and write memory.

Target Channel Adapter (TCA)

A TCA is used to connect storage systems, routers, and other peripheral

devices to an InfiniBand switch. It allows these devices to communicate with
the switch and other devices in the network.

InfiniBand Switch

The InfiniBand switch provides point-to-point physical connections to various

devices and switches traffic from one link to another. Servers and devices
communicate through their adapters via the switch. The switch's intelligence
manages the linkage without interrupting the servers' operation.

Links and Subnets

A link refers to the connection between a switch and a channel adapter or

between two switches. A subnet consists of one or more interconnected
switches and the links that connect other devices to those switches. Subnets
allow administrators to confine broadcast and multicast transmissions within
the subnet.

Router

A router connects InfiniBand subnets or connects an InfiniBand switch to a

network, such as a local area network, wide area network, or storage area
network. It facilitates communication between different subnets or between
an InfiniBand network and other networks.

Q. EXPLAIN IN DETAILS ABOUT DMA CONTROLLER

DMA Controller

A DMA (Direct Memory Access) controller is a hardware device that allows

data to be transferred between peripheral devices and memory without the
involvement of the CPU. It provides a more efficient way of transferring data
compared to interrupt-driven or programmed I/O.

Functionality of DMA Controller

When a peripheral device, such as a disk controller, needs to transfer a block

of data to or from memory, it requests the service of the DMA controller by
pulling the DREQ (DMA request) line high. The DMA controller then signals
the CPU through its HOLD pin by putting a high on its HRQ (hold request)
line, indicating that it needs to use the buses.

The CPU finishes the current bus cycle and responds to the DMA request by
putting a high on its HDLA (hold acknowledge) line, allowing the DMA
controller to use the buses. The DMA controller then activates the DACK
(DMA acknowledge) line, indicating to the peripheral device that it can start
transferring the data.

The DMA controller transfers the data one word at a time directly to or from
memory, without involving the CPU. It decrements the counter and
increments the address pointer after each transfer until the count reaches
zero and the task is finished. Once the DMA controller completes its job, it
deactivates the HRQ line, signaling the CPU that it can regain control over
the buses.

Fly-By DMA Controller

The Intel 8237A DMA controller, which is a commonly used DMA controller, is
known as a fly-by DMA controller. This means that the data being moved
from one location to another does not pass through the DMA chip and is not
stored in the DMA chip. The DMA controller can only transfer data between
an I/O port and a memory address, not between two I/O ports or two memory
locations.

8237A DMA Controller

The Intel 8237A DMA controller interfaces with the 80x86 family of
processors and DRAM memory to provide DMA capabilities. It contains four
DMA channels that can be programmed independently, and any one of the
channels can be active at any moment.

The 8237A DMA controller has control/command registers that can be used
to program and control DMA operations. These registers include the
command register, which is used to control the operation of the DMA, and
the status register, which indicates the status of the DMA channels.