OUTLINE O FL LTO HU NEIVCERH SIT

DA M B I DO A PY T ER
C oET
DEP A R T M EN T O F EL EC T R IC A L A N D C O M P U T ER
EN G IN EER IN G

M IC R O C O M P U T ER A N D IN T ER F A C IN G
( EC EG 4 1 6 1 )

C H A P T ER T H R EE
Intel8 0 8 6 P R O C ESSO R P R O G R A M IN G & IN ST R U C T IO N SET S

BY MERSIBON M.
DaDU, CoET, Department Of Electrical And Computer Engineering 1
 IN T R O DU C T IO N
§ T h e 8 0 8 6 h asabout1 1 7 differentinstructionswith about3 0 0
opcodes.
§ T h e 8 0 8 6 instructionsetscancontainno operand, singl
e operand,
and two operand instructions.
§ T h e 8 0 8 6 instructionsdo notpermitmemory to memory operations
exceptforstringinstructionswh ich invol ve array operations.
§ T h e processorcanaccessmemory indifferentwaysth atare
col lectivel
y cal
led addressingmode.
§ T h e addressingmodesdescribe th e typesofoperandsand th e way
th ey are accessed forexecutinganinstruction.
§ T h e numberofaddressingmodesisdetermined wh enth e
microprocessorisdesigned and cannotbe ch anged.

DaDU, CoET, Department Of Electrical And Computer Engineering 2

 8 0 8 6 A DDR ESSIN G M O DES
§ T h e 8 0 8 6 providesatotalofsevendistinctaddressingmodes:
1 . R egisteraddressingmodes
2 . Immediate addressingmodes
3 . Directaddressingmodes
4 . R egisterindirectaddressingmodes
5 . B ased rel ative addressingmodes
6 . Indexed rel ative addressingmodes
7 . B ased indexed relative addressingmodes
§ M O V instructionsare used to expl
ainaddressingmodes.

DaDU, CoET, Department Of Electrical And Computer Engineering 3

 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
A ) R EG IST ER A DDR ESSIN G M O DE: M O V R EG 1 , R EG 2 ;
§ T h e registeraddressingmode invol
vesth e use ofregistersto h ol
d th e
datato be manipul ated.
§ M emory isnotaccessed wh enth isaddressingmode isexecuted;
§ R el
ativel
y fasttransfersince memory isnotaccessed.
§ Examples:
ü M O V B X , DX ; copy th e contentsofDX into B X
ü M O V ES, A X ; copy th e contentsofA X into ES
ü A DD A L , B H ; add th e contentsofB H to C ontentsofA L .
§ T h e siz e ofreg1 and reg2 mustbe th e same.
§ M O V C L , A X isil
legalforinstance.

DaDU, CoET, Department Of Electrical And Computer Engineering 4

 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
B ) IM M EDIA T E A DDR ESSIN G M O DE: - M O V R EG , C O N ST A N T
§ Inth e immediate addressingmode, th e source operand isaconstant.
§ Itcanbe used to l
oad info into any ofth e registersexceptth e segment
registersand fl
agregister.
§ Examples:
ü M OV A X, 2 5 5 0 H ; move 2 5 5 0 H into A X
ü M O V CX , 6 2 5 ; load th e decimalval ue 6 2 5 into C X
ü M O V BL , 4 0 H ; l
oad 4 0 H into B L
§ M O V DS, 0 1 2 3 H ; isil
legal
!
§ Instead we canuse:
M OV A X, 0 1 2 3 H
M O V DS, A X

DaDU, CoET, Department Of Electrical And Computer Engineering 5

 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
C ) DIR EC T A DDR ESSIN G M O DE: M O V reg, [constant] or
M O V [constant], reg
§ H ere constantisnotoperand butitisanoffsetorEA inmemory ofoperand.
§ Inth e directaddressingmode th e dataisinsome memory l ocation( s) and th e
addressofth e datainmemory comesimmediatel y afterth e instruction.
§ T h isaddressisth e offsetaddressand one cancal culate th e ph ysicaladdress
by sh iftingl
eftth e DS registerand addingitto th e offsetasfol l
ows:
§ Exampl
e:
ü M O V DL , [2 4 0 0 H ]; move contentsofDS: 2 4 0 0 H into DL
§ EX ER C ISE 3 - 1 : F ind th e ph ysicaladdressofth e memory l
ocationand its
contentsafterth e executionofth e fol lowing,
M OV A L, 9 9 H
M O V [3 5 1 8 H ], A L
A ssumingth atDS = 1 5 1 2 H .
DaDU, CoET, Department Of Electrical And Computer Engineering 6
 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
D) R EG IST ER IN DIR EC T A DDR ESSIN G M O DE:
M O V R EG 1 , [R EG 2 ] or M O V [R EG 2 ], R EG 1 ;
§ H ere th e addressofth e memory l
ocationwh ere th e operand residesis
h el
d by aregister, R EG 2 .
§ R EG 1 canbe any generalpurpose registerand R EG 2 canbe eith erof
SI, DI, orB X and th ey mustbe combined with DS inorderto
generate th e 2 0 - bitph ysicaladdress.
§ Exampl
e:
M OV A L , [B X ] ; move contentsofDS: B X into A L
M OV C L , [SI] ; move contentsofDS: SI into C L
M OV [DI], A H ; move contentsofA H into DS: DI
M OV DX , [B X ] ; move contentsofDS: B X into DL and
; contentsofDS: B X + 1 into DH
DaDU, CoET, Department Of Electrical And Computer Engineering 7
 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
§ Exercise: A ssume th atDS = 1 1 2 0 H , SI = 2 4 9 8 H , and A X = 1 7 F EH .
Sh ow th e contentsofmemory l ocationsand itscontentsafter th e
executionof M O V [SI], A X
§ Sol
ution:
ü T h e contentsofA X are moved into memory l ocationswith
l
ogicaladdressDS: SI and DS: SI + 1 ;
ü T h erefore, th e ph ysicaladdressstartsat:
PA = DS ( sh ifted l eft) + SI = 1 3 6 9 8 H .
§ A ccordingto th e l
ittl
e endianconvention,
ü l ow address1 3 6 9 8 H containsF EH , th e l
ow byte, and
ü h igh address1 3 6 9 9 H wil
lcontain1 7 H , th e h igh byte.

DaDU, CoET, Department Of Electrical And Computer Engineering 8

 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
E) B A SED R EL A T IV E A DDR ESSIN G M O DE:
M O V R EG 1 , [R EG 2 ]+ C O N ST or
M O V [R EG 2 ]+ C O N ST , R EG 1 ;
§ C O N ST isan8 - bitdispl
acementval
ue.
§ R EG 1 canbe any generalpurpose registerand R EG 2 canonl
y be
eith erofB P orB X
§ Inth e based relative addressingmode, base registersB X and B P, as
wel lasadispl acementval ue, are used to cal
cul
ate wh atiscal
led th e
effective address.
§ T h e defaultsegmentsused forth e cal
cul
ationofth e ph ysicaladdress
( PA ) are DS forB X and SS forB P.
ü P A = DS* 1 0 H + B X + const ; EA = B X + const
ü P A = SS* 1 0 H + B P + const ; EA = B P + const

DaDU, CoET, Department Of Electrical And Computer Engineering 9

 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
§ EX A M PL ES: Determine PA and EA
§ M O V C X , [B X ]+ 1 0 ; move DS: B X + 1 0 and DS: B X + 1 0 + 1 into C X .
ü PA = DS* 1 0 H + B X + 1 0 ,
ü EA = B X + 1 0
§ M O V A L , [B P]+ 5 ;
ü PA = SS* 1 0 H + B P + 5
ü EA = B P + 5
§ Al ternative codingsforM O V reg1 , [reg2 ]+ const is
ü M O V reg1 , [reg2 + const]or
ü M O V reg1 , const[reg2 ]
§ F orinstance, M O V C X , [B X ]+ 1 0 issame as
ü M O V C X , [B X + 1 0 ]or
ü M O V C X , 1 0 [B X ]

DaDU, CoET, Department Of Electrical And Computer Engineering 10

 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
F ) IN DEX ED R EL A T IV E A DDR ESSIN G M O DE:
M O V R EG 1 , [R EG 2 ]+ C O N ST O R
M O V [R EG 2 ]+ C O N ST , R EG 1 ;
§ T h e indexed relative addressingmode worksth e same asth e based
rel ative addressingmode, exceptth atregistersDI and SI h ol d th e
offsetaddress.
§ C onstisan8 - bitdispl acementval ue.
§ R EG 1 canbe any generalpurpose registerand R EG 2 canonl y be
eith erofDI orSI
§ PA = DS* 1 0 H + DI + const ; EA = DI + constor
§ PA = DS* 1 0 H + SI + const ; EA = SI + const
§ Exam pl es:
ü M O V DX , [SI]+ 5 ; PA = DS ( sh ifted l
eft) + SI + 5
ü M O V C L , [DI]+ 2 0 ; PA = DS ( sh ifted left) + DI + 2 0
DaDU, CoET, Department Of Electrical And Computer Engineering 11
 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
§ EX ER C ISE 3 - 3 : A ssume th atDS = 4 5 0 0 , SS = 2 0 0 0 , B X = 2 1 0 0 , SI =
1 4 8 6 , DI = 8 5 0 0 , B P = 7 8 1 4 , and A X = 2 5 1 2 . Sh ow th e exactph ysical
memory l ocationwh ere A X isstored ineach ofth e fol lowing. A l
lval ues
are inh ex.
a) M O V [B X ]+ 2 0 , A X
b) M O V [SI]+ 1 0 , A X
c) M O V [DI]+ 4 , A X
d) M O V [B P]+ 1 2 , A X
§ Sol
ution:
§ Ineach case PA = segmentregister( sh ifted l
eft) + offsetregister+
displ acement.
( a) DS: B X + 2 0 ;l
ocation4 7 1 2 0 = (1 2 ) and 4 7 1 2 1 = (2 5 )
( b) DS: SI+ 1 0 ;l
ocation4 6 4 9 6 = (1 2 ) and 4 6 4 9 7 = (2 5 )
( c) DS: DI+ 4 ;l
ocation4 D5 0 4 = (1 2 ) and 4 D5 0 5 = (2 5 )
( d) SS: B P+ 1 2 ;l
ocation2 7 8 2 6 = (1 2 ) and 2 7 8 2 7 = (2 5 )
DaDU, CoET, Department Of Electrical And Computer Engineering 12
 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
G ) B A SED IN DEX ED A DDR ESSIN G M O DE:
M O V R EG 1 , [R EG 2 ][R EG 3 ]+ C O N ST OR
M O V [R EG 2 ][R EG 3 ]+ C O N ST , R EG 1 ;
§ Inth ismode, one base registerand one indexregisterare used.
§ R EG 1 canbe any generalpurpose registerand R EG 2 canonl
y be eith erof
DI orSI and reg3 canonl y be eith erofB X orB P.
§ PA = DS* 1 0 H + B X + DI + const; EA = DI+ B X + constor
PA = SS* 1 0 H + B P+ SI+ constand EA = SI + B P+ const
§ EX A M PL ES:
§ M O V C L , [B X ][DI]+ 8 ; PA = DS ( sh ifted l
eft) + B X + DI + 8
§ M O V C H , [B X ][SI]+ 2 0 ; PA = DS ( sh ifted l
eft) + B X + SI + 2 0
§ M O V A H , [B P][SI]+ 2 9 ; PA = SS ( sh ifted l
eft) + B P + SI + 2 9
§ M O V A H , [B P][DI]+ 2 9 ; PA = SS ( sh ifted l
eft) + B P + DI + 2 9
§ N ote th at" M O V A X , [SI][DI]+ displ
acement" isil
legal
.
DaDU, CoET, Department Of Electrical And Computer Engineering 13
 8 0 8 6 A DDR ESSIN G M O DES ( C O N T . . )
EX A M P L E: A ssume th atth e registersh ave th e fol l
owingval ues( al lin
h ex) and th atC S = 1 0 0 0 , DS = 2 0 0 0 , SS = 3 0 0 0 , SI = 4 0 0 0 , DI = 5 0 0 0 ,
B X = 6 0 8 0 , B P = 7 0 0 0 , A X = 2 5 F F , C X = 8 7 9 1 , and DX = 1 2 9 9 .
C alculate th e ph ysicaladdressofth e memory wh ere th e operand is
stored and th e contentsofth e memory l ocationsineach ofth e fol l
owing
addressingexampl es.

DaDU, CoET, Department Of Electrical And Computer Engineering 14

 SU M M A R Y O F A DDR ESSIN G M O DES
§ T h e fol
lowingtable, summariz esth e possibl
e offset
registersforvarioussegments.

DaDU, CoET, Department Of Electrical And Computer Engineering 15

 SU M M A R Y O F A DDR ESSIN G M O DES
§ T able 3 - 2 summariz essampl e segmentoverrides.
§ A sseeninch aptertwo, th e Intel8 0 8 6 al l
owsth e program to
override th e defaul tsegmentand use any segmentregister.
§ T o do th at, specify th e segmentinth e code.

DaDU, CoET, Department Of Electrical And Computer Engineering 16

 SU M M A R Y O F A DDR ESSIN G M O DES
§ .

DaDU, CoET, Department Of Electrical And Computer Engineering 17

 IN T R O DU C T IO N T O A SSEM B L Y L A N G U A G E P R O G R A M M IN G
§ Program executioninany microprocessorsystem consistsoffetch ing
binary informationfrom memory and decodingth atinformationto
determine th e instructionrepresented.
§ F orusitismuch easierto rememberth e mnemonicSU B A X , A X th an
th e correspondingmach ine code 2 9 C 0 H .
§ F orth isreason, we write source fil
escontainingal
lth e instruction
mnemonicsneeded to execute aprogram.
§ T h e source fil
e isconverted into anobjectfile, containingth e actual
binary informationth e mach ine wil lunderstand, by aspecialprogram
cal led anassembl er.
§ A nA ssembl yl anguage program isaseriesofstatements, orl ines
wh ich is, eith erA ssem blylanguage instructions, orP seudo-
instruction cal l
ed directives.

DaDU, CoET, Department Of Electrical And Computer Engineering 18

 IN T R O DU C T IO N T O A SSEM B L Y L A N G U A G E P R O G R A M M IN G

§ Directives ( pseudo- instructions) give directionsto th e assembl

er
abouth ow itsh ould translate th e A ssembl
yl anguage instructionsinto
mach ine code.
§ A ssembl
ylanguage instructionsconsistoffourfiel
ds:
[l
abel
: ] m nem onic [operands] [; com m ent]
§ B racketsindicate th atth e fiel
d isoptional
, do nottype inth e brackets.
§ T h e commentfiel
d beginswith a" ; " and may be atth e end ofal
ine.
§ T h e assembl
erignorescomments.
§ C ommentsare optional , buth igh l
y recommended to make iteasierto
read and understand th e program.

DaDU, CoET, Department Of Electrical And Computer Engineering 19

 DIR EC T IV ES A N D A SA M P L E P R O G R A M
§ Th el
abelfiel
d al
lowsth e program to referto al
ine ofcode by name.
§ Th el abelfiel d canbe any ch aracterand cannotexceed 3 1 ch aracters.
§ A l abelmustend with acol on wh enitrefersto an opcode and, end
with outcol onwh enitreferto directives.
§ T h e m nem onic( instruction) and operand fiel dstogeth er
accompl ish th e tasksforwh ich th e program waswritten.

§ T h e mnemonicopcodesare A DD and M O V , and " A L , B L " and

" A X , 6 7 6 4 " are th e operands.
§ Instead ofamnemonicand operand, th ese fiel dscoul
d contain
assembl erpseudo- instructions, or directives.
§ Directivesdo notgenerate mach ine code and are used onl
y by th e
assembl erasopposed to instructions.

DaDU, CoET, Department Of Electrical And Computer Engineering 20

 DIR EC T IV ES A N D A SA M P L E P R O G R A M
§ Exampl
esofdirectivesare DB , P R O C , EN D, and EN DP .

DaDU, CoET, Department Of Electrical And Computer Engineering 21

 M O DEL DEF IN IT IO N
§ A fterth e firsttwo commentsisth e M O DEL directive.
§ T h isdirective sel
ectsth e siz e ofth e m em ory m odel
.

DaDU, CoET, Department Of Electrical And Computer Engineering 22

 M EM O R Y M O DEL DEF IN IT IO N
§ A m ong th e options for th e m em ory m odelare SM A L L , M EDIU M ,
C O M P A C T , and L A R G E.

DaDU, CoET, Department Of Electrical And Computer Engineering 23

 SEG M EN T DEF IN IT IO N
§ Every line ofanA ssembl yl
anguage program must
correspond to one ofanx8 6 C PU segmentregister.
C S ( code segm ent) ; DS ( data segm ent) .
SS ( stack segm ent) ; ES ( extra segm ent) .
§ T h e simplified segmentdefinitionformatusesth ree simpl e
directives: " . C O DE" " . DA T A " " . ST A C K “ , wh ich
correspond to th e C S, DS, and SS registers.

DaDU, CoET, Department Of Electrical And Computer Engineering 24

 ST A C K SEG M EN T
§ T h isdirective reserves6 4 bytes ofmemory forth e stack:

DaDU, CoET, Department Of Electrical And Computer Engineering 25

 DA T A SEG M EN T
§ T h e datasegmentdefinesth ree dataitems: DA T A 1 , DA T A 2 , and
SU M .

DaDU, CoET, Department Of Electrical And Computer Engineering 26

 DA T A SEG M EN T
§ T h e DB directive isused by th e assembl
erto al
locate memory in
byte- siz ed ch unks.
§ Each isdefined asDB ( define byte) .
ü M emory canbe al located indifferentsiz es.
§ Data item s defined inth e datasegmentwil
lbe accessed inth e
code segmentby th eirl abel s.
§ DA T A 1 and DA T A 2 are giveninitialval
uesinth e datasection.
§ SU M isnotgivenaninitialval
ue, butstorage issetaside forit.

DaDU, CoET, Department Of Electrical And Computer Engineering 27

 C O DE SEG M EN T DEF IN IT IO N
§ T h e firstl
ine ofth e segmentafterth e . C O DE directive isth e P R O C
directive.

DaDU, CoET, Department Of Electrical And Computer Engineering 28

 C O DE SEG M EN T DEF IN IT IO N
§ A procedure isagroupofinstructionsdesigned to accompl
ish a
specificfunction.
§ A code segmentisorganiz ed into severalsmal
lproceduresto make
th e program more structured.
§ Every procedure musth ave aname defined by th e P R O C directive,
fol
lowed by th e assembl
ylanguage instructions, and cl osed by th e
EN DP directive.
§ T h e P R O C and EN DP statementsmusth ave th e same l
abel
.
§ T h e P R O C directive may h ave th e optionF A R orN EA R .
§ T h e O S requiresth e entry pointto th e userprogram to be aF A R
procedure.

DaDU, CoET, Department Of Electrical And Computer Engineering 29

 C O DE SEG M EN T DEF IN IT IO N
§ B efore th e O S passescontrolto th e program so itmay execute, it
assigns segm entregisters val ues.
§ W h enth e program beginsexecuting, onl
y C S and SS h ave th e
proper val ues.
§ DS ( and ES) val
ues are initial
iz ed by th e program .

DaDU, CoET, Department Of Electrical And Computer Engineering 30

 C O DE SEG M EN T DEF IN IT IO N
§ T h e program l oadsA L & B L with DA T A 1 & DA T A 2 , A DDsth em
togeth er, and storesth e resul
tinSU M .

DaDU, CoET, Department Of Electrical And Computer Engineering 31

 C O DE SEG M EN T DEF IN IT IO N
§ Th elastinstructions, " M O V A H , 4 C H " & " IN T 2 1 H “ return
controlto th e operating system .

DaDU, CoET, Department Of Electrical And Computer Engineering 32

 C O DE SEG M EN T DEF IN IT IO N
§ Th el
asttwo l inesend th e procedure & program , and T h e l
abelfor
EN DP ( M A IN ) match esth e l
abelforP R O C .

DaDU, CoET, Department Of Electrical And Computer Engineering 33

 C O DE SEG M EN T DEF IN IT IO N
§ Itish andy to keepasam pl
e sh el
l& fil
litinwith th e instructionsand
dataforyourprogram.

DaDU, CoET, Department Of Electrical And Computer Engineering 34

 A SSEM B L E, L IN K , A N D R U N A P R O G R A M
§ M A SM & L IN K are th e assem bl
er & l
inker programs.
§ M any editorsorword processorscanbe used to create and/ oreditth e
program, and produce anA SC II fil
e.
§ T h e stepsto create anexecutabl
e A ssembl
ylanguage program are as
fol l
ows:

DaDU, CoET, Department Of Electrical And Computer Engineering 35

 Introduction to A ssem bl
y L anguage P rogram m ing

DaDU, CoET, Department Of Electrical And Computer Engineering 36

 Introduction to A ssem bl
y L anguage P rogram m ing
§ T h e source fil e mustend in" . asm “ .
ü T h e " . asm " fil e isassembl ed by anassembl er, like M A SM .
ü T h e assembl erwil lproduce anobjectfil e and al istfil
e, al
ong
with oth erfil esusefulto th e programmer.
ü Th e" . l st" file, wh ich isoptional , isvery usefulto th e
programmerbecause itl istsallth e opcodesand offsetaddresses
aswel laserrorsth atM A SM detected.
ü M A SM assumesth atth e l istfile isnotwanted ( N U L . L ST
indicatesno l ist) .
ü T h e extensionforth e objectfil e mustbe " . obj" .
ü B efore feedingth e " . obj" fil e into L IN K , allsyntaxerrors
mustbe corrected.
ü T h isobjectfil e isinputto th e L IN K program, to produce th e
executabl e program th atendsin" . exe" .
ü T h e " . exe" fil e canbe run( executed) by th e microprocessor.
DaDU, CoET, Department Of Electrical And Computer Engineering 37
 A SSEM B L E, L IN K , A N D R U N A P R O G R A M
§ T h e fol
lowingfigure sh owsh ow anexecutabl
e program iscreated & runby
fol l
owingth e stepsoutl ined above.

DaDU, CoET, Department Of Electrical And Computer Engineering 38

 A SSEM B L E, L IN K , A N D R U N A P R O G R A M
§ T h e fol
lowingfigure sh owsh ow anexecutabl
e program iscreated & runby
fol l
owingth e stepsoutl ined above.
§ C ont… …

DaDU, CoET, Department Of Electrical And Computer Engineering 39

 A SSEM B L E, L IN K , A N D R U N A P R O G R A M
§ M A SM producesanoth eroptionalfile, th e crossreference, wh ich h asth e
extension" . crf" .
ü A nal ph abeticallistofal
lsymbol s& l abelsinth e program.
ü Al so program l ine numbersinwh ich th ey are referenced.
§ T h e assembl er( M A SM ) createsth e opcodes, operands& offsetaddresses
underth e " . obj" file.
§ T h e L IN K program producesth e ready- to- runprogram with th e " . exe"
( Executabl e) extension.
ü T h e L IN K program setsupth e fil e so itcanbe l oaded
by th e O S and executed.
ü T h e program canbe runatth e O S l evel , usingth e fol lowingcommand:
C > m yfil e
ü W h enth e program name istyped inatth e O S l evel , th e O S l
oadsth e
program inmemory.
ü R eferred to asmapping, wh ich meansth atth e program ismapped into
th e ph ysicalmemory ofth e PC .
DaDU, CoET, Department Of Electrical And Computer Engineering 40
 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ T h e 8 0 8 8 / 8 6 processorsupportsmany datatypes.
ü Datatypescanbe 8 - or1 6 - bit, positive ornegative.
ü A numberl essth an8 bitswide mustbe coded asan8 - bitregister
with th e h igh erdigitsasz ero.
ü A numberisl essth an1 6 bitswide mustuse al
l1 6 bits.
§ O R G isused to indicate th e beginningofth e offsetaddress.
ü T h e numberafterO R G canbe eith erinh exorindecimal .
ü Ifth e numberisnotfol lowed by H , itisdecimaland th e
assemblerwil lconvertitto h ex.

DaDU, CoET, Department Of Electrical And Computer Engineering 41

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DB Define B yte:
ü O ne ofth e mostwidel y used datadirectives, ital l
owsal location
ofmemory inbyte- siz ed ch unks.
ü T h isisth e smal
lestal locationunitpermitted.
ü DB candefine numbersindecimal , binary, h ex, & A SC II.
• D afterth e decimalnumberisoptional .
• B ( binary) and H ( h exadecimal ) isrequired.
• T o indicate A SC II, place th e stringinsingl e quotationmarks.
§ DB isth e only directive th atcanbe used to define A SC II strings
l
argerth antwo ch aracters.
ü Itsh oul d be used foral lA SC II datadefinitions.

DaDU, CoET, Department Of Electrical And Computer Engineering 42

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ Som e exam pl
es:

DaDU, CoET, Department Of Electrical And Computer Engineering 43

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ L istfil
e for DB exam pl
es

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 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DU P dupl
icate:
ü DU P willduplicate agivennumberofch aracters.
ü T wo meth odsoffillingsixmemory l
ocationswith F F H .

DaDU, CoET, Department Of Electrical And Computer Engineering 45

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ L istfil
e ofDU P exampl
e:

DaDU, CoET, Department Of Electrical And Computer Engineering 46

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DW Define W ord:
ü DW isused to al
locate memory 2 bytes( one word) atatime:

DaDU, CoET, Department Of Electrical And Computer Engineering 47

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DW Define W ord:
ü L istfil
e forDW exampl
es.

DaDU, CoET, Department Of Electrical And Computer Engineering 48

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ EQ U equate: EQ U associatesaconstantval ue with adatal abel.

ü W h enth e labelappearsinth e program, itsconstantval ue willbe
substituted forth e l
abel.
ü W h enEQ U isused forth e counterconstant: C O U N T EQ U 2 5 ,
and wh enexecutingth e instructions" M O V C X , C O U N T " , th e
registerC X wil lbe loaded with th e val ue 2 5 , itwillbe inth e
immediate addressingmode.
ü Incontrastto usingDB : C O U N T DB 2 5 , and wh enexecutingth e
same instruction" M O V C X , C O U N T " itwil lbe inth e direct
addressingmode.

DaDU, CoET, Department Of Electrical And Computer Engineering 49

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ EQ U canal
so be used inth e datasegment:

ü A ssume aconstant( afixed val ue) used inmany differentplaces

inth e dataand code segments.
ü B y use ofEQ U , one canch ange itonce and th e assembl
erwill
ch ange allofth em.

DaDU, CoET, Department Of Electrical And Computer Engineering 50

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DD define doubl eword:

ü T h e DD directive isused to all
ocate memory l ocationsth atare 4
bytes( two words) insiz e.
ü Dataisconverted to h ex& pl aced inmemory l ocations
ü L ow byte to low addressand h igh byte to h igh address.

ü L istfil
e forDD exampl
es.

DaDU, CoET, Department Of Electrical And Computer Engineering 51

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DQ define quadword:
ü DQ isused to allocate memory 8 bytes( fourwords) insiz e, to
representany variable upto 6 4 bitswide:

ü L istfil
e forDQ exampl
es.

DaDU, CoET, Department Of Electrical And Computer Engineering 52

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DT define ten bytes:

ü DT isused formemory al locationofpacked B C D numbers.
ü T h isdirective al l
ocates1 0 bytes.
ü T h e " H " afterth e dataisnotneeded.

DaDU, CoET, Department Of Electrical And Computer Engineering 53

 DA T A T Y P ES A N D DA T A DEF IN IT IO N

§ DT define ten bytes:

ü L istfil
e forDT exampl
es.

ü DT canalso be used to al
locate 1 0 - byte integersby usingth e " D"
option:

DaDU, CoET, Department Of Electrical And Computer Engineering 54

 F U L L SEG M EN T DEF IN IT IO N
§ SEG M EN T DEF IN IT IO N :
ü T h e SEG M EN T and EN DS directivesindicate th e beginning&
endingofasegment, inth isformat:

ü Th el abel, orname, mustfol low namingconventionsand be

unique.
ü T h e [options]fiel
d givesimportantinformationto th e assembl er
fororganiz ingth e segment, butisnotrequired.
ü T h e EN DS l abelmustbe th e same l abelasinth e SEG M EN T
directive.
ü Inful lsegmentdefinition, th e " . M O DEL " directive isnotused.

DaDU, CoET, Department Of Electrical And Computer Engineering 55

 F U L L SEG M EN T DEF IN IT IO N
§ T h e directives" . ST A C K " , " . DA T A " , and " . C O DE" are repl
aced by SEG M EN T
and EN DS directivesth atsurround each segment.
§ T h e fol
lowingF igure sh owsth e ful
lsegmentdefinitionand simpl
ified format, side
by side, and fol
lowed by programs.

DaDU, CoET, Department Of Electrical And Computer Engineering 56

 EX A M P L E O F F U L L SEG M EN T DEF IN IT IO N
§

DaDU, CoET, Department Of Electrical And Computer Engineering 57

 EX A M P L E O F F U L L SEG M EN T DEF IN IT IO N
§

DaDU, CoET, Department Of Electrical And Computer Engineering 58

 F U L L SEG M EN T DEF IN IT IO N
§ Stack Segm entDefinition:
ü T h e stack segmentsh owncontainsth e l ine " DB 6 4 DU P ( ? ) " to reserve 6 4
bytesofmemory forth e stack.
ü T h e fol l
owingth ree l inesinful lsegmentdefinitionare comparabl e to
" . ST A C K 6 4 " insimple definition:

§ Data Segm entDefinition

ü Inful lsegmentdefinition, th e SEG M EN T directive namesth e datasegment
and mustappearbefore th e data.
ü T h e EN DS segmentmarksth e end ofth e datasegment:

DaDU, CoET, Department Of Electrical And Computer Engineering 59

 F U L L SEG M EN T DEF IN IT IO N
§ C ode Segm entDefinition:
ü T h e code segmentalso beginsand endswith SEG M EN T and EN DS
directives:

§ Immediatel y afterPR O C , th e A SSU M E directive, associatessegmentswith specific

registers.
ü B y assumingth e segmentregisterisequalto th e segmentl abel
sused inth e
program.
ü Ifanextrasegmenth ad beenused, ES woul d also be incl
uded inth e A SSU M E
statement.
ü A SSU M E tel lsth e assembl erwh ich ofth e segments, defined by SEG M EN T ,
sh ould be used.
ü Al so h elpsth e assembl erto calculate th e offsetaddressesfrom th e beginning
ofth atsegment.
DaDU, CoET, Department Of Electrical And Computer Engineering 60
 F U L L SEG M EN T DEF IN IT IO N
§ In" M O V A L , [B X ]" th e B X registeristh e offsetofth e datasegment.
§ O ntransferofcontrolfrom O S to th e program, ofth e th ree segment
registers, onl
y C S and SS h ave th e properval
ues.
§ T h e DS val
ue ( and ES) mustbe initial
iz ed by th e program

DaDU, CoET, Department Of Electrical And Computer Engineering 61

 M O R E SA M P L E P R O G R A M S
§ Exam ple1 : W rite, run, and anal yz e aprogram th atadds5 bytesof
dataand savesth e resul t. T h e datash ould be th e fol
lowingh ex
numbers: 2 5 , 1 2 , 1 5 , 1 F , and 2 B .
§ Sol
ution:

DaDU, CoET, Department Of Electrical And Computer Engineering 62

; Program to add 5 bytes of data ; Load and add each byte
and save the result in memory MOV CX, 5 ; Counter for the 5 bytes
LEA SI, DATA ; Load effective address of
.MODEL SMALL the data into SI
.STACK 100H
.DATA ADD_LOOP:
; Define the 5 bytes of data LODSB ; Load a byte from DATA into
DATA DB 25H, 12H, 15H, 1FH, 2BH AL and increment SI
RESULT DW ? ; Memory location to ADD AX, AL ; Add the byte to the result in
store the result AX
LOOP ADD_LOOP ; Decrement CX and
.CODE repeat if not zero
MAIN PROC
MOV AX, @DATA ; Load the ; Store the result
MOV DS, AX MOV RESULT, AX ; Save the result in
; Initialize sum to 0 memory
XOR AX, AX ; Clear AX register
; Terminate program
MOV AH, 4CH ; DOS interrupt to exit
INT 21H

MAIN ENDP
END MAIN
63
 M O R E SA M P L E P R O G R A M S
§ Exam pl e2 : - W rite and runaprogram th ataddsfourwordsofdataand
savesth e resul t. T h e val
ueswil
lbe 2 3 4 DH , 1 DE6 H , 3 B C 7 H , and
5 6 6 A H . U se DEB U G to verify th e sum isD3 6 4 .

§ Sol
ution:

DaDU, CoET, Department Of Electrical And Computer Engineering 64

 M O R E SA M P L E P R O G R A M S
§ Exam pl e3 : - W rite and runaprogram th attransfers6 bytesofdata
from memory l ocationswith offsetof0 0 1 0 H to memory l
ocations
with offsetof0 0 2 8 H .
§ Sol
ution:

DaDU, CoET, Department Of Electrical And Computer Engineering 65

 IN ST R U C T IO N SET O F 8 0 8 6
§ T h e instructionsetofth e 8 0 8 6 microprocessorisdivided into seven
differentgroups:
A. Datatransferinstruction
B. Stringsinstruction
C. L oopsand jumpsinstruction
D. A rith meticinstruction
E. B itmanipul
ationinstruction
F. Subroutine and interruptinstruction
G. Processorcontrolinstruction
§ T h e instructionalgroupsare organiz ed insuch away th atth e more
commonl y used instructionsare presented first, fol
lowed by l
ess
frequentl y used instructions.

DaDU, CoET, Department Of Electrical And Computer Engineering 66

 DA T A T R A N SF ER IN ST R U C T IO N S:
§ T h isgroupofinstructionsmakesitpossibl e to move ( copy) data
around inside th e processorand betweenth e processorand its
memory.
A . M O V DEST IN A T IO N , SO U R C E:
§ T ransfercanbe from registerto register, registerto memory orfrom
memory to registerbutnotfrom memory to memory.
§ T h e source and destinationmustbe ofsame type i. e. eith erboth must
be byte orword.
§ Inth isinstruction, th e assembl erwilllook atth e siz e ofth e specified
registerinth e operand fiel d to determine ifth e immediate dataisa1 - ,
or2 - byte number.
§ M O V instructiondoesnotaffectany fl
ags.

DaDU, CoET, Department Of Electrical And Computer Engineering 67

 DA T A T R A N SF ER IN ST R U C T IO N S:
§ EX A M PL E: M OV A L, 3 0 H
M OV A X, 3 0 H
§ Inth e firstinstruction, th e 3 0 H iscoded asabyte val
ue because itis
beingM O V ed into A L .
§ Inth e second instruction, th e 3 0 H iscoded asaword val
ue because it
isbeingM O V ed into A X .
§ T h isiscl
earl
y sh ownby th e resul
tingcode forboth instructions.
§ M O V A L , 3 0 H iscoded asB 0 3 0 and M O V A X , 3 0 H iscoded asB 8
3 0 0 0 .
§ N ote th atth e second two bytesrepresentth e byte- swapped val
ue
0 0 3 0 H .

DaDU, CoET, Department Of Electrical And Computer Engineering 68

 C ont. .
.

DaDU, CoET, Department Of Electrical And Computer Engineering 69

 C ont. …

DaDU, CoET, Department Of Electrical And Computer Engineering 70

 DA T A T R A N SF ER IN ST R U C T IO N S:
§ Some times, F orexampl e, inM O V [SI], 0 th e processordoesnot
know ifth e operand sh ould be coded asabyte val ue, orasword
value.
§ F orcasesl ike th is, we use B Y T E P T R and W O R D P T R directives
to indicate th e siz e ofdata.
§ Ifyouwish to M O V abyte val
ue into memory, use:
ü M O V B Y T E PT R [SI], 0
ü M O V W O R D PT R [SI], 0
§ T h e byte ptr, and word ptrassembl
erdirectivesstand for" byte
pointer, " and " word pointer. "

DaDU, CoET, Department Of Electrical And Computer Engineering 71

 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
P U SH and P O P instructions
§ T h e stack is a col
lection ofmemory l
ocations pointed to by th e stack
pointerregisterand th e stack segmentregister( SS: SP ) .
§ PU SH and PO P instructions are used to l
oad to or receive data from
th e stack memory.
§ StoringaC PU registerinth e stack iscal
led apush .
§ L oading th e contents ofth e stack into th e C PU register is cal
led a
pop.
§ T h e SP points atth e currentmemory l
ocation used as th e top ofth e
stack.
§ N o fl
agsare affected by th isinstruction( PU SH and PO P) .

DaDU, CoET, Department Of Electrical And Computer Engineering 72

 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
P U SH SO U R C E
§ W h en we wish to write data into th e stack area, we use th e PU SH
instruction.
§ T h e source ofth e word can be a general
- purpose register, a
segm entregister, orm em ory.
ü A sdataispush ed onto th e stack itisdecremented by 2 .
ü A sdataispopped offth e stack into th e C PU , itisincremented by 2 .
§ W h en an instruction push es or pops a generalpurpose register, it
mustbe th e entire 1 6 - bitregister.
§ O ne mustcode " PU SH A X " .
§ T h ere are no instructionssuch as" P U SH A L " or " P U SH A H " .
DaDU, CoET, Department Of Electrical And Computer Engineering 73
DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ A seach PU SH isexecuted, th e registercontentsare saved onth e
stack and SP isdecremented by 2 .
§ EX A M PL ES:
PU SH B X ; DecrementSP by 2 , copy B X to stack
PU SH DS ; DecrementSP by 2 , copy DS to stack
PU SH tabl
e [B X ] ; DecrementSP by 2 , copy word from
; memory inDS atEA = tabl e + [B X ]
; to stack
PU SH A L ; Il
legal
, mustpush aword

DaDU, CoET, Department Of Electrical And Computer Engineering 74

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ EX A M P L ES: - T h e stack segmentregisterh asbeenl oaded with
4 0 0 0 H and th e stack pointerregisterwith F F F F H . IfregisterC X
contains1 2 3 4 H and A X contains4 4 5 5 H , wh atisth e resul tof:
P U SH A X
P U SH C X
§ Sol
ution:
ü T h e stack pointerpointsto al
ocationreferred to asth e topofth e
stack.
ü W h eneverwe push anitem onto th e stack, th e SP isdecremented
by 2 .
ü T h isisnecessary because al
lpush esinvol
ve 2 bytesofdata
ü F igure 3 - 3 sh owsth e new contentsofmemory afterPU SH A X
and PU SH C X h ave executed.
DaDU, CoET, Department Of Electrical And Computer Engineering 75
 Instruction Setof8 0 8 6

DaDU, CoET, Department Of Electrical And Computer Engineering 76

 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ T h e datacontained inmemory l ocations4 F F F EH and 4 F F F DH is
repl aced by th e contentsofregisterA X and datacontained inmemory
locations4 F F F C H and 4 F F F B H isreplaced by th e contentsofregister
CX .
ü N otice th atth e new stack pointerval
ue is4 F F F B H .
ü R ememberth atth e stack buil
dstoward 0 .
ü Also notice th atth e contentsofregistersC X and A X remain
unch anged.
ü W h enth e SP registerispush ed, th e val
ue writtento th e stack is
th e val
ue ofSP before th e push .

DaDU, CoET, Department Of Electrical And Computer Engineering 77

 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ PU SH A ;
ü Save al l1 6 - bitregistersonto th e stack inth e fol
lowingorder: A X ,
C X , DX , B X , SP, B P, SI, DI.
ü T h e val
ue ofth e SP isth atbefore th e PU SH A instruction.

§ PU SH F ; copiesth e contentsofth e fl
agregisterto th e stack.
DaDU, CoET, Department Of Electrical And Computer Engineering 78
 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
P O P DEST IN A T IO N :
§ T h e PO P instructionisused to perform th e reverse ofaPU SH .
§ C opiesaword from th e stack locationpointed to by th e stack pointer
to adestinationspecified inth e Instruction.
§ T h e stack pointerisused to read 2 bytesofdataand copy th em into
th e locationspecified inth e operand fiel
d.
§ T h e destinationcanbe :
ü A general
- purpose register,
ü A segmentregisterexceptC S and IP
ü A memory l
ocation.
§ T h e datainth e stack isnotch anged.

DaDU, CoET, Department Of Electrical And Computer Engineering 79

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ A fterth e word iscopied to th e specified destination, th e stack pointer
isautomatical ly incremented by 2 to pointto th e nextword onth e
stack.
§ N o fl
agsare affected by th e PO P instruction.
EX A M P L ES:
PO P DX ; C opy aword from topofstack to DX
; IncrementSP by 2
PO P DS ; C opy aword from topofstack to DS
; IncrementSP by 2
PO P T A B L E [B X ] ; C opy aword from topof
; stack to memory in
; DS: T A B L E + B X and DS: T A B L E + B X + 1
§ N O TE: PO P C S Isil
legal
.
DaDU, CoET, Department Of Electrical And Computer Engineering 80
DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ EX A M P L ES: A ssume th e contentsofth e stack segmentregisterand
th e stack pointerare 4 0 0 0 H and F F F B H , respectivel
y. W h atisth e
resul tofPO P DX fol lowed by PO P B X ? U SE F IG U R E 3 . 4 N EX T
PA G E.
§ SO L U T IO N :
ü T h e contentsofl ocation4 F F F B H ( 3 4 H ) are copied into th e lower
byte ofDX , and th e contentsofl ocation4 F F F C H ( 1 2 H ) are
copied into th e upperh alfofDX .
ü Simil arl
y, th e contentsofl ocation4 F F F DH ( 5 5 H ) are copied into
th e l
owerbyte ofB X , and th e contentsofl ocation4 F F F EH ( 4 4 H )
are copied into th e upperh alfofB X .
ü T h e stack pointeristh enincremented asecond time and pointsto
4 FFFFH .
ü F ig. 3 - 4 sh owsasnapsh otofmemory contentsinth e stack area.
DaDU, CoET, Department Of Electrical And Computer Engineering 81
 C ont…

DaDU, CoET, Department Of Electrical And Computer Engineering 82

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
P O P A Destination ( P op A l
lR egisters) .
§ Allgeneralpurpose registersare popped from th e stack inth e order
indicated inT abl
e3 - 6 .
§ N ote th atth e contentsofth e SP are notl
oaded with th e datapopped
offth e stack.
§ T h isisnecessary to preventth e stack from ch angingl
ocations
h alfway th rough th e execution.

DaDU, CoET, Department Of Electrical And Computer Engineering 83

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
O verfl
ow and U nderfl ow ofStack:
§ PU SH instructiondecrementsSP by 2 .
ü A tsome point, ifSP= 0 0 0 0 H and ifth ere isanattemptto PU SH
dataonth e stack, Stack overfl ow wil lresul t.
§ O nth e oth erh and, PO P instructionincrementsSP by 2 .
ü A tsome point, ifSP= F F F F H and ifth ere isanattemptto PO P
datafrom th e stack, Stack U nderfl ow wil lresult.

DaDU, CoET, Department Of Electrical And Computer Engineering 84

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
IN A C C U M U L A T O R , P O R T
§ Inputbyte orword from portto accumul
atorregister( A L orA X ) .
§ Dataread from aninputportal
waysendsupinth e accumul
ator.
§ IN : C O P Y DA T A F R O M A P O R T T O A C C U M U L A T O R .
§ T h e inputportisactual
ly ah ardware device connected to th e
processor'sdatabus.
§ W h enexecutingth e IN instruction, th e processorwil
loutputth e
addressofth e inputportonth e addressbus.
§ T h e sel
ected inputportwil
lth enpl
ace itsdataonto th e databusto be
read by th e processor.
§ T h e processoral
lowstwo differentformsofth e IN instruction:
ü Directand Indirect.

DaDU, CoET, Department Of Electrical And Computer Engineering 85

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ Direct: Ifth e portnumberisbetween0 0 and F F H , we woul
d use:
ü IN A L , 8 0 H or
ü IN A X , 8 0 H .
§ U singA L inth e operand fiel
d causes8 bitsofdatato be read.
§ T wo bytescanbe inputby usingA X inth e operand fiel
d.
§ Exam pl
e:
ü IN A L , 0 F 8 H ; C opy abyte from port0 F 8 H to A L
ü IN A X , 9 5 H ; C opy aword from port9 5 H to A X .
§ Exam pl e: W h atisth e resul
tofIN A L , 8 0 H ifth e dataatinputport
8 0 H is2 2 H ?
§ Sol
ution: T h e byte val
ue 2 2 H iscopied into registerA L ( A L = 2 2 H )

DaDU, CoET, Department Of Electrical And Computer Engineering 86

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ Indirect: Ifafull1 6 - bitportaddressmustbe specified, th e port
addressisl oaded( M O V ED) into registerDX , and
ü IN A L , DX ; T o copy abyte from 8 - bitsportDX to A L .
ü IN A X , DX ; T o copy aW ord from 1 6 - bitsportDX to A x.
§ Exampl
e:
ü M O V DX , 3 0 F 8 H ; L oad 1 6 - bitaddressofth e portinDX .
ü IN A L , DX ; C opy abyte from 8 bitport3 0 F 8 H to A L .
ü IN A X , DX ; C opy aword from 1 6 - bitport3 0 F 8 H to A X .

DaDU, CoET, Department Of Electrical And Computer Engineering 87

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
O U T PO R T , A C C U M U L A T O R
§ O utputbyte or word from accum ul
ator to port.
§ Ifth e outputportis1 6 - bit, th enth isportaddressl
oaded to DX and ,
ü O U T DX , A L or O U T DX , A X
§ Exam pl e:
ü M O V DX , 3 0 F 8 H ; L oad 1 6 - bitaddressofth e portinDX .
ü O U T DX , A L ; C opy th e contentsofA L to pert3 0 F 8 H
ü O U T DX , A X ; C opy th e contentsofA X to port3 0 F 8 H .
§ W h enth e portaddressisinrange of0 0 H to F F H , th en:
ü O U T 8 0 H , A L or O U T 8 0 H , A X .
§ Exam pl
es:
ü OUT 0 F8 H , A L ; C opy contentofA L to 8 bitport0 F 8 H .
ü OUT 0 F8 H , A X ; C opy contentsofA X to 1 6 - bitport0 F 8 H .

DaDU, CoET, Department Of Electrical And Computer Engineering 88

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ Exam pl e: W h ath appensduringexecutionofO U T DX , A L ifA L
contains7 C H and DX contains3 0 0 0 H ?
§ Sol
ution:
ü T h e portaddressstored inregisterDX isoutputonth e address
bus, al ongwith th e 7 C from A L onth e databus.
ü T h e outputportcircuitry mustrecogniz e address3 0 0 0 H and store
th e data.

DaDU, CoET, Department Of Electrical And Computer Engineering 89

DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
L EA DEST IN A T IO N , SO U R C E ( L oad effective address) :
§ T h isinstructionisused to l
oad th e offsetofth e source m em ory
operand into one ofth e processor'sregisters.
§ T h e memory operand may be specified by any numberofaddressing
modes. T h e destinationmay notbe asegmentregister.
§ Determinesth e offsetofth e variabl
e ormemory l ocationnamed as
th e source and l
oadsth isaddressinth e specified 1 6 - bitregister.
ü Fl
agsare notaffected by L EA instruction.
§ Exam pl
e:
ü L EA C X , T O T A L ; L oad C X with offsetofT O T A L inDS.
ü L EA A X , [B X ][DI] ; L oad A X with EA = B X + DI
ü L EA DX , 1 0 [SI] ; L O A D DX with EA = SI + 1 0
DaDU, CoET, Department Of Electrical And Computer Engineering 90
DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
§ Exam pl
e: W h atisth e difference between:
ü M O V A X , [4 0 H ]and L EA A X , [4 0 H ]?
§ Sol
ution:
ü In M O V A X , [4 0 H ] ; Pl
aces 2 bytes ofdata from locations 4 0 H
; and 4 1 H into registerA X .
ü InL EA A X , [4 0 H ] ; Pl
aces4 0 H into registerA X .
§ Exam pl
e: W h atdoesL EA A X , [SI]do?
§ Sol
ution: T h e val
ue ofSI atexecutiontime isl
oaded into A X .
§ Exam pl
e:
ü M O V BX , 3 5 H
ü M O V DI, 1 2 H
ü L EA SI, [B X + DI] ; SI = 3 5 H + 1 2 H = 4 7 H

DaDU, CoET, Department Of Electrical And Computer Engineering 91

 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
X C H G DEST IN A T IO N , SO U R C E ( Exch ange data) :
§ U sed to swapth e contentsoftwo 8 - , or1 6 - bitoperands.
§ O ne operand mustbe aprocessorregister( excl
udingth e segment
registers) .
§ T h e oth eroperand may be aregisteroramemory l
ocation.
§ Ifamemory locationisused asanoperand itisassumed to be with in
adatasegment.
§ Exam pl e: R egistersA L and B L contain3 0 H and 4 0 H , respectivel
y.
W h atisth e resul
tofX C H G A L , B L ?
§ Sol
ution: A fterexecution,
ü A L = B L = 4 0 H and
ü BL = A L = 3 0 H .
DaDU, CoET, Department Of Electrical And Computer Engineering 92
 DA T A T R A N SF ER IN ST R U C T IO N S( cont. . )
R eading A ssignm ent:
ü XL A T
ü L DS
ü L ES
ü L A H F and
ü SA H F

DaDU, CoET, Department Of Electrical And Computer Engineering 93

 L O O P S A N D JU M P S IN ST R U C T IO N
§ W h enth ere isaneed to ch ange th e path ofprogram executionby
forcingth e processorto fetch itsnextinstructionfrom anew l ocation,
we canuse Jump instructions.
§ W h enth ere isaneed to execute some portionofth e program more
th anone timeswe canuse l oop instructions.
§ A jumpal
tersth e contentsofth e processor'sinstructionpointer.
§ R ememberth atth e C S and IP registersare combined to determine th e
addressofth e nextinstructionfetch .
§ Jumpinstructionsare cl
assified as
ü U nconditionalJump ( JM P )
ü C onditionalJump ( J cond)

DaDU, CoET, Department Of Electrical And Computer Engineering 94

 U N C O N DIT IO N A L JU M P S
JM P T arget
§ U nconditionaljum p to Specified Destination( T arget)
ü T h isinstructionwillal
wayscause th e 8 0 8 6 to fetch itsnext
instructionfrom th e l
ocationspecified inth e instructionwith out
any precondition.
ü Ifcontrolistransferred to amemory l
ocationwith inth e current
code segment, itisN EA R jump.
ü T h isissometimescal
led intra- segmentjump ( with insegment) .
ü Ifcontrolistransferred outside th e currentcode segment, itisa
F A R orintersegm entjum p( betweensegments) .
ü Since th e C S: IP registersal
wayspointto th e addressofth e next
instructionto be executed, th ey mustbe updated wh enacontrol
transferinstructionisexecuted.
DaDU, CoET, Department Of Electrical And Computer Engineering 95
 U N C O N DIT IO N A L JU M P S IN ST R U C T IO N S
§ T h e U nconditionalJumpC anT ake T h e F ol
lowingF orms:
A . SH O R T JU M P:
ü W h ich isspecified by: " JM P SH O R T label " .
ü T h isisajumpinwh ich th e addressofth e targetl ocationis
with in- 1 2 8 to + 1 2 7 bytesofmemory relative to th e addressof
th e currentIP.
B . F A R JU M P:
ü W h ich h asth e format" JM P F A R PT R label" .
ü T h isisajumpoutofth e currentcode segment, meaningth atnot
onl y th e IP butal
so th e C S isrepl
aced with new val
ues.
C . N EA R JU M P:
ü W h ich isth e defaul
t, h asth e format" JM P l
abel
" .
ü T h isisanearjump( with inth e currentcode segment)

DaDU, CoET, Department Of Electrical And Computer Engineering 96

 U N C O N DIT IO N A L JU M P S IN ST R U C T IO N S
§ T h e targetaddresscanbe any ofth e addressingmodesofdirect,
register, registerindirect, ormemory indirect:
§ DirectJU M P : - th e targetaddresscanbe anywh ere inth e segment
with inth e range + 3 2 7 6 7 to - 3 2 7 6 8
ü F orexampl e, in“ JM P A G A IN ”
§ R egister indirectJU M P ; th e targetaddressisinaregister.
ü F orexampl e, in" JM P B X ”, IP = B X .
§ M em ory indirectJM P ; th e targetaddressisth e contentsoftwo
memory l ocationspointed atby th e register.
ü F orExampl e: " JM P [DI]" willreplace th e IP with th e contents
ofmemory l ocationspointed atby DI and DI + 1 .

DaDU, CoET, Department Of Electrical And Computer Engineering 97

 C O N DIT IO N A L JU M P IN ST R U C T IO N S
§ C onditionaljumpsare al
wayssh ortjumpsinth e 8 0 8 6 .
§ T h ese instructionswillcause ajumpto al abelgiveninth e instruction
ifth e desired conditionsoccursinth e program.
§ Ifth e jumpisnottaken( jumpconditionisnotful
fil
led) , execution
simpl y go to th e nextinstruction.
§ Inth e conditionaljump, controlistransferred to anew l
ocationifa
certainconditionismet.
§ T h e fl
agregisteristh e one th atindicatesth e currentcondition.
§ F orexampl
e, with " JN Z l
abel
" , th e processorl
ooksatth e z ero fl
ag.
ü IfZ F = 0 , itwil
ljumpto l
abelto fetch th e instruction.
ü IfZ F = 1 , itwil lnotjumpbutwil
lexecute th e nextinstruction
below th e JN Z .
§ See th e summery ofconditionaljumpinstruction.
DaDU, CoET, Department Of Electrical And Computer Engineering 98
 8 0 8 6 C O N DIT IO N A L JU M P IN ST R U C T IO N S

DaDU, CoET, Department Of Electrical And Computer Engineering 99

 C O N DIT IO N A L JU M P IN ST R U C T IO N S
§ W h ensigned numbersare compared, use th e JG , JL , JG E,
JL E, JE, and JN E instructions.
§ T h e termsgreater th anand l
essth anreferto signed
numbers.
§ W h enunsigned numbersare compared, use th e JA , JB , JA B ,
JB E, JE, and JN E instructions.
§ T h e termsabove and bel
ow referto unsigned numbers.

DaDU, CoET, Department Of Electrical And Computer Engineering 100

 C O N DIT IO N A L JU M P IN ST R U C T IO N S
§ EX A M P L E: W rite an assem bly
l anguage program th atadds two numbers
from memory in data segmentatoffsets of
1 1 0 0 H and 1 1 0 1 H and storesth e resul tatan
offsetof( 1 1 0 2 H ifitis positive, 1 1 0 3 H ifit
isnegative and 1 1 0 4 H ifitisz ero.

DaDU, CoET, Department Of Electrical And Computer Engineering 101

 L O O P IN ST R U C T IO N S
L O O P Sh ort- L abel( L oop) .
§ T h isinstructionisused to repeataseriesofinstructionforspecified
numberoftimes.
§ T h e numberisspecified inth e C X register.
§ T h e C X registerisautomatical
ly decremented by one, each time after
executionofL O O P instruction.
§ U ntilC X = 0 , executionwil
ljumpto adestinationspecified by al
abel
inth e instructions.
§ Exam pl e: write a program to add five words and save th e resul
t
in SU M m em ory l ocation, using L O O P instruction.
§ Sol
ution: see th e fol
lowing program .

DaDU, CoET, Department Of Electrical And Computer Engineering 102

 L O O P IN ST R U C T IO N S
.

DaDU, CoET, Department Of Electrical And Computer Engineering 103

 L O O P E/ L O O P Z
L O O P E/ L O O P Z Sh ort- L abel( L oop ifEqual
, L oop ifZ ero) .
§ T h isinstructionissimil
arto L O O P exceptforasecondary
conditionth atmustbe metforth e jumpto take pl ace.
§ Inadditionto decrementingC X , L O O PZ al
so examinesth e state
ofth e z ero fl
ag.
§ Ifth e z ero fl
agissetand C X doesnotequal0 , L O O PZ wil
l
jumpto th e target.
§ IfC X equal
s0 , orifth e z ero fl
aggetscl
eared with inth e l
oop,
th e l
oopwil
lterminate.
§ A sal ways, wh enaconditionalinstructiondoesnoth ave th e
correctfl agcondition, executioncontinueswith th e next
instruction.
§ L O O PE isanal
ternate name forth isinstruction.
DaDU, CoET, Department Of Electrical And Computer Engineering 104
 L O O P E/ L O O P Z
L O O P N E/ L O O P N Z Sh ort- L abel( L oop ifnotEqual
, L oop if
notZ ero) .
§ L O O P N Z is th e opposite ofL O O P Z .
§ T h e z ero fl
agmustbe cl
eared to al
low furth erl
ooping.
§ L O O PN E h asth e same function.
§ F orL O O P E/ L O O P Z and L O O P N E/ L O O P N Z instructionsth ere
isone more conditionforexitfrom l oop, wh ich isgivenbel ow.

DaDU, CoET, Department Of Electrical And Computer Engineering 105

 Exam pl
e ofconditional
, unconditionaland l
oop.

DaDU, CoET, Department Of Electrical And Computer Engineering 106

 ST R IN G IN ST R U C T IO N S
§ A particul
arl
y nice feature ofth e 8 0 8 6 isitsabil
ity to h andl
e strings.
§ A stringisacol
lectionofbytes, orwordsth atcanbe upto 6 4 K B in
length .
§ A nexampl e ofastringmigh tbe asequence ofA SC II ch aractercodes
th atconstitute apassword, orth e A SC II codesfor“ G ood M orning! . “
§ T h ey are capabl
e ofperformingoperationsonaseriesofoperands
located inconsecutive memory locations.
§ F orexampl e, wh il
e th e C M P instructioncancompare only 2 bytes( or
words) ofdata, th e C M PS ( compare string) instructioniscapabl e of
comparingtwo arraysofdatal ocated inmemory locationspointed at
by th e SI and DI registers.
§ T h e commonoperationsth atwe canperform onany stringare
copying, comparing and scanning.

DaDU, CoET, Department Of Electrical And Computer Engineering 107

 U se ofSI and DI, DS and ES in string Instructions
§ In8 0 8 8 / 8 6 microprocessors, th e SI and DI registersal
wayspointto
th e source and destinationoperands, respectivel y.
§ N ow th e questionis:
ü W h ich segmentsare th ey combined with to generate th e 2 0 - bit
ph ysicaladdress?
§ T o generate th e ph ysicaladdress, th e 8 0 8 8 / 8 6 al
waysusesSI asth e
offsetofth e DS ( datasegment) registerand DI asth e offsetofES
( extrasegment) .
§ T h atmeans, th e source isresidesinDS: SI and destinationisreside in
ES: DI memory l ocation.
§ T h is is th e defaul
tm ode.
§ Itmustbe noted th atth e ES registermustbe initial
iz ed forth e string
operationto work.

DaDU, CoET, Department Of Electrical And Computer Engineering 108

 B yte and word operands in string instructions
§ Ineach ofth e stringinstructions, th e operand canbe abyte oraword.
§ T h ey are distinguish ed by th e l
ettersB ( byte) and W ( word) inth e
instructionmnemonic.
§ T abl
e bel
ow providesasummary ofal
lth e stringinstructions.
§ Each one wil
lbe discussed separatel
y inth e contextofexampl
es.

DaDU, CoET, Department Of Electrical And Computer Engineering 109

 SU M M ER Y O F ST R IN G O P ER A T IO N T A B L E

DaDU, CoET, Department Of Electrical And Computer Engineering 110

 DF , th e direction fl
ag
§ T o processoperandsl ocated inconsecutive memory locations
requiresth atth e pointerbe increm ented or decrem ented.
§ Instringoperationsth isisach ieved by th e direction fl
ag ( DF ) .
§ Itisth e job ofth e programmerto specify th e ch oice ofincrementor
decrementby settingth e directionflagto h igh orl ow.
§ T h e are two instructionto setth e directionfl
ags.
ü C L D ( cl
eardirectionfl
ag) , DF = 0 . and
ü ST D ( setdirectionfl
ag) , DF = 1 ,
§ IfDF = 0 , indicatingth atth e stringinstructionsh oul
d incrementth e
pointers( SI and DI) automatical ly.
§ IfDF = 1 , indicatingth atth e stringinstructionsh oul
d decrementth e
pointers( SI and DI) automatical ly.
DaDU, CoET, Department Of Electrical And Computer Engineering 111
 R EP prefix
§ T h e R EP ( repeat) prefixal
lowsastringinstructionto perform th e
operationrepeatedl y.
§ N ow th e questionis:
ü H ow many timesisitrepeated?
§ R EP assumesth atC X h ol
dsth e numberoftimesth atth e instruction
sh oul
d be repeated.
§ Inoth erwords, th e R EP prefixtel
lsth e C PU to perform th e string
operationand th endecrementsth e C X registerautomatical ly.
§ T h isprocessisrepeated untilC X becomesz ero.
§ T o understand some ofth e conceptsdiscussed so far, l
ook atExampl
e
below.

DaDU, CoET, Department Of Electrical And Computer Engineering 112

 R EP prefix
§ Exam ple: U singstringinstructions, write aprogram th attransfersa
bl
ock of1 9 bytesofdatafrom DA T A 1 to DA T A 2 .
ü A ssume data1 = ‘H A W A SSA U N IV ER SIT Y ! ’
§ Sol
ution:

DaDU, CoET, Department Of Electrical And Computer Engineering 113

 C ont…
§ Inabove Exampl e 6 , afterth e transferofevery byte by th e M O V SB
instruction, both th e SI and DI registersare incremented automatical l
y
once onl y ( notice C L D) .
§ T h e R EP prefixcausesth e C X counterto be decremented and
M O V SB isrepeated untilC X becomesz ero.
§ N otice inExampl
e above th atboth DS and ES are setto th e same
value.
§ Exam pl e : - W h atinstructionsare necessary to make acopy ofth e
SH O P P ER string? T h e indexregisterssh oul d auto- incrementduring
th e stringoperation. W rite aprogram.
§ Sol
ution:

DaDU, CoET, Department Of Electrical And Computer Engineering 114

 ST O S and L O DS instructions
§ T h e ST O SB instructionstoresth e byte inth e A L register into
m em ory l ocations pointed atby ES: DI and incrementsDI once( if
DF = 0 ) . IfDF = 1 , th enDI isdecremented.
§ T h e ST O SW instructionstoresth e contentsofA X inmemory
locationsES: DI and ES: DI+ 1 ( A L into ES: DI and A H into ES: DI+ 1 ) ,
th enincrementsDI twice ( ifDF = 0 ) . IfDF = 1 , DI isdecremented
twice.
§ T h e L O DSB instructionl
oadsth e contentsofmemory l ocations
pointed atby DS: SI into A L and increments( ordecrements) SI once
ifDF = 0 ( orDF = 1 ) .
§ L O DSW l oadsth e contentsofm em ory l ocations pointed atby
DS: SI into A L and DS: SI+ 1 into A H . T h e SI isincremented twice if
DF = 0 . O th erwise, itisdecremented twice.
§ L O DS isneverused with aR EP prefix.
DaDU, CoET, Department Of Electrical And Computer Engineering 115
 ST O S and L O DS instructions
§ EX A M P L E: W rite aprogram th at:
ü U sesST O SB to store byte A A H into l 0 0 memory l ocations.
ü U sesL O DS to testth e contentsofeach l ocationto see ifA A H
wasth ere.
ü Ifth e testfails, th e system sh oul
d displ ay th e message “ bad
memory”.
ü Ifth e testfails, th e system sh oul
d displ ay th e message “ G ood
memory”.
§ Sol
ution: see th e fol
lowing
§ In th e data code segm ent, th e expression coul
d be:

DaDU, CoET, Department Of Electrical And Computer Engineering 116

 ST O S and L O DS instructions
.

DaDU, CoET, Department Of Electrical And Computer Engineering 117

 ST O S and L O DS instructions
§ Inth e program inExampl e above, firstA A H iswritteninto 1 0 0
locationsby usingword- siz ed operand A A A A H and acountof5 0 .
§ Inth e testpart, L O DS bringsinth e contentsofmemory l ocationsinto
A L one by one, and each time itisexcl usive- O R ed with A A H ( th e
A H registerh asth e h exvalue ofA A ) .
§ Ifth ey are th e same, Z F = 1 and th e processiscontinued,
§ O th erwise, th e patternwrittenth ere by th e previousroutine isnot
th ere and th e program wil lexit.

DaDU, CoET, Department Of Electrical And Computer Engineering 118

 T h e R EP Z and R EP N Z prefixes
§ T h ese prefixescanbe used with th e C M P S and SC A S instructionsfor
testingpurposes.
§ T h ey are expl ained bel ow.
ü R EP Z ( repeatz ero) , wh ich isth e same asR EP E ( repeatequal ),
wil lrepeatth e stringoperationasl ongasth e source and
destinationoperandsare equal( Z F = 1 ) oruntilC X becomesz ero.
ü R EP N Z ( repeatnotz ero) , wh ich isth e same asR EP N E
( repeatnotequal ) , willrepeatth e stringoperationasl ongasth e
source and destinationoperandsare notequal( Z F = 0 ) oruntil
C X become z ero.
ü T h ese two prefixeswil lbe used inth e contextofappl ications
afterth e explanationofth e C M PS and SC A N S instructions.

DaDU, CoET, Department Of Electrical And Computer Engineering 119

 C M P S ( com pare string)
§ C M P S ( com pare string) al
lowsth e comparisonoftwo arraysofdata
pointed atby th e SI and DI registers.
§ O ne cantestforth e equality orinequal
ity ofdataby use ofth e R EP E
orR EP N E prefixes, respectively.
§ T h e comparisoncanbe performed abyte atatime oraword attime
by usingC M P SB or C M P SW .
§ F orexampl e, ifcomparing“ Euorop” and “ Europe” forequal ity, th e
comparisonwil lcontinue usingth e R EPE C M PS asl
ongasth e two
arraysare th e same.

DaDU, CoET, Department Of Electrical And Computer Engineering 120

 C M P S ( com pare string)
§ Exam pl e:
ü A ssumingth atth ere isaspel l
ingof“ Europe” inanel ectronic
dictionary and ausertypesin“ Euorope”, write aprogram th at
comparesth ese two and displ aysth e foll
owingmessage,
dependingonth e resul t:
1 . Ifth ey are equal , displ ay “ T h e spel
ling is correct”.
2 . Ifth ey are notequal , displ ay “ W rong spel ling”.
§ Sol
ution: see th e fol
lowingprogram.

DaDU, CoET, Department Of Electrical And Computer Engineering 121

 C M P S ( com pare string)

DaDU, CoET, Department Of Electrical And Computer Engineering 122

 SC A S ( scan string)
§ T h e SC A SB stringinstructioncompareseach byte ofth e array
pointed atby ES: DI with th e contentsofth e A L register, and
dependingonwh ich prefixofR EPE orR EPN E isused, adecisionis
made forequal ity orinequal ity.
§ F or exam ple, inth e array “ M r. G ones”, one canscanforth e l etter“ G ”
by l oadingth e A L registerwith th e ch aracter“ G ”and th enusingth e
“ R EPN E SC A SB ”operationto l ook forth atl
etter.

DaDU, CoET, Department Of Electrical And Computer Engineering 123

 SC A S ( scan string)
§ EX A M P L E: - W rite aprogram to scanforth e l
etter‘N ’ , in
‘SH O PPIN G ’ strings.
ü Ifth e l etterisfound, displ
ay onscreen‘T H E L ET T ER IS
F O U N D! ’
ü Ifth e l etterisnotfound, , display onscreen‘T H E L ET T ER IS
N O T F O U N D! ’
§ Sol
ution :
ü N ote th at, forSC A S instruction, destinationis, ES: DI, wh il
e
source is, A L orA X .
ü So th at, th e stringmustbe indestinationofDE: DI

DaDU, CoET, Department Of Electrical And Computer Engineering 124

 SC A S ( scan string)
.

DaDU, CoET, Department Of Electrical And Computer Engineering 125

 U SIN G ST R IN G IN ST R U C T IO N
§ Exam pl e: - A ssumingth atth ere isaspel l
ingof“ teff" inanel ectronic
dictionary and ausertypesin“ teaf" , write aprogram th atcompares
th ese two and displ aysth e fol lowingmessage, dependingonth e
resul t:
ü 1 . Ifth ey are equal , displ ay " T h e spellingiscorrect" .
ü 2 . Ifth ey are notequal , displ ay " W rongspel ling" .
. M O DEL SM A L L
. DA T A
DA T A _DIC T DB " teff"
DA T A _T Y PED DB " teef"
M ESSA G E1 DB " T h e spel lingiscorrect" , '$ '
M ESSA G E2 DB " W rongspel ling" , '$ '
. C O DE
; write th e code h ere
DaDU, CoET, Department Of Electrical And Computer Engineering 126