Notes on Programmable Logic Devices (PLDs) in VLSI Design OBJECTIVES: In this lesson you will be introduced te some types of Programmable Logic Devices (PLDs): * PROM, PAL, PLA, CPLDs, FPGAs. © How to implement digital circuits using these PLDs. CONTENTS: 1. Introduction 2PLA 3.PROM 4.PAL 5. CPLD and ease study Xilinx XC9500 CPLD Family 6. FPGA and case study Xilinx XC4000 FPGA Family 1. INTRODUCTION: An IC that contains large numbers of gates, flip-flops, etc. that can be configured by the user to perform different functions is called a Programmable Logic Device (PLD), It permits elaborate digital logic designs to be implemented by the user on a single device, The imernal lagic gates and/or comections of PLDs can be changed/con figured by a programming Process, Comparison: programmable logic Vs fived logic The fixed logic system has circuits whose configurations are permanent. Their instructions perform only a fixed set of operations repeatedly. Once manufactured and programmed, the logic cannot be changed. This system is a fantastic asset for repeated tasks,But one tiny mistake in the manufacturing process like uploading the wrong code in the device, and the entire system is discarded, and a new design is developed. That's quite some risk that companies aren’t willing to take unless necessary. Additionally, fixed logic does not allow the users to expand or build on theirexisting fimnetionalities. Thus, we need something more flexible, easy to work, and more cost-efficient. Thus, programmable logic comes to the rescue. [tis easy-to-program, affordable and equipped with better features. Incxpmsive software is usod to develop, code and test the required design. This design is then programmed into a device and tested in a live electronic circuit. ‘The corresponding performance then decides if the logie necds ta be aered, or if the prototype is fit to be determined as the final design itsclf. The fixed logic system thus offers limited usability; a programmable logic seems more feasible and beneficial. Implementing Bootean functions: Every Boolean logic can be decomposed into product-of-sum (POS) or sum-of-product by Kamaugh map(k-map), A@BOC = ABC+ ABC + ABC+ ABC = (A+ B+ CAF BHO +B +C(A+B+O) PLDs are typically built with an aay of AND gates (AND-array) and an array of OR gates (OR-array) to implement the sum-ofiproducts as shown in figure. from [on fo Ih order to show the intemal logic diagram for such technologies in a concise form, it is necessary to have special symbols for array logic. Figure shows the conventional and array. he symbol ipt AND and D> HHLD- een arte input OR gate.he of the simplest programming technologies is to use firses. In the original state of the device, all the fuses are intact. Programming thedevice involves blowing those fuses along, the paths that must be removed in order to obtain the particular configuration of the desired logic function. Anti-fuse employs a thin barrier of non-conducting amorphous silicon between ‘pve metal conductors. Usually in mesh structure. When a sufficiently high voliage is applied across the amorphous silicon it is tumed into a polycrystalline silicon-metal alloy with a low resistance, which is conductive upper plane Problems of using standard ICs: Problems of using standard ICs in logic design are that they require hundrods or thousands of these ICs, considerable amount of circuit board space, a great deal of time and cost in inserting, soldering, and testing. Also require keeping a significant inventory of ICs. Advaniages of using PLDs: Advantages of using PLDs are less board space, faster, lower power requirements (i¢., smaller power supplies), less costly assembly processes, higher liability (fewer ICs and circuit connections means easier troubleshooting),and availability of design software, Types of PLDs: PLDs are broadly classifiad into simple and complex programmable logic devices Further, this is grouped as, © SPLDs (Simple Programmable Logic Devices) + ROM (Read-Only Memory) + PLA (Pmgrammable Logic Amy) «PAL (Programmable Array Logic) = GAL Generic Amay Logic)+ HCPLD (High Capacity Programmable Logic Device) + CPLD (Complex Programmable Logic Device) = FPGA (Field-Programmable Gate Array) Programmable Connections in PLDs: The programmable comections of AND-OR arrays for different types of PLDs are described here. Figure shows the locations fthe programmable connections forthe three types. Inputs. Outputs (a) Programmable Read Only Memary (PROM) Inputs. Outputs (b) Programmable Amay Logie (PAL) Device Inputs: Outputs (c) Programmable Logic Array (PLA} Device Programmable Normat Connections. —— Connections Ihe PROM (Programmable Read Only Memory) has a fixed AND array (constructed asa decoder) and programmable connections for the output OR gates array. The PROM implements Boclcan functions in sum-of-minterms form. The PAL (Programmable Amy Logic) device has a programmable AND array and fixed conncetions for the OR array. The PLA (Programmable Logic Array) has programmable connections for both AND and OR, arrays. So it is the most flexible type of PLD. Applications of Programmable Logic Devices: © GueLogic © State Machines © Counters