UNIT- 2 Combinational Logic

Encoder, Decoder/ Demultiplexer and Multiplexer;

Variable Entered Maps (VEM); Function
Implementation with Multiplexer and Decoder;
Priority Encoder; Binary codes– BCD, Gray,
Alphanumeric Codes, Code Converters, BCD-to-7-
Segment Decoder/Driver; Implementation Using XOR
and XNOR Gates -Parity Checker/Generator, BCD-
Gray Code Converter.
Decimal, Binary & Hexadecimal Numbers
A decimal number 7,392 represents a quantity equal to
7 thousands, plus 3 hundreds, plus 9 tens, plus 2 units.
The thousands, hundreds, etc., are powers of 10
implied by the position of the coefficients (symbols) in
the number.

7 × 103 + 3 × 102 + 9 × 101 + 2 × 100

A number with a decimal point is represented by a

series of coefficients: a5a4a3a2a1a0. a-1a-2a-3
The preceding decimal number is expressed as
105a5 + 104a4 + 103a3 + 102a2 + 101a1 + 100a0 + 10-1a-1
+ 10-2a-2 + 10-3a-3 with a3 = 7, a2 = 3, a1 = 9, & a0 = 2
Coefficient of binary no. system have 2 values 0 & 1
Each coefficient aj is multiplied by a power of radix 2j,
& results are added to obtain decimal equivalent of no.
Decimal equivalent of binary no. 11010.11 is 26.75
1 × 24 + 1 × 23 + 0 × 22 + 1 × 21 + 0 × 20 + 1 × 2-1 + 1
× 2-2 = 26.75
Hexadecimal Numbers (Hex)16 (Base-16)
In hex number system, first 10 digits are borrowed
from decimal system. Letters A, B, C, D, E, & F are
used for digits 10, 11, 12, 13, 14, & 15. (B65F)16 =

11 × 163 + 6 × 162 + 5 × 161 + 15 × 160 = (46,687)10

Hex system is used by designers to represent long

strings of bits in addresses, instructions, & data in
digital systems, e.g., B65F is used to represent
1011011001010000
BINARY-TO-DECIMAL CONVERSION
Ex-1 1 1 0 1 12
24 + 23 + 0 + 21 + 20 = 16 + 8 + 2 + 1 = 2710

Ex-2 1 0 1 1 0 1 0 12
27 + 0 + 25 + 24 + 0 + 22 + 0 + 20 = 18110

1. Convert 1000110110112 to its decimal equivalent.

2. What is the weight of the MSB of a 16-bit number?
 NUMBER BASE CONVERSION
(1 0 1 0. 0 1 1)2

= 23 + 0 + 21 + 0. + 0 + 2-2 + 2-3

= (10.375)10
DECIMAL-TO-BINARY CONVERSION
4510 = 32 + 8 + 4 + 1 = 25 + 0 + 23 + 22 + 0 + 20

=1 0 1 1 0 12

7610 = 64 + 8 + 4 = 26 + 0 + 0 + 23 + 22 + 0 + 0
= 1 0 0 1 1 0 02
DECIMAL-TO-BINARY
CONVERSION
Flowchart for repeated-
division method of decimal-to-
binary conversion of integers.
Same process can be used to
convert a decimal integer to any
other number system.
Convert 3710 to binary

Thus,
3710 = 1001012
Ex1.1 Mano: Convert decimal 41 to binary

Hence, (a5a4a3a2a1a0)2 = (101001)2

Ex1.3 Mano: Convert (0.6875)10 to binary

First, 0.6875 is multiplied by 2 to give an integer & a
fraction. New fraction is ×ied by 2 to give new integer
& a new fraction. Process is continued until fraction
becomes 0 or number of digits has sufficient accuracy

(0.6875)10 = (0. a-1 a-2 a-3 a-4)2 = (0.1011)2

From Ex 1.1 and 1.3
(41.6875)10 = (101001.1011)2
 Counting Range Ex-2.2
(a) What is total range of decimal values that can be
represented in eight bits

(b) How many bits are needed to represent decimal

values ranging from 0 to 12,500?

Soln (a)
Here, N = 8. Thus, we can represent decimal
numbers from 0 to 28 - 1 = 255. It is verified by
checking that 111111112 converts to 25510
Soln (b) With 13 bits, we can count from decimal 0 to
213 - 1 = 8191. With 14 bits, we can count from 0 to 214
- 1 = 16383. 13 bits aren’t enough, but 14 bits will get
us beyond 12,500. Thus, required number of bits is 14.
1. Convert 8310 to binary using both methods.
2. Convert 72910 to binary using both methods. Check
your answer by converting back to decimal.
3. How many bits are required to count up to decimal
1 million?
 HEXADECIMAL NUMBER SYSTEM
Hexadecimal number system uses base 16.

It has 16 possible digit symbols.

It uses the digits 0 through 9 plus the letters A, B, C,

D, E, and F as the 16 digit symbols.

Digit positions are weighted as powers of 16, rather

than as powers of 10 as in the decimal system.
Relationships among
hexadecimal, decimal,
& binary numbers

Digits A through F are

equivalent to decimal
values 10 through 15
 Hex-to-Decimal Conversion
Hex number is converted to its decimal equivalent as;
Weight of each hex digit position is a power of 16.

Least Significant Digit (LSD) has a weight of 160

Next higher digit position has a weight of 161 = 16

The next has a weight of 162 = 256 and so on, e.g.,

35616 = 3 × 162 + 5 × 161 + 6 ×160

= 768 + 80 + 6
= 854 10
2AF16 = 2 × 162 + 10 × 161 + 15 ×160 = 512 + 160 +15
= 68710 (10 is substituted for A, & 15 for F)
Example: Verify that 1BC216 is equal to 710610

Decimal-to-Hex Conversion
Decimal-to-binary conversion: repeated division by 2
Decimal-to-hex conversion: repeated division by 16
Ex 2-3 (a) (Tocci): Convert 42310 to hex
Ex 2-3 (b) (Tocci): Convert 21410 to hex

Remainders of ÷ processes form digits of hex number

Any remainders > 9, r represented by letters A thru F

 Hex-to-Binary Conversion
Hex number system is used as “shorthand” method
for representing binary numbers. It is relatively simple
to convert a hex number to binary

Each hex digit is converted to its four-bit binary eqvlnt

9F216 = 9 F 2

=1 0 0 1 1 1 1 1 0 0 1 0

= 1001111100102

Example: Verify that BA616 = 1011101001102

Hex-to-Binary Conversion
(306.D)16 = (0011 0000 0110. 1101)2

3 0 6 . D
 Binary-to-Hex Conversion:
Conversion from Binary to hex is just the reverse of
the process above.

Binary number is grouped into groups of four bits, and

each group is converted to its equivalent hex digit.

Zeros (shaded) are added, to complete a 4-bit group

1 1 1 0 1 0 0 1 1 02 = 0 0 1 1 1 0 1 0 0 1 1 0 = 3A616

3 A 6

Example: Verify that 1 0 1 0 1 1 1 1 12 = 15F16.

(10 1100 0110 1011. 1111 0010)2 = (2C6B.F2)16

2 C 6 B F 2
 Counting in Hexadecimal
Counting in hex, each digit position is incremented by
1from 0 to F.

Once a digit position reaches the value F, it is reset to

0, and next digit position is incremented
(a) 38, 39, 3A, 3B, 3C, 3D, 3E, 3F, 40, 41, 42
(b) 6F8, 6F9, 6FA, 6FB, 6FC, 6FD, 6FE, 6FF, 700
when there is a 9 in a digit position, it becomes an A
when it is incremented
 Usefulness of Hex
Hex is “shorthand” to represent strings of bits.

In computer work, binary strings of 64 bits represent a

numerical value, code of nonnumerical information.
For large number of bits, it is more convenient & less
error-prone to write binary numbers in hex and is easy
to convert back and forth between binary and hex

For 50 memory locations, having 16 nos would you

check 50 numbers like: 0110111001100111 or 6E67?
 EX 2-4: Convert 37810 to a 16-bit binary number by
first converting to hexadecimal

37810 = 17A16
Hex value is converted easily to binary 000101111010.
37810 is expressed as a 16-bit number by adding four
leading 0s: 37810 = 0000 0001 0111 10102
 Summary of Conversions
From binary [or hex] to decimal, use the method of
taking the weighted sum of each digit position.

From decimal to binary [or hex], use the method of

repeatedly dividing by 2 [or 16] & collecting remaindr

From binary to hex, group bits in groups of four, and

convert each group into the correct hex digit.

From hex to binary, convert each digit into its four-bit

equivalent.
Review Questions
1. Convert 24CE16 to decimal.
2. Convert 311710 to hex, then from hex to binary.
3. Convert 10010111101101012 to hex.
4. Write next four numbers in hex counting sequence:
E9A, E9B, E9C, E9D, _____, _____, _____, _____.
5. Convert 3527 to binary16.
6. What range of decimal values can be represented by
a 4-digit hex number?
 BCD CODE
If each digit of a decimal number is represented by its
binary equivalent, the result is a code called binary-
coded-decimal (hereafter abbreviated BCD).
A decimal digit can be as large as 9, 4 bits are required
to code each digit (the binary code for 9 is 1001).

8 7 4 (decimal)

1000 0111 0100 (BCD)

 9 4 3 (decimal)

1001 0100 0011 (BCD)

Convert 0110100000111001 (BCD) to decimal eqvlent

Divide BCD no. into 4-bit groups & convert each to dec.
0110 1000 0011 1001
6 8 3 9

Convert 011111000001 (BCD) to decimal equivalent

0111 1100 0001
7 ↓ Error 1
 Comparison of BCD and Binary
13710 = 100010012 (binary)
13710 = 0001 0011 0111 (BCD)
Main advantage of the BCD code is the relative ease
of converting to and from decimal. Only the 4-bit code
groups for the decimal digits 0 through 9 need to be
remembered. This ease of conversion is especially
important from a hardware standpoint because in a
digital system, it is the logic circuits that perform the
conversions to and from decimal
THE GRAY CODE
PUTTING IT ALL TOGETHER
 ALPHANUMERIC CODES
Computer handles numerical/nonnumerical data &
recognize codes that represent letters of alphabet,
punctuation marks, & other special characters as well
as numbers. These codes are called alphanumeric
codes, including, 26 lowercase/uppercase letters, 10
numeric digits, 7 punctuation marks, & 20 to 40 other
characters (+, /, #, %, *), & so on. alphanumeric
codes, represents all character & functions, that are
found on a computer keyboard.
 ASCII Code
Most widely used alphanumeric code is the American
Standard Code for Information Interchange
(ASCII) ASCII is a seven-bit code, having 27 = 128
possible code groups, enough to represent all of the
standard keyboard characters as well as control fns
such as (RETURN) and (LINEFEED) fns. Table gives
hexadecimal & decimal equivalents. 7-bit binary code
for each character can be obtained by converting hex
value to binary.
Standard
ASCII
Codes
 Find 7-bit ASCII code for character (\)
The hex value for (\) is 5C. Translating each hex digit
into four bit binary produces 0101 1100. The lower
seven bits represent the ASCII code for \, or 1011100.
ASCII code is used for the transfer of alphanumeric
information between a computer and the external
devices such as printer or another computer. Computer
also uses ASCII internally to store information that an
operator types in at the computer’s keyboard.
Example 2-14 (Tocci):

An operator is typing a program in C at keyboard of a

µc. µc converts each keystroke into its ASCII code &
stores the code as a byte in memory. Determine binary
strings that will be entered into memory when operator
types in C statement: if (x > 3)

Solution:
Locate each character (including the space) in Table
and record its ASCII code
0 is added to the leftmost bit of each ASCII code
because codes must be stored as bytes (eight bits).
 REVIEW QUESTIONS

1. Encode the following message in ASCII code using

the hex representation: “COST $72.”

2. The following padded ASCII-coded message is

stored in successive memory locations in a computer:

01010011 01010100 01001111 01010000

What is the message?

Excess-3 Code
Design Procedure: Code Converters
BCD-to-Excess-3 Code Conversion Pg-131
Mano
2421 & excess‐3 codes are examples of self‐

complementing codes. Such codes have property that

9’s complement of a decimal number is obtained

directly by changing 1’s to 0’s and 0’s to 1’s.

Excess‐3 is an unweighted code in which each

coded combination is obtained from corresponding

binary value plus 3.

8, 4, -2, -1 code is an example of assigning both +ve

and -ve weights to a decimal code.

In this case, bit combination 0110 is interpreted as

decimal 2 and is calculated from 8 × 0 + 4 × 1 + (-2) ×

1 + (-1) × 0 = 2
 DECODERS
Decoder is a logic circuit that accepts a set of inputs
that represents a binary number and activates only the
output that corresponds to that input number. In other
words, a decoder circuit looks at its inputs, determines
which binary number is present there, and activates the
one output that corresponds to that number; all other
outputs remain inactive. Active High/Active Low
outputs of Decoder, Concept of ENABLE Inputs
 DECODERS (General Decoder Diagram)

ENABLE Inputs With ENABLE held HIGH, decoder

functions normally. With ENABLE held LOW, all o/ps
will be forced to LOW regardless of levels at A, B, C
inputs. Decoder is enabled only if ENABLE is HIGH
Some decoders have one or more ENABLE inputs that
are used to control the opn of decoder. e.g. refer to
decoder in Fig & visualize having a common ENABLE
line connected to a 4th i/p of each gate. With this
ENABLE line held HIGH, decoder will function
normally, & A, B, C i/p code will determine which o/p is
HIGH. With ENABLE held LOW, all of the o/ps will be
forced to LOW state regardless of levels at A, B, C i/ps.
Thus, decoder is enabled only if ENABLE is HIGH.
2-line-to-4-line decoder

Truth Table
2-line-to-4-line Decoder
with NAND Gates

Truth Table of 2-line-

to-4-line Decoder
with Enable input
Three-line-to-8-line
(or 1-of-8) decoder
Truth Table of 3-line-to-8-line (or 1-of-8)
decoder
Combinational Logic/Fn Implementation
P-154, Mano

Implementation of
a 1 bit full adder
with a decoder

Sum & Carry Fn of a 1 bit full adder are defined as

S (x, y, z) = Σ (1, 2, 4, 7) = x′y′z + x′yz′+ xy′z′+ xyz

C (x, y, z) = Σ (3, 5, 6, 7) = x′yz + xy′z + xyz′ + xyz

A fn with a long list of minterms requires an OR gate
with a large number of i/ps. A fn having a list of k
minterms can be expressed in its complemented form
F′ with 2n - k minterms. If number of minterms in fn is
> than 2n/2, then F′ can be expressed with fewer
minterms. In such a case, it is advantageous to use a
NOR gate to sum the minterms of F′. The o/p of NOR
gate complements this sum & generates normal o/p F
If NAND gates are used for the decoder, then external

gates must be NAND gates instead of OR gates.

Because a 2-level NAND gate circuit implements a

sum-of-minterms fn and is equivalent to a 2-level

AND–OR circuit.
Logic Circuit of 3-line-to-8-line Decoder 74ALS138

74HC138 is
high-speed
CMOS
version of
this decoder
Indicate the states of the 74ALS138 outputs for each
of the following sets of inputs
(a) E3 = E′2 = 1, E′1 = 0, A2 = A1 = 1, A0 = 0
(b) E3 = 1, E′2 = E′1 = 0, A2 = 0, A1 = A0 = 1
Logic Symbol
of 74ALS138
Decoder
Fig shows how four 74ALS138s & an INVERTER can be arranged to function as a 1-
of-32 decoder. Decoders are labeled Z1 to Z4 for easy reference, and eight outputs from
each one are combined into 32 outputs. Z1’s outputs are O′0 to O′7; Z2’s outputs O′0 to
O′7 are renamed O′8 to O′15 respectively; Z3’s outputs are renamed O′16 to O′23 ; and
Z4’s are renamed O′24 to O′31 . A five-bit input code A4A3A2A1A0 will activate only one
of these 32 outputs for each of the 32 possible input codes.
(a) Which o/p will be activated for
A4A3A2A1A0 = 01 101
(b) What range of input codes will activate Z4 chip?
Logic diagram of
BCD-to-Decimal
Decoder
74LS42
74HC42
7442

BCD-to-decimal decoder
 Logic symbol;

BCD-to-Decimal Decoder/Driver
TTL 7445 is a BCD-to-decimal decoder/driver. The
7445’s outputs can sink up to 80 mA in the LOW state,
and they can be pulled up to 30 V in the HIGH state.
This makes them suitable for directly driving loads
such as indicator LEDs or lamps, relays, or dc motors.
Decoder Applications; Memory Systems etc.
 Encoder
Most decoders accept an input code and produce a
HIGH (or a LOW) at one and only one output line. In
other words, we can say that a decoder identifies,
recognizes, or detects a particular code. The opposite
of this decoding process is called encoding and is
performed by a logic circuit called an encoder An
encoder has a number of input lines, only one of which
is activated at a given time, and produces an N-bit
output code, depending on which input is activated.
Figure is the general diagram for an encoder with M
inputs and N outputs. Here, the inputs are active-
HIGH, which means that they are normally LOW

Encoder
An encoder is a digital circuit that performs inverse
opn of a decoder. An encoder has 2n (or fewer) input
lines and n output lines. The o/p lines, generate binary
code corresponding to the input value. An 8-line-3-line
Encoder can be implemented with OR gates whose
i/ps are determined directly from truth table. O/p z is
equal to 1 when the input octal digit is 1, 3, 5, or 7.
O/p y is 1 for octal digits 2, 3, 6, or 7, & O/p x is 1 for
digits 4, 5, 6, or 7.
These conditions are expressed by Boolean O/p fns:
z = D1 + D3 + D5 + D7 This Encoder is
y = D2 + D3 + D6 + D7 implemented with
x = D4 + D5 + D6 + D7 three (4-I/p) OR gates
Logic ckt of 8-line-3-line
encoder. For proper opn,
only 1 input should be
active at a time.
These conditions are expressed by Boolean O/p fns:
O0 = A′1 + A′3 + A′5 + A′7 This Encoder is
O1 = A′2 + A′3 + A′6 + A′7 implemented with
O2 = A′4 + A′5 + A′6 + A′7 three (4-I/p) OR gates
74147 decimal-to-BCD priority encoder
O0 = A′1 + A′3 + A′5 + A′7 + A′9
O1 = A′2 + A′3 + A′6 + A′7 Boolean function & Truth
Table of decimal-to-BCD
O2 = A′4 + A′5 + A′6 + A′7
priority encoder 74147
O3 = A′8 + A′9
Decimal-to-BCD
Switch Encoder
A priority encoder is an encoder circuit that includes
the priority function. The operation of the priority
encoder is such that if two or more inputs are equal to
1 at the same time, the input having the highest
priority will take precedence. The truth table of a four-
input priority encoder is given in Table 4.8 . In
addition to the two outputs x and y , the circuit has a
third output designated by V ; this is a valid bit
indicator that is set to 1 when one or more I/ps = 1
Priority Encoder
x = D2 + D3
y = D3 + D1 D′2
V = D 0 + D 1 + D2 + D3
 MULTIPLEXERS (DATA SELECTORS)
A digital multiplexer or data selector is a logic circuit
that accepts several digital data inputs and selects one
of them at any given time to pass on to the output. The
routing of the desired data input to the output is
controlled by SELECT inputs (often referred to as
ADDRESS inputs)
MULTIPLEXERS (DATA SELECTORS)

A multiplexer is a combinational circuit that selects

binary information from one of many input lines and
directs it to a single output line. The selection of a
particular input line is controlled by a set of selection
lines. Normally, there are 2n input lines and n selection
lines whose bit combinations determine which input is
selected.
Functional diagram of digital
multiplexer (MUX)
Z = I′0S + I1S
Z = I0 . 1 + I1 . 0 = I0 (For S = 0; gate 2 enabled)
Z = I0 . 0 + I1 . 1 = I1 (For S = 1; gate 1 enabled)

Two-input
multiplexer
4-input Mux
8-I/p Mux
 Function Implementation by MUX
Decoder is used to implement Boolean function by
employing external OR gates. A MUX is essentially a
decoder that includes OR gate within the unit. MUXs
are used to implement logic fns directly from a truth
table without need for simplification. When a MUX is
used for this purpose, select inputs are used as logic
variables, & each data input is connected permanently
HIGH or LOW as necessary to satisfy truth table.
Plz Solve Q 9-37 & 9-38, P-663 Tocci, 10th Ed
& 4.31, 4.32, 4.33, 4.34, 4.35, P-186 Mano

MUX implements a logic fn described

by truth table, Z = Σ (1, 2, 7)

P-609 Tocci
A more efficient method for implementing a Boolean
fn of n variables with a MUX that has n - 1 selection
inputs. First n - 1 variables of fn are connected to
selection inputs of MUX. Remaining single variable of
the fn is used for data inputs.
If single variable is denoted by z , each data input of
MUX will be z, z′, 1, or 0. P-160 Mano

Function F(x, y, z) = Σ (1, 2, 6, 7) of 3 variables can be

implemented with a 4-to-1-line MUX as shown in Fig
 Implementing a Boolean function F(x, y, z) =
Σ (1, 2, 6, 7) of 3 variables with a 4-to-1-line MUX
F = x′y′z + x′yz′+ xyz′ + xyz

P-161 Mano
Procedure for implementing any fn of n variables with
a MUX with n - 1 selection I/ps & 2n-1 data I/p lines
follows from previous example. Boolean function is
listed in a truth table. Then first n - 1 variables in table
are applied to selection input lines of MUX. For each
combination of selection variables, we evaluate the
output as a fn of last variable. This function can be 0,
1, variable, or complement of variable. These values
are then applied to Data Input Lines in proper order.
P-161 Mano
Implementing fn F(A, B, C,D) = Σ(1, 3, 4, 11, 12, 13, 14, 15)
of 4-input variables with a 8-to-1-line MUX

P-162 Mano
Two 74HC151s
combined to form
a 16-input Mux
Quad 2-Input MUX(74ALS157/HC157)

Logic diagram
 74ALS157 MUX
Truth table

Logic symbol
Two-to-one-line
multiplexer
(a) Logic diagram
(b) Block diagram
 Four-to-one-line
multiplexer

(a) Logic diagram

(b) Function table

Quadruple
two-to-one-line
multiplexer
 MULTIPLEXER APPLICATIONS
MUX circuits find numerous and varied applications
in data selection, digital systems of all types.

 Data routing

 Operation sequencing

 Parallel-to-serial conversion

 Waveform generation and

 Logic-function generation
DEMULTIPLEXERS (DEMUX)
DATA input is
transmitted to only
one of the outputs
as determined by
select input code
1-Line-to-8-Line
DEMUX

Note: I is data input

Waveforms for a select
code of A2A1A0 = 000
Here, O′0 is identical to
the data input I on E′1
Note: I is data input
 BCD-TO-7-SEGMENT
DECODER/DRIVER

b and c segments
LIQUID-CRYSTAL DISPLAYS

Pg-587, Tocci
 Driving an LCD segment;

(a) Method for driving an LCD

Method for
driving a
7-segment
display

Pg-588, Tocci
2421 & excess‐3 codes are examples of self‐

complementing codes. Such codes have property that

9’s complement of a decimal number is obtained

directly by changing 1’s to 0’s and 0’s to 1’s.

Excess‐3 is an unweighted code in which each

coded combination is obtained from corresponding

binary value plus 3.

8, 4, -2, -1 code is an example of assigning both +ve

and -ve weights to a decimal code.

In this case, bit combination 0110 is interpreted as

decimal 2 and is calculated from

8 × 0 + 4 × 1 + (-2) × 1 + (-1) × 0 = 2
 CODE CONVERTERS
Availability of large variety of codes for same discrete
elements of information results in the use of different
codes by different digital systems. It is sometimes
necessary to use O/p of one system as I/p to another. A
conversion circuit must be inserted between 2 systems
if each uses different codes for same information.
Thus, a code converter is a circuit that makes the two
systems compatible even though each uses a different
binary code. Pg-131, Mano
To convert from binary code A to binary code B, the
input lines must supply the bit combination of
elements as specified by code A and the output lines
must generate the corresponding bit combination of
code B. A combinational circuit performs this
transformation by means of logic gates. The design
procedure will be illustrated by an example that
converts binary coded decimal (BCD) to the excess-3
code for the decimal digits.
Design Procedure: Code Converters
BCD-to-Excess-3 Code Convertor Pg-131
Mano
Implement with 3 or more levels of gates

z = D′

y = CD + C′D′ = CD + (C + D)′

x = B′C + B′D + BC′D′ = B′(C + D) + BC′D′

= B′(C + D) + B(C + D)′

w = A + BC + BD = A + B(C + D)
BCD-to-excess-3
code converter
 Truth Table of
BCD-to-Grey
code converter

In Binary Code
b0 is LSB, b3 is MSB
In Grey Code
g0 is LSB, g3 is MSB
K-Map of g0
K-Map of g1
K-Map of g2
K-Map of g3
Corresponding minimized Boolean
expression for Grey Code bits
Logic Circuit
b0 is LSB,

b3 is MSB

Similarly
g0 is LSB,

g3 is MSB
 Truth Table of
Grey-to-BCD
code converter

In Grey Code
g0 is LSB, g3 is MSB
In Binary Code
b0 is LSB, b3 is MSB
K-Map of b0
K-Map of b1
K-Map of b2
K-Map of b3
Minimized Boolean
expression for BCD
Code bits
g0 is LSB, g3 is MSB Similarly

b0 is LSB, b3 is MSB

Logic Circuit
Even Parity-Generator & Checker Ckts
A transmitter can attach a parity bit to a set of data bits
before transmitting the data bits to a receiver. This
particular example uses a group of four bits as the data
to be transmitted, and it uses an even parity bit. In
Figure (a), the set of data to be transmitted is applied
to the parity-generator circuit, which produces the
even-parity bit, P, at its output.

Pg-149, Tocci
This parity bit is transmitted to receiver along with
original data bits, making a total of five bits. In Fig
(b), these five bits (data + parity) enter receiver’s
parity-checker ckt, which produces an error output, E,
that indicates whether or not a single-bit error has
occurred. Both of these circuits employ XOR gates
when we consider that a single XOR gate operates so
that it produces a 1 o/p if an odd number of its inputs
are 1, and a 0 o/p if an even number of its inputs are 1.
Pg-150, Tocci
Ex 4.19 Tocci Determine the parity generator’s output
for each of the following sets of input data, D3D2D1D0
(a) 0111; (b) 1001; (c) 0000; (d) 0100. Refer to Fig (a)
Ex 4.20 Tocci Determine parity checker’s o/p [Fig (b)]
for each of the following sets of data from transmitter

Pg-151, Tocci
 Odd Function
Ex-OR opn with 3 or more variables can be converted
into an ordinary Boolean fn by replacing the symbol
with its equivalent Boolean expression. A 3-variable
case can be converted to a Boolean expression as