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b24cs089 Coa Practicum

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anupamaa1011
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U24CS103 PRACTICUM-I

A Report on Practicum
titled
“OPTIMIZING MULTIPLICATION IMPLEMENTATION AND
ANALYSIS OF BOOTH’S ALGORITHM”

By
ANUPAMA REDDY.P
B24CS089
Under the guidance of
SMT M.PREETHI
Assistant Professor, Dept. of CSE

KAKATIYA INSTITUTE OF TECHNOLOGY & SCIENCE, WARANGAL


(An Autonomous Institute under Kakatiya University, Warangal)
(2024-25)
Booth’s Algorithm

KAKATIYA INSTITUTE OF TECHNOLOGY & SCIENCE, WARANGAL


(An Autonomous Institute under Kakatiya University, Warangal)

CERTIFICATE

This is to certify that, this is the bonafide record of Practicum entitled OPTIMIZING

MULTIPLICATION IMPLEMENTATION AND ANALYSIS OF BOOTH’S


ALGORITHM in the course Computer Organization and Architecture carried out by
Anupama Reddy.P bearing Roll No. B24CS089, student of B. Tech, CSE, I Semester in partial
fulfilment for the Degree of Bachelor of Technology in Department of COMPUTER SCIENCE
ENGINEERING.

SUPERVISOR/ PRACTICUM COORDINATOR/


HEAD OF THE DEPARTMENT
COURSE TEACHER CLASS TEACHER
P.Niranjan
Smt M.Preethi Dr.MD Sharfuddin Waseem
Professor & Head
Assistant Professor Assistant Professor
Dept. of CSE, KITSW
Dept. of CSE, KITSW Dept. of CSE, KITSW

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Booth’s Algorithm

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Booth’s Algorithm

ACKNOWLEDGEMENT

I wish to express a sense of gratitude to my guide SMT M.PREETHI, Assistant Professor,


Department of Computer Science and Engineering , Kakatiya Institute of Technology & Science,
Warangal, who guided me at every moment during my entire Practicum work and gave valuable
suggestions. Her continuous encouragement at each point of work and effort to push the work
through are grateful and acknowledged.

I sincerely thank the Practicum coordinator, SMT M.PREETHI, Assistant Professor, for
timely coordination.

I am indebted to P. Niranjan , Professor & Head of the Department, Computer Science


engineering. I also extend my gratitude to all the faculty members of the department without whose
support at various stages this report will not be materialized.

Also, I offer my sincere admiration to Prof. K. ASHOKA REDDY, Principal, Kakatiya


Institute of Technology & Science, Warangal for his kind patronage and permission to utilize the
resource of the institute to carry out the work.

Last but not least I wish to thank my friends and seniors who helped me directly or indirectly
in the successful completion of this work.

ANUPAMA REDDY PAPPU


(B24CS089)

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Booth’s Algorithm

CONTENTS

Chapter Page
Chapter Title
No. number

Certificate ii

Acknowledgement iii

1 Overview of the Practicum 1

1.0 Introduction 1

1.1 Literature review 1

1.1.1 Literature Review 1

1.1.2 Research Gaps 2

1.2 Aims and Objectives 2

2 Methodology 3

2.0 Introduction 3

2.1 Block diagram and description 3

Program Code (with comments included to improve


2.2 3
readability)

2.3 Difficulties experienced during programming 5

3 Results 6

3.0 Introduction 6

3.1 Results 6

4 Key Learnings from the Practicum 7

4.0 Conclusions 7

4.1 Recommendations for Future Research 7

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Booth’s Algorithm

CHAPTER 1
Overview of the Practicum
1.0. Introduction
1.1. Booth's algorithm multiplies two signed binary numbers in
two's complement notation. The algorithm was proposed by
A.D Booth in 1951[1]. Booth worked with desk calculators that
were faster at shifting than adding and he employed shift
operation to create his fast algorithm for multiplication. This
algorithm is of interest in the study of computer architecture.
1.2. Literature review
1.1.1. Literature Review:
Booth’s algorithm is based on four steps on binary numbers.
Let the multiplier, multiplicand and partial product be denoted
by M, R and P. In the process an extra 0 is added to the right of
the Lowest Significant Bit (LSB) of M and two multiplier bits
from LSB are checked and depending on their values, R is
added or subtracted from P. At end of each step, one bit of the
multiplier is shifted to the right until it is zero.

Additionally, limited studies have examined how Booth's


Algorithm can be optimized for energy efficiency or integrated
into modern parallel or quantum systems, which presents
opportunities for future research in these areas.
Nonetheless, much of the studies have been dominated by
hardware realizations allowing for little room for assessing the
behaviour of the algorithm in any of the software applications,
or for its amendments to fit new computing systems. Also, few
works have analysed how the Booth's Algorithm can be
improved in terms of the energy consumption or use in

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Booth’s Algorithm

modern parallel or quantum systems, this provides openings


for this research.

1.1.2. Research Gaps:


Another set of such extensions could center on Booth’s
Algorithm: The research in respect to Booth’s Algorithm tends
to be hardware oriented while there are voids in terms of its
implementation at the software level, its energy consumption,
and its integration within modern architectures, such as
parallel or quantum, that are available. Also, relatively little
cross comparison is done with advanced multiplication
methods on current microprocessors.

1.3. Aim and Objectives


The main purpose of this research is to investigate and apply Booth's
Algorithm for signed binary multiplication and compare it to the
conventional ones. The goals include: comprehension of the
principles underlying the algorithm, or, in other words, how it
works, its simulation in a software environment, its performance
evaluation, evaluation of its suitability for existing computing
systems and systems proposed for the future, as well as its merits
and demerits in practical use.

Analysis and implementation of Booth's Algorithm for signed


binary multiplication with the aim to focus on its performance and
advantages over more classical ways of multiplying.

CHAPTER 2

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Booth’s Algorithm

METHODOLOGY
2.0. Introduction
We have made a generalization of Booth’s algorithm for any power
of two, which is accurate and efficient. To develop this we have
noted that the number of required shifts of the partial product is one
less than the number of bits compared in each step; i.e. if the number
of bit of the multiplier is m then the number of shift required to
perform on the partial product is m-1. The total numbers of possible
bits combinations are . In the Booth’s algorithm the total bits
combination of the multiplier can be divided into two parts, each
part with the number 2^m/2=2 ݉m−1.
The main objective is to implement Booth's Algorithm for
signed binary multiplication and compare its effectiveness and
accuracy with traditional methods.

2.1. Block Diagram & Description

A block diagram of Booth's Algorithm includes the


multiplicand (M), multiplier (Q), accumulator (AC), Booth's
register (Q-1), and a control unit. The control unit enables the
arithmetic unit to perform addition, subtraction, and shifting

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Booth’s Algorithm

operations based on the multiplier’s bits until the


multiplication is complete.
2.2. Programming Code
#include <stdio.h>

void boothAlgorithm(int multiplicand, int multiplier, int n) {


int A = 0; // Accumulator
int Q = multiplier; // Multiplier
int Q_1 = 0; // Q-1 register
int M = multiplicand; // Multiplicand
int count = n; // Bit size

while (count > 0) {


// Decision based on Q and Q_1
if ((Q & 1) == 1 && Q_1 == 0) {
A -= M;
} else if ((Q & 1) == 0 && Q_1 == 1) {
A += M;
}

// Arithmetic right shift


Q_1 = Q & 1;
Q = (A & 1) | (Q >> 1);
A >>= 1;

count--;
}

// Result stored in (A and Q)


printf("Result: %d\n", A << n | Q);
}

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Booth’s Algorithm

int main() {
int multiplicand, multiplier;
printf("Enter multiplicand: ");
scanf("%d", &multiplicand);
printf("Enter multiplier: ");
scanf("%d", &multiplier);

int n = 4; // Number of bits (adjustable)


boothAlgorithm(multiplicand, multiplier, n);

return 0;
}
2.3. Difficulties encountered during programming

1. Handling Signed Numbers: Properly managing signed binary


numbers using 2's complement is challenging, especially for
negative values.

2. Shifting and Arithmetic Operations: The algorithm involves


arithmetic right shifts, which must preserve sign bits and ensure
correct operations take place. Sign bits could alter the result if
overlooked.

3. Register Management: Booth's Algorithm involves usingmultiple


registers (Accumulator, Multiplier, and Booth’s Register), and
managing them correctly during shifting is complex. Ensuring the
right value in the right register is key for errorless multiplication.

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Booth’s Algorithm

4. Overflow and Underflow: Fixed-bit representations can lead to


overflow or underflow situations if the bit-length is not chosen
properly.

5. Debugging: Debugging can be problematic due to multiple shifts


and intermediate calculations. It requires careful tracking of each
register's state during the process.

6. Bit-Length Choice: Selecting the correct bit-width is important to


avoid incorrect results, especially with larger or negative numbers.
As they involve more bits and negative numbers involves sign bit.
So, careful planning is required in choosing the bit length.

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Booth’s Algorithm

CHAPTER 3
RESULTS
3.0. Introduction
Objective: To efficiently multiply signed binary numbers by
reducing the number of arithmetic operations (additions and
subtractions) compared to traditional multiplication methods and
ensuring correct handling of negative numbers using 2's
complement representation.
Hypothesis: Booth's Algorithm is more efficient, requiring fewer
number of operations and less computational time, particularly for
numbers with long sequences of 1s.
3.1. Results
User Input Flexibility: The algorithm is designed to handle different
bit lengths, multiplicands, and multipliers, allowing for
customization based on the requirements of the user. By enabling
the specification of the number of bits and accepting signed integers
for both the multiplicand and multiplier, the algorithm can adapt to
various scenarios ensuring versatility and efficiency.

Example Result: Consider multiplying the multiplicand 6 and the


multiplier -3 using Booth's Algorithm with 4 bits. The initial values
are A = 0000, Q = 1101 (for -3 in 2's complement), and Q-1 = 0. After
applying the algorithm's steps, including addition, subtraction, and
arithmetic right shifts, the final product calculated is -18, as expected
from the multiplication of 6 and -3.

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Booth’s Algorithm

CHAPTER 4
CONCLUSION

4.0. Conclusions
The number of operations is reduced and the effective two's
complement of positive and negative numbers are used by Booth's
Algorithm which is an effective method for signed binary
multiplication. This enhances the multiplication especially for
numbers which have a large number of 1's in the binary
representation. This provides an advantage in enhancing the
efficiency of computation both in software and hardware forms.
4.1. Recommendations for Future Research
(Max. 150 words)
Extensions to the Booth algorithm can focus on optimizing for larger
bit lengths and hardware applications such as FPGAs and ASICs
using parallel processing to improve speed and performance. When
used in conjunction with other multiplication techniques It can also
improve efficiency in large-scale computations. Future research
could explore adapting the Booth algorithm for floating point
arithmetic. Improved efficiency in areas such as scientific computing
and machine learning Moreover, integrating it with a cryptographic
system for secure multiplication can further expand its practical
applications.

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Booth’s Algorithm

CHAPTER 5
DEMONSTRATION & PRESENTATION
5.0 Demonstration Presentation
December 18, 2024, at 2:00 p.m. I was shown my practicum at Warangal's
Kakatiya Institute of Technology and Science. There were roughly ten people
present during this segment.

5.1VideoPitch
I have prepared video pitch of my practicum and played during
demonstration to the audience and the supervisor on December 18, 2024.The
video lasts for three minutes and forty seconds.

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Booth’s Algorithm

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