b24cs089 Coa Practicum
b24cs089 Coa Practicum
A Report on Practicum
titled
“OPTIMIZING MULTIPLICATION IMPLEMENTATION AND
ANALYSIS OF BOOTH’S ALGORITHM”
By
ANUPAMA REDDY.P
B24CS089
Under the guidance of
SMT M.PREETHI
Assistant Professor, Dept. of CSE
CERTIFICATE
This is to certify that, this is the bonafide record of Practicum entitled OPTIMIZING
ACKNOWLEDGEMENT
I sincerely thank the Practicum coordinator, SMT M.PREETHI, Assistant Professor, for
timely coordination.
Last but not least I wish to thank my friends and seniors who helped me directly or indirectly
in the successful completion of this work.
CONTENTS
Chapter Page
Chapter Title
No. number
Certificate ii
Acknowledgement iii
1.0 Introduction 1
2 Methodology 3
2.0 Introduction 3
3 Results 6
3.0 Introduction 6
3.1 Results 6
4.0 Conclusions 7
CHAPTER 1
Overview of the Practicum
1.0. Introduction
1.1. Booth's algorithm multiplies two signed binary numbers in
two's complement notation. The algorithm was proposed by
A.D Booth in 1951[1]. Booth worked with desk calculators that
were faster at shifting than adding and he employed shift
operation to create his fast algorithm for multiplication. This
algorithm is of interest in the study of computer architecture.
1.2. Literature review
1.1.1. Literature Review:
Booth’s algorithm is based on four steps on binary numbers.
Let the multiplier, multiplicand and partial product be denoted
by M, R and P. In the process an extra 0 is added to the right of
the Lowest Significant Bit (LSB) of M and two multiplier bits
from LSB are checked and depending on their values, R is
added or subtracted from P. At end of each step, one bit of the
multiplier is shifted to the right until it is zero.
CHAPTER 2
METHODOLOGY
2.0. Introduction
We have made a generalization of Booth’s algorithm for any power
of two, which is accurate and efficient. To develop this we have
noted that the number of required shifts of the partial product is one
less than the number of bits compared in each step; i.e. if the number
of bit of the multiplier is m then the number of shift required to
perform on the partial product is m-1. The total numbers of possible
bits combinations are . In the Booth’s algorithm the total bits
combination of the multiplier can be divided into two parts, each
part with the number 2^m/2=2 ݉m−1.
The main objective is to implement Booth's Algorithm for
signed binary multiplication and compare its effectiveness and
accuracy with traditional methods.
count--;
}
int main() {
int multiplicand, multiplier;
printf("Enter multiplicand: ");
scanf("%d", &multiplicand);
printf("Enter multiplier: ");
scanf("%d", &multiplier);
return 0;
}
2.3. Difficulties encountered during programming
CHAPTER 3
RESULTS
3.0. Introduction
Objective: To efficiently multiply signed binary numbers by
reducing the number of arithmetic operations (additions and
subtractions) compared to traditional multiplication methods and
ensuring correct handling of negative numbers using 2's
complement representation.
Hypothesis: Booth's Algorithm is more efficient, requiring fewer
number of operations and less computational time, particularly for
numbers with long sequences of 1s.
3.1. Results
User Input Flexibility: The algorithm is designed to handle different
bit lengths, multiplicands, and multipliers, allowing for
customization based on the requirements of the user. By enabling
the specification of the number of bits and accepting signed integers
for both the multiplicand and multiplier, the algorithm can adapt to
various scenarios ensuring versatility and efficiency.
CHAPTER 4
CONCLUSION
4.0. Conclusions
The number of operations is reduced and the effective two's
complement of positive and negative numbers are used by Booth's
Algorithm which is an effective method for signed binary
multiplication. This enhances the multiplication especially for
numbers which have a large number of 1's in the binary
representation. This provides an advantage in enhancing the
efficiency of computation both in software and hardware forms.
4.1. Recommendations for Future Research
(Max. 150 words)
Extensions to the Booth algorithm can focus on optimizing for larger
bit lengths and hardware applications such as FPGAs and ASICs
using parallel processing to improve speed and performance. When
used in conjunction with other multiplication techniques It can also
improve efficiency in large-scale computations. Future research
could explore adapting the Booth algorithm for floating point
arithmetic. Improved efficiency in areas such as scientific computing
and machine learning Moreover, integrating it with a cryptographic
system for secure multiplication can further expand its practical
applications.
CHAPTER 5
DEMONSTRATION & PRESENTATION
5.0 Demonstration Presentation
December 18, 2024, at 2:00 p.m. I was shown my practicum at Warangal's
Kakatiya Institute of Technology and Science. There were roughly ten people
present during this segment.
5.1VideoPitch
I have prepared video pitch of my practicum and played during
demonstration to the audience and the supervisor on December 18, 2024.The
video lasts for three minutes and forty seconds.