Von-Neumann Model

Von-Neumann proposed his computer architecture design in 1945 which was later known as Von-Neumann
Architecture. It consisted of a Control Unit, Arithmetic, and Logical Memory Unit (ALU), Registers and
Inputs/Outputs.

Von Neumann architecture is based on the stored-program computer concept, where instruction data and program
data are stored in the same memory. This design is still used in most computers produced today.

A Von Neumann-based computer:

o Uses a single processor

o Uses one memory for both instructions and data.

o Executes programs following the fetch-decode-execute cycle

Components of Von-Neumann Model:

o Central Processing Unit

o Buses

o Memory Unit
 Central Processing Unit

The part of the Computer that performs the bulk of data processing operations is called the Central Processing Unit
and is referred to as the CPU.

The Central Processing Unit can also be defined as an electric circuit responsible for executing the instructions of a
computer program.

The CPU performs a variety of functions dictated by the type of instructions that are incorporated in the computer.

The major components of CPU are Arithmetic and Logic Unit (ALU), Control Unit (CU) and a variety of

registers.

Arithmetic and Logic Unit (ALU)

The Arithmetic and Logic Unit (ALU) performs the required micro-operations for executing the instructions. In
simple words, ALU allows arithmetic (add, subtract, etc.) and logic (AND, OR, NOT, etc.) operations to be carried
out.

Control Unit

The Control Unit of a computer system controls the operations of components like ALU, memory and input/output
devices.

The Control Unit consists of a program counter that contains the address of the instructions to be fetched and an
instruction register into which instructions are fetched from memory for execution.

Registers

Registers refer to high-speed storage areas in the CPU. The data processed by the CPU are fetched from the registers.

Registers Description

MAR (Memory Address Register) This register holds the memory location of the data that needs to be accessed.

MDR (Memory Data Register) This register holds the data that is being transferred to or from memory.

AC (Accumulator) This register holds the intermediate arithmetic and logic results.

PC (Program Counter) This register contains the address of the next instruction to be executed.

CIR (Current Instruction Register) This register contains the current instruction during processing.
Following is the list of registers that plays a crucial role in data processing.

Buses

Buses are the means by which information is shared between the registers in a multiple-register configuration
system.
Memory Unit

A memory unit is a collection of storage cells together with associated circuits needed to transfer information in and
out of the storage. The memory stores binary information in groups of bits called words. The internal structure of a
memory unit is specified by the number of words it contains and the number of bits in each word.

Two major types of memories are used in computer systems:

1. RAM (Random Access Memory)

2. ROM (Read-Only Memory)

Instruction Fields:
OP-code field - specifies the operation to be performed.
Address field - designates memory address(s) or a processor register(s).
Mode field - specifies the way the operand or the effective address is determined
Address field: Three Address Instructions, Two Address Instructions, One Three Address Instructions,
Zero Address Instructions.
1. Three Address Instructions –
This has three address field to specify a register or a memory location. Program created are much
short in size but number of bits per instruction increase.

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

ADD R1, A, B R1 = M[A] + M[B]

ADD R2, C, D R2 = M[C] + M[D]

MUL X, R1, R2 M[X] = R1 * R2

2. Two Address Instructions –

This is common in commercial computers. Here two address can be specified in the instruction.

Here destination address can also contain operand.

Expression: X = (A+B)*(C+D)
 R1, R2 are registers
M[] is any memory location

MOV R1, A R1 = M[A]

ADD R1, B R1 = R1 + M[B]

MOV R2, C R2 = C

ADD R2, D R2 = R2 + D

MUL R1, R2 R1 = R1 * R2

MOV X, R1 M[X] = R1
3. One Address Instructions –
This use a implied ACCUMULATOR register for data manipulation. One operand is in
accumulator and other is in register or memory location. Implied means that the CPU already
know that one operand is in accumulator so there is no need to specify it.

Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location

LOAD A AC = M[A]

ADD B AC = AC + M[B]

STORE T M[T] = AC

LOAD C AC = M[C]

ADD D AC = AC + M[D]

MUL T AC = AC * M[T]

STORE X M[X] = AC
 4. Zero Address Instructions –

A stack based computer do not use address field in instruction.To evaluate a expression first it is
converted to revere Polish Notation i.e. Post fix Notation.
Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location

PUSH A TOP = A

PUSH B TOP = B

ADD TOP = A+B

PUSH C TOP = C

PUSH D TOP = D

ADD TOP = C+D

MUL TOP = (C+D)*(A+B)

POP X M[X] = TOP

CPU ORGANIZATIONS

1. Single Accumulator organization

2. General register organization

3. Stack organization
 1. Single Accumulator Organization

The computers, present in the early days of computer history, had accumulator based CPUs. In this type
of CPU organization, the accumulator register is used implicitly for processing all instructions of a
program and store the results into the accumulator. The instruction format that is used by this CPU
Organisation is One address field. Due to this the CPU is known as One Address Machine.
The main points about Single Accumulator based CPU Organisation are:
1. In this CPU Organization, the first ALU operand is always stored into the Accumulator and the
second operand is present either in Registers or in the Memory.
2. Accumulator is the default address thus after data manipulation the results are stored into
the accumulator.
3. One address instruction is used in this type of organization.
The format of instruction is: Opcode + Address
Opcode indicates the type of operation to be performed.
Mainly two types of operation are performed in single accumulator based CPU organization:
1. Data transfer operation –
In this type of operation, the data is transferred from a source to a destination.
For ex: LOAD X, STORE Y
Here LOAD is memory read operation that is data is transfer from memory to accumulator and
STORE is memory write operation that is data is transfer from accumulator to memory.
1. ALU operation –
In this type of operation, arithmetic operations are performed on the data.
For ex: MULT X
where X is the address of the operand. The MULT instruction in this example performs the
operation,
AC <-- AC * M[X]
AC is the Accumulator and M[X] is the memory word located at location X.
This type of CPU organization is first used in PDP-8 processor and is used for process control and
laboratory applications. It has been totally replaced by the introduction of the new general register
based CPU.
Advantages –
 One of the operands is always held by the accumulator register. This results in short instructions
and less memory space.
 Instruction cycle takes less time because it saves time in instruction fetching from memory.
Disadvantages –
 When complex expressions are computed, program size increases due to the usage of many
short instructions to execute it. Thus memory size increases.
 As the number of instructions increases for a program, the execution time increases.

2. General Register organization

Generally CPU has seven general registers. Register organization show how registers are selected and how data flow
between register and ALU. A decoder is used to select a particular register.The output of each register is connected
to two multiplexers to form the two buses A and B. The selection lines in each multiplexer select the input data for
the particular bus.
The A and B buses form the two inputs of an ALU. The operation select lines decide the micro operation to be
performed by ALU. The result of the micro operation is available at the output bus. The output bus connected to the
inputs of all registers, thus by selecting a destination register it is possible to store the result in it.

A bus organization for seven CPU register:

Register and multiplexer input selection code:

SEL-D or
Binary code SELA SELB SEL-REG

000 Input Input ---

001 R1 R1 R1

010 R2 R2 R2

011 R3 R3 R3

100 R4 R4 R4

101 R5 R5 R5

110 R6 R6 R6
111 R7 R7 R7

Encoding of ALU Operations:

OPR Select Operation Symbol

00000 Transfer A TSFA

00001 Increment A INCA

00010 Add A + B ADD

00101 Subtract A – B SUB

00110 Decrement A DECA

01000 ADD A and B AND

01010 OR A and B OR

01100 XOR A and B XOR

01110 Complement A COMA

10000 Shift right A SHRA

11000 Shift left A SHLA

 EXAMPLE:

• To perform the operation R3 = R1+R2 We have to provide following binary selection variable to the select inputs.

1. SEL A : 001 -To place the contents of R1 into bus A.

2. SEL B : 010 - to place the contents of R2 into bus B
3. SEL OPR : 00010 – to perform the arithmetic addition (A+B)
4. SEL D : 011 – to place the result available on output bus in R3.

Control Word:

The combined value of a binary selection inputs specifies the control word.
• It consist of four fields SELA, SELB, and SELD or SELREG contains three bit each and SELOPR field contains
five bits thus the total bits in the control word are 14-bits.

SEL A SELB SELD SELOPR

FORMATE OF CONTROL WORD

CONTROL WORD FOR OPERATION R2 = R1+R3

SEL -
SEL A SEL B SEL- D OPR

001 011 010 00010

3. Stack organization:
Stack is also known as the Last In First Out (LIFO) list. It is the most important feature in the CPU. It saves data
such that the element stored last is retrieved first. A stack is a memory unit with an address register. This register
influence the address for the stack, which is known as Stack Pointer (SP). The stack pointer continually influences
the address of the element that is located at the top of the stack.
It can insert an element into or delete an element from the stack. The insertion operation is known as push operation
and the deletion operation is known as pop operation. In a computer stack, these operations are simulated by
incrementing or decrementing the SP register.
Register Stack
The stack can be arranged as a set of memory words or registers. Consider a 64-word register stack arranged as
displayed in the figure. The stack pointer register includes a binary number, which is the address of the
element present at the top of the stack. The three-element A, B, and C are located in the stack.

The element C is at the top of the stack and the stack pointer holds the address of C that is 3. The top element is
popped from the stack through reading memory word at address 3 and decrementing the stack pointer by 1. Then, B
is at the top of the stack and the SP holds the address of B that is 2. It can insert a new word, the stack is pushed by
incrementing the stack pointer by 1 and inserting a word in that incremented location.
Therefore, when the stack is full, the one-bit register ‘FULL’ is set to 1. If the stack is null, then the one-bit register
‘EMTY’ is set to 1. The data register DR holds the binary information which is composed into or readout of the
stack.

First, the SP is set to 0, EMTY is set to 1, and FULL is set to 0. Now, as the stack is not full (FULL = 0), a new
element is inserted using the push operation.

The push operation is executed as follows −

SP←SP + 1 It can increment stack pointer

K[SP] ← DR It can write element on top of the stack

If (SP = 0) then (FULL ← 1) Check if stack is full

EMTY ← 0 Mark the stack not empty

The stack pointer is incremented by 1 and the address of the next higher word is saved in the SP. The word from DR
is inserted into the stack using the memory write operation. The first element is saved at address 1 and the final
element is saved at address 0. If the stack pointer is at 0, then the stack is full and ‘FULL’ is set to 1. This is the
condition when the SP was in location 63 and after incrementing SP, the final element is saved at address 0. During
an element is saved at address 0, there are no more empty registers in the stack. The stack is full and the ‘EMTY’ is
set to 0.
A new element is deleted from the stack if the stack is not empty (if EMTY = 0).

The pop operation includes the following sequence of micro-operations −

DR←K[SP] It can read an element from the top of the stack

SP ← SP – 1 It can decrement the stack pointer

If (SP = 0) then (EMTY ← 1) Check if stack is empty

FULL ← 0 Mark the stack not full

The top element from the stack is read and transfer to DR and thus the stack pointer is decremented. If the stack
pointer reaches 0, then the stack is empty and ‘EMTY’ is set to 1. This is the condition when the element in location
1 is read out and the SP is decremented by 1.