Computer Architecture
Computer Architecture
Instruction Set Architecture (ISA) is the abstract image of a computing system that is seen by
a machine language (or assembly language) programmer, including the instruction set, memory
address modes, processor registers, and address and data formats.
System Design which includes all of the other hardware components within a computing
system such as:
1. System interconnects such as computer buses and switches.
2. Memory controllers and hierarchies.
3. CPU off-load mechanisms such as direct memory access.
4. Issues like Multi-Processing.
GLOBAL SYSTEM STRUCTURE: At this level general system structures, major hardware
components, and system components are defined. These components may include:
I. Processors
II Control modules
III. Memory modules
IV. Interconnection structure
The descriptions is largely made by static description -- “black box” approach
At this level of computer description, the tool commonly used is the Flynn’s Taxonomy The
Flynn’s taxonomy is the most universally excepted method of classifying computer systems. It
relies on a block diagram approach and was published in the Proceedings of the IEEE in 1966 It
postulates that any computer can be placed in one of 4 broad categories
i. SISD: Single Instruction stream, Single Data stream. In this category there is only
one data stream emanating from the data storage and this stream is handled by single
instruction signal emanation from the control unit. In this case there is just one processing
node.
ii SIMD: Single Instruction stream, Multiple Data streams. In this category there are
multiple data stream emanating from a group of data storage or various data storages or
locations. These streams are handled by a single instruction stream from the control unit
signal. In most cases, this architecture has more than one processing node.
iii. MIMD: Multiple instruction streams, multiple data streams. In this category there are
multiple data stream for multiple for a instruction stream. However the number of
instruction stream may not be the same as the number of data stream. So also the number
of processing nodes may be different
iv MISD: Multiple Instruction streams, Single Data stream.: In this case there is a
single
data stream for multiple instruction stream. The number of processing node corresponds to
the number of instruction stream.
Other global level tool include Processor-memory-switch notation of [BeN71] uses block
diagrams with 7 basic component types
PROCESSOR LEVEL: At this level, the operation of the global level components and their
interfaces must be defined. The Architectural Features are specified. These features include
i. Interfaces
ii Instruction sets
iii Data Representation
iv. Memory accessing
Also at this level more detailed individual component specification is made. Specification
at this level takes the appearance of a software program which permits direct simulation
of the machine’s operation
Typical tool used at this level is the ISP (Instruction Set Processor)
REGISTER LEVEL: At the register level, the internal of processor-level operation are
specified. Also the definition of the actual hardware of the system in terms of data flow (at the
word (register) level) and the associated control mechanisms are made. The primitive
descriptions at this level may include:
I Registers description
II. Counters description
III Memories description
IV ALUs description
V. Clocks description
VII. Combinational logic description
The tool used at this level include Any number of “hardware design languages” (CDLs,
HDLs, and RTLs)
GATE LEVEL At this level the gates are primitive elements. The specifications of the
primitive
operations at individual bit level are made. The description at this level is very cumbersome to do
manually (logic minimization, etc.)
At the gate level, descriptive tools rely on combinational and sequential design techniques. To
specify a complete computer system at this level is a staggering task and always very difficult.
There have been Current automated design tools that have replaced the manual methods of state
tables, truth tables, etc