MODULE - V

Digital Systems

12/1/2022 1
 Contents
➢ Binary arithmetic and Number base
conversion
➢ Boolean algebra
➢ K-maps
➢ Logic gates
➢ Design of basic combinational circuits:
adders
➢ Multiplexers, de-multiplexers

12/1/2022 2
 What is signal
➢ A signal is a function that conveys information about the behavior or
attributes of some phenomenon.
➢ In the physical world, any quantity exhibiting variation in time or
variation in space (such as an image) is potentially a signal that might
provide information on the status of a physical system, or convey a
message between observers, among other possibilities.
➢ The term "signal" includes, among others, audio, video, speech, image,
communication, geophysical, sonar, radar, medical and musical
signals.
➢ Types : Analog Signal & Digital Signal

12/1/2022 3
 Analog Signals
•Analog signal is a continuous signal which represents physical
measurements (voltage, current, or meter movement).
•Uses continuous range of values to represent information
•Example :Human voice in air, analog electronic devices.

12/1/2022 4
 Digital Signals
•A digital signal, on the other hand, can take only a finite number of
values.
•Digital signals are discrete time signals generated by digital modulation.
•Uses discrete or discontinuous values to represent information
•Example :Computers, CDs, DVDs, and other digital electronic devices.

12/1/2022 5
 Digital Signals

➢ Digital Signals have two basic states:

1 (logic “high”, or H, or “on”)
0 (logic “low”, or L, or “off”)

➢ Digitalvalues are in a binary format.

Binary means 2 states.

➢A good example of binary is a light (only

on or off)
 Binary Signal

The most common digital signals are binary signals. A binary

signal is a signal that can take only one of two discrete values and is
therefore characterized by transitions between two states.

12/1/2022 7
 Binary as a Voltage

Voltages are used to represent logic values:

A voltage present (called Vcc or Vdd) = 1

Zero Volts or ground (called gnd or Vss) = 0

A simple switch can provide a logic high or a logic

low.

8
 A Simple Switch

➢ Here is a simple switch used to provide a

logic value:

Vcc Vcc

Vcc, or 1 Gnd, or 0

There are other ways to connect a switch.

Analog continuous Digital discrete (step by step)

Analog Vs Digital

12/1/2022 10
 Number Systems

➢ Common Number Systems

Used by Used in
System Base Symbols humans? computers?
Decimal 10 0, 1, … 9 Yes No
Binary 2 0, 1 No Yes
Octal 8 0, 1, … 7 No No
Hexa- 16 0, 1, … 9, No No
decimal A, B, … F

12/1/2022 11
 Quantities/Counting (1 of 3)
Hexa-
Decimal Binary Octal decimal
0 0 0 0
1 1 1 1
2 10 2 2
3 11 3 3
4 100 4 4
5 101 5 5
6 110 6 6
7 111 7 7
12/1/2022 12
 Quantities/Counting (2 of 3)

Hexa-
Decimal Binary Octal decimal
8 1000 10 8
9 1001 11 9
10 1010 12 A
11 1011 13 B
12 1100 14 C
13 1101 15 D
14 1110 16 E
15 1111 17 F
12/1/2022 13
 Quantities/Counting (3 of 3)
Hexa-
Decimal Binary Octal decimal
16 10000 20 10
17 10001 21 11
18 10010 22 12
19 10011 23 13
20 10100 24 14
21 10101 25 15
22 10110 26 16
23 10111 27 17
Etc.

12/1/2022 14
 Conversion Among Bases

➢ The possibilities:

Decimal Octal
10 8

Binary
2

Binary Hexadecimal
2 16

12/1/2022 15
 Decimal to Binary
Decimal to Octal
Decimal to Hexadecimal

Binary to Decimal
Binary to Octal
Binary to Hexadecimal

Octal to Decimal
Octal to Binary
Octal to Hexadecimal

Hexadecimal to Decimal
Hexadecimal to Binary
Hexadecimal to Octal

12/1/2022 16
 Decimal to Binary

➢ Base10 to Base 2
➢ Technique
⚫ Divide by two, keep track of the remainder
⚫ First remainder is bit 0 (LSB, least-significant bit)
⚫ Second remainder is bit 1
⚫ Etc.

12/1/2022 17
P 1 Example
2 125

12510 = ?2 2 62 1

2 31 0

2 15 1

2 7 1

2 3 1

2 1 1
0 1

12510 = 011111012

12/1/2022 18
 Decimal to Octal

➢ Base10 to Base 8
➢ Technique
⚫ Divide by 8
⚫ Keep track of the remainder

12/1/2022 19
P 2 Example

123410 = ?8

8 1234
8 154 2

8 19 2
2 3
8
0 2

123410 = 23228

12/1/2022 20
 Decimal to Hexadecimal

➢ Base10 to Base 16
➢ Technique
⚫ Divide by 16
⚫ Keep track of the remainder

12/1/2022 21
P3 Example

123410 = ?16
16 1234
16 77 2
4 13 = D
16
0 4

123410 = 4D216

12/1/2022 22
 Binary to Decimal

➢ Base2 to Base 10
➢ Technique
⚫ Multiply each bit by 2n, where n is the “weight” of
the bit
⚫ The weight is the position of the bit, starting from
0 on the right
⚫ Add the results

12/1/2022 23
P4
Example
Bit “0”

1010112 => 1 x 20 = 1
1 x 21 = 2
0 x 22 = 0
1 x 23 = 8
0 x 24 = 0
1 x 25 = 32
4310

12/1/2022 24
 Binary to Octal

➢ Base2 to Base 8
➢ Technique
⚫ Group bits in threes, starting on right
⚫ Convert to octal digits

12/1/2022 25
P5 Example

10110101112 = ?8

1 011 010 111

1 3 2 7

10110101112 = 13278

12/1/2022 26
 Binary to Hexadecimal

➢ Base2 to Base 16
➢ Technique
⚫ Group bits in fours, starting on right
⚫ Convert to hexadecimal digits

12/1/2022 27
 P6 Example

10101110112 = ?16

10 1011 1011

2 B B

10101110112 = 2BB16

12/1/2022 28
 Octal to Decimal

➢ Base8 to Base 10
➢ Technique
⚫ Multiply each bit by 8n, where n is the “weight” of
the bit
⚫ The weight is the position of the bit, starting from
0 on the right
⚫ Add the results

12/1/2022 29
 P7 Example

7248 => 4 x 80 = 4
2 x 81 = 16
7 x 82 = 448
46810

12/1/2022 30
 Octal to Binary

➢ Base8 to Base 2
➢ Technique
⚫ Convert each octal digit to a 3-bit equivalent
binary representation

12/1/2022 31
P8 Example

7058 = ?2

7 0 5

111 000 101

7058 = 1110001012

12/1/2022 32
 Octal to Hexadecimal

➢ Base8 to Base 16
➢ Technique
⚫ Use binary as an intermediary

12/1/2022 33
P9 Example

10768 = ?16
1 0 7 6

001 000 111 110

2 3 E
10768 = 23E16

12/1/2022 34
 Hexadecimal to Decimal

➢ Base16 to Base 10
➢ Technique
⚫ Multiply each bit by 16n, where n is the “weight”
of the bit
⚫ The weight is the position of the bit, starting from
0 on the right
⚫ Add the results

12/1/2022 35
P 10 Example

ABC16 => C x 160 = 12 x 1 = 12

B x 161 = 11 x 16 = 176
A x 162 = 10 x 256 = 2560
274810

12/1/2022 36
 Hexadecimal to Binary

➢ Base16 to Base 2
➢ Technique
⚫ Convert each hexadecimal digit to a 4-bit
equivalent binary representation

12/1/2022 37
P 11 Example

10AF16 = ?2

1 0 A F

0001 0000 1010 1111

10AF16 = 00010000101011112

12/1/2022 38
 Hexadecimal to Octal

➢ Base16 to Base 8
➢ Technique
⚫ Use binary as an intermediary

12/1/2022 39
P 12 Example

1F0C16 = ?8 1 F 0 C

0001 1111 0000 1100

1 7 4 1 4

1F0C16 = 174148

12/1/2022 40
P 13 Exercise – Convert ...
Hexa-
Decimal Binary Octal decimal
33
1110101
703
1AF

Skip answer Answer

12/1/2022 41
P 13
Exercise – Convert …
Answer

Hexa-
Decimal Binary Octal decimal
33 100001 41 21
117 1110101 165 75
451 111000011 703 1C3
431 110101111 657 1AF

12/1/2022 42
 Fractions

➢ Binary to decimal
P 14 10.1011 => 1 x 2-4 = 0.0625
1 x 2-3 = 0.125
0 x 2-2 = 0.0
1 x 2-1 = 0.5
0 x 20 = 0.0
1 x 21 = 2.0
2.6875
 Fractions
➢ Decimal to binary
.14579
x 2
P 15 3.14579 0.29158
x 2
0.58316
x 2
1.16632
x 2
0.33264
x 2
0.66528
x 2
1.33056
11.001001... etc.

p. 50
P 16 Exercise – Convert ...

Hexa-
Decimal Binary Octal decimal
29.8
101.1101
3.07
C.82
P 16 Exercise –Answer
Convert …

Hexa-
Decimal Binary Octal decimal
29.8 11101.110011… 35.63… 1D.CC…
5.8125 101.1101 5.64 5.D
3.109375 11.000111 3.07 3.1C
12.5078125 1100.10000010 14.404 C.82
 Example problems

P 17

P 18

12/1/2022 47
P 19

P 20

12/1/2022 48
 Multiplication and Division

12/1/2022 49
 Addition and Subtraction
P 21

P 22

12/1/2022 50
 Complements and
Negative Numbers
Two types of complements are used with binary numbers:
the one’s complement and the two’s complement.

P 23

P 24

12/1/2022 51
 P 25

P 26

12/1/2022 52
12/1/2022 53
 Subtraction by Two’s complement
The operation is carried out by means of the following steps:
➢ (i) First, 2’s complement of the subtrahend is found.
➢ (ii) Then it is added to the minuend.
➢ (iii) If the final carry over of the sum is 1, it is dropped and the result
is written as it is and is positive
➢ (iv) If there is no carry over, the two’s complement of the sum will be
the result and it is negative.

P 27
. Example : (i) 110110 - 10110
➢ Solution:
➢ The numbers of bits in the subtrahend is 5 while that of minuend is
6. We make the number of bits in the subtrahend equal to that of
minuend by taking a `0’ in the sixth place of the subtrahend.

12/1/2022 54
 ➢ Now, 2’s complement of 010110 is (101101 + 1) i.e.101010. Adding
this with the minuend.
➢ 110110 Minuend
101010 2’s complement of subtrahend
Carry over 1 100000 Result of addition

➢ After dropping the carry over we get the result of subtraction to be

100000.

P 28 Example (ii) 10110 – 11010

➢ Solution:
➢ 2’s complement of 11010 is (00101 + 1) i.e. 00110. Hence
➢ Minued - 10110
2’s complement of subtrahend - 0 0 1 1 0
Result of addition - 11100

➢ As there is no carry over, the result of subtraction is negative and is

obtained by writing the 2’s complement of 11100 i.e.(00011 + 1) or
00100.
➢ Hence the difference is – 100. 55
Logic, Logic gates and Logic Circuit
➢ Logic: There are only 2 values associated with a statement or
computation, ie Ture(T) or False (F)
Ex: Statement A: Today is a nice day = F
Statement B : This is a class of bright students = T

➢ Logic gates: Logic gates carry out logical operations on

single or multiple binary inputs and give one binary output. In
simple terms, logic gates are the electronic circuits in a digital
system. Each logic gate performs a different logic function

➢ Logic Circuits : A collection of individual logic gates connect

with each other and produce a logic design known as a Logic
Circuit
➢
12/1/2022 56
 Truth Table
Analysis of logic functions, that is, functions of logical (Boolean)
variables, can be carried out in terms of truth tables. A truth table is a
listing of all the possible values each of the Boolean variables can take,
and of the corresponding value of the function.

The rules that define a logic function are often represented in tabular
form by means of a truth table

12/1/2022 57
 Basic Logic gates
➢ The following are the three basic gates:
⚫ NOT
⚫ AND
⚫ OR

12/1/2022 58
 NOT Gate
➢ The simplest form of a digital logic circuit is the inverter
or the NOT gate
➢ It consists of one input and one output and the input can
only be binary numbers namely; 0 and 1
➢ The algebraic output expression of the NOT gate is
Y=A
The truth table for NOT Gate:

59
 AND Gate
➢ The AND gate is a logic circuit that has two or more
inputs and a single output
➢ The operation of the gate is such that the output of the
gate is a binary 1 if and only if all inputs are binary 1
➢ Similarly, if any one or more inputs are binary 0, the
output will be binary 0.
➢ The algebraic output expression of the AND gate is
Y = A.B

60
 OR Gate
➢ The OR gate is another basic logic gate
➢ Like the AND gate, it can have two or more inputs and a
single output
➢ The operation of OR gate is such that the output is a
binary 1 if any one or all inputs are binary 1 and the
output is binary 0 only when all the inputs are binary 0
➢ The algebraic output expression of the OR gate is
Y = A+B

61
 NAND Gate
➢ The term NAND is a contraction of the
expression NOT-AND gate
➢ A NAND gate, is an AND gate followed by an
inverter
➢ The algebraic output expression of the NAND
gate is Y = A.B

62
 NOR Gate
➢ The term NOR is a contradiction of the
expression NOT-OR
➢ A NOR gate, is an OR gate followed by an
inverter
➢ The algebraic output expression of the NOR
gate is Y = A + B

63
 EXOR Gate
➢ The Ex-OR (Exclusive- OR) gate returns high output with one of two
high inputs (but not with both high inputs or both low inputs)
➢ For example, if both the inputs are binary 0 or 1, it will return the
output as 0. Similarly, if one input is binary 1 and another is binary 0,
the output will be 1 (high)
➢ The operation for the Ex-OR gate is denoted by encircled plus
symbol
➢ The algebraic output expression of the Ex-OR gate is Y = A ⊕ B =

64
 EXNOR Gate
➢ The Ex-NOR (Exclusive- NOR) gate is a circuit that returns low
output with one of two high inputs (but not with both high inputs)
➢ For example, if both the inputs are binary 0 or 1, it will return the
output as 1. Similarly, if one input is binary 1 and another is binary 0,
the output will be 0 (low)
➢ The symbol for the Ex-NOR gate is denoted by encircled plus
symbol which inverts the binary values
➢ The algebraic output expression of the Ex-NOR gate is Y =

65
 Applications of Logic Gates
➢ The following are some of the applications of Logic
gates:
⚫ Build complex systems that can be used to different
fields such as
• Genetic engineering,
• Nanotechnology,
• Industrial Fermentation,
• Metabolic engineering and
• Medicine
⚫ Construct multiplexers, adders and multipliers.
⚫ Perform several parallel logical operations
⚫ Used for a simple house alarm or fire alarm or in the
circuit of automated machine manufacturing industry

66
 BOOLEAN ALGEBRA
➢ The complex logical operations
performed by any digital instrument,
be it a simple digital voltmeter or a
sophisticated computer, are based on a
system of symbolic concepts known as
boolean algebra, named after George
Boole, who began publishing the
algebra of logic in 1847.

➢ It is a convenient way and systematic

way of expressing and analyzing the
operation of logic
➢ circuits
12/1/2022 67
 BOOLEAN ALGEBRA
A set of rules to perform logical addition and multiplication

The basis of Boolean algebra lies in the operations of logical

addition, or the OR operation; and logical multiplication, or the
AND operation. Both of these find a correspondence in simple
logic gates.
The variables in a Boolean, or logic, expression can take only one
of two values, usually represented by the numbers 0 and 1.
These variables are sometimes referred to as true (1) and false
(0). This convention is normally referred to as positive logic.
There is also a negative logic convention in which the roles of
logic 1 and logic 0 are reversed.

12/1/2022 68
12/1/2022 69
Annulment Law – A term AND´ed with a “0” equals 0 or OR´ed with a
“1” will equal 1
A . 0 = 0 A variable AND’ed with 0 is always equal to 0
A + 1 = 1 A variable OR’ed with 1 is always equal to 1

Identity Law – A term OR´ed with a “0” or AND´ed with a “1” will
always equal that term
A + 0 = A A variable OR’ed with 0 is always equal to the variable
A . 1 = A A variable AND’ed with 1 is always equal to the variable

Idempotent Law – An input that is AND´ed or OR´ed with itself is

equal to that input
A + A = A A variable OR’ed with itself is always equal to the variable
A . A = A A variable AND’ed with itself is always equal to the variable

Complement Law – A term AND´ed with its complement equals “0”

and a term OR´ed with its complement equals “1”
A . A’ = 0 A variable AND’ed with its complement is always equal to 0
A + A’ = 1 A variable OR’ed with its complement is always equal to 1

12/1/2022 71
12/1/2022 72
Absorbtion law - Proof

X + X.Y = X (Y+Y’) + XY = XY +XY’ + XY = XY + XY’ = X

or

X’ + X.Y = X’ (1+Y) + XY = X’ +X’Y + XY = X’ + Y

12/1/2022 73
Simplification of Boolean functions

➢ Algebric simplification
➢ K-Map simplification
➢ Quine-McLusky Method of simplification

12/1/2022 74
P 29

12/1/2022 75
P 30

Simplify:

12/1/2022 76
P 31

P 32

12/1/2022 77
P 33 Simplify

F= ABC’ + AB’C + A’BC + ABC

Since X+X = X, ABC can be repeated many times

= ABC’ + ABC + AB’C + ABC + A’BC+ABC

= AB(C’+C) + AC(B’+B) + BC(A’+A)
= AB+ AC+BC

12/1/2022 78
 De Morgan’s theorems
➢ While George Boole’s set of laws and rules allows us to
analyze and simplify a digital circuit, there are two laws
within his set that are attributed to Augustus De Morgan
(a nineteenth century English mathematician) which
views the logical NAND and NOR operations as separate
NOT AND and NOT OR functions respectively.
➢ DeMorgan's theorems provide mathematical verification
of the equivalency of the NAND and negative-OR gates
and the equivalency of the NOR and negative-AND gates.
➢ Any logic function can be implemented using only OR
and NOT gates or using only AND and NOT gates.
12/1/2022 79
 De Morgan’s theorems

or

or

DeMorgan's first theorem is stated as follows:

The complement of two or more ORed variables is equivalent to
the AND of the complements of the individual variables,

DeMorgan's Second theorem is stated as follows:

The complement of two or more ANDed variables is equivalent
to the OR of the complements of the individual variables.
12/1/2022 80
12/1/2022 81
12/1/2022 82
 De Morgan’s Shortcut
➢ BREAK THE LINE, CHANGE THE SIGN
➢ Break the LINE over the two variables,
➢ and change the SIGN directly under the line.

For Theorem 1, break the line, and

change the OR function to an AND
function.
Be sure to keep the lines over the variables.

For Theorem 2, break the line, and

change the AND function to an OR
function.
Be sure to keep the lines over the variables.
12/1/2022 83
 De Morgan’s Equivalent gates

12/1/2022 84
P 34 Realize XY + X’Y’ using

i) AND and NOT gates only

ii) OR and NOT gates only

Step-1: Realization of XY + X’Y’

12/1/2022 85
Step-2: Replace the OR gate by AND and NOT.

OR is changed to AND using

De Morgan’s theorem

12/1/2022 86
P 35

12/1/2022 87
P 36 Determine the Boolean expression for the logic circuit shown in Fig.
Simplify the Boolean expression using Boolean Laws and De
Morgan’s theorem. Redraw the logic circuit using the simplified
Boolean expression.

P 37 Prove the following Boolean identity :

12/1/2022 88
P 38 Simplify the following Boolean expression and draw the logic
circuits for the simplified expressions.

(a) (ABC+ABC+ABC+BC ) (b) B(A+C)+C(A+B)+AC

(c) (AB + C) (AB + D)
a)

b) C+AB’
c) AB+CD

P 39

12/1/2022 89
P 40 Simplify
F= ((AB)’ + (AC)’)’

Using De Morgan’s Theorem

F= ((AB)’ + (AC)’)’
= (AB)’’ . (AC)’’
= (AB).(AC)
= A.B.C

P 41 Simplify

1) F= (A+B).(A+B)’ = 0

2) F= A.B + (A.B)’ = 1

3) F= (A+B.C’).(A+B.C’) =A+B

12/1/2022 90
 Different forms of expressing
Boolean function

➢ A Boolean function specified by a truth table can be expressed

algebraically in many different ways. Two ways of forming
Boolean expressions are
➢ Canonical forms and
➢ Non- Canonical forms.

12/1/2022 91
 SOP form
➢ Sum Of Product Form:

➢ The canonical SoP form for Boolean function of truth table are
obtained by ORing the ANDed terms corresponding to the 1’s
in the output column of the truth table

➢ The product terms also known as minterms are formed by

ANDing the complemented and uncomplemented variables in
such a way that the 0 in the truth table is represented by a
complement of variable 1 in the truth table is represented by a
variable itself.

12/1/2022 92
12/1/2022 93
 POS form
➢ Product Of Sum Form:

➢ The canonical PoS form for Boolean function of truth table are
obtained by ANDing the ORed terms corresponding to the 0’s
in the output column of the truth table

➢ The product terms also known as Maxterms are formed by

ORing the complemented and uncomplemented variables in
such a way that the 1 in the truth table is represented by a
complement of variable 0 in the truth table is represented by a
variable itself.

12/1/2022 94
12/1/2022 95
P 42

output function

Proof: Z = X’Y + X (Y+Y’) = X’Y + X

= X’Y + X (1+Y)
= X + Y(X+X’)
= X+Y

12/1/2022 96
P 43 If the output is high for Row No. 3, 4, 5, 6, 7 , What is the
expression of logical function?. Also find the minimized
expression

f = A`BC+(C`+C)AB`+AB(C`+C)

f = A`BC+AB`+AB

f = A`BC+A f = A+BC

12/1/2022 97
P 44 Determine the logic expression for the output Y, from the truth
table shown. Simplify and sketch the logic circuit for the simplified
expression.

P 45 Design a logic circuit whose output is HIGH only when a majority of

the inputs A, B and C are HIGH.

P 46 Using the theorems and laws of Boolean Algebra, reduce the

following functions
F1(A,B,C,D) = Σ(0,1,2,3,6,7,14,15)

12/1/2022 98
P 47 ➢ Example: Express the following in SoP form : F1 = x + y’z

➢ F1 = x + y’z
=(y+y’)x + y’z(x+x’) [because x+x’=1]
=xy + xy’ + xy’z + x’y’z
=xy(z+z’) + xy’(z+z’) + xy’z + x’y’z
=xyz + xyz’ + xy’z + xy’z’ + xy’z + x’y’z
=xyz + xyz’ + (xy’z + xy’z) + xy’z’ + x’y’z
= xyz + xyz’ + xy’z + xy’z’ + x’y’z [because x+x =x]
= m7 + m6 + m5 + m4 + m1
= Σ(m7, m6, m5, m4, m1)

➢ So F1 = Σ(1,4,5,6,7)

12/1/2022 99
 Karnaugh map
➢ The Karnaugh map (K–map), introduced by
Maurice Karnaugh in 1953, is a grid like
representation of a truth table which is used
to simplify Boolean algebra expressions.
➢ A Karnaugh map has zero and one entries at
different positions. It provides grouping
together Boolean expressions with common
factors and eliminates unwanted variables
from the expression.
➢ In a K-map, crossing a vertical or horizontal cell boundary is
always a change of only one variable.

12/1/2022 100
➢ The K-map is an array of squares (or cells) in which each square
represents a binary value of the input variables.

➢ The number of squares in a Karnaugh map is equal to (2n) the total

number of possible input variable combinations (i.e number of
squares is equal to the number of rows in a truth table).

➢ Ex. for two variables, the number of square is 22 = 4, for three

variables, the number of squares is 23 = 8 and for four variables, the
number of squares is 24 = 16.

12/1/2022 101
12/1/2022 102
 Procedure to build the Karnaugh map
➢ Find number of squares (or cells), and draw the array

➢ Assign decimal value and binary equivalent to each square (follow gray
code)

➢ Enter 1’s in the cells corresponding to the minterms of the given expression

➢ Group 1’s in pairs, quads, octets,… 2n cells (follow rules)

➢ Write the reduced term corresponding to each group, which gives expression
with minimum number of terms

12/1/2022 103
 Two, Three and Four variable Karnaugh map

2-variable K-map 3-variable K-map

0 1

2 3

4-variable K-map

0 1

2 3

6 7

12/1/2022 4 5 104
 Two, Three and Four variable Karnaugh map and Minterms

12/1/2022 105
Manual Logic reduction K-map

Disadvantages: Advantages:

➢ Finding the suitable pair of ➢ In every two adjacent cells,

terms is difficult. one of the variables changes
➢ If the suitable terms are not (1 and 0).
paired, it will lead to long ➢ All minterms which differ by
reduction process. one variable are in adjacent
cells.
➢ Through grouping, the
changing variable mapped by
the loop can be eliminated.
12/1/2022 106
 Rules for Grouping adjacent cells containing ones

1.No zeros allowed.

2.No diagonals.
3.Only power of 2 number of cells in each group.
4.Groups should be as large as possible.
5.Every one must be in at least one group.
6.Overlapping allowed.
7.Wrap around allowed.
8.Number of groups must be as fewer as possible.

12/1/2022 107
 Rules for Grouping adjacent cells containing ones

1. Groups may not include any cell containing a zero

2. Groups may be horizontal or vertical, but not diagonal.

12/1/2022 108
3. Groups must contain 1, 2, 4, 8, or in general 2n cells.

That is if n = 1, a group will contain two 1's since 21 = 2.

If n = 2, a group will contain four 1's since 22 = 4.

12/1/2022 109
4. Each group should be as large as possible.

5. Each cell containing a one must be in at least one group

12/1/2022 110
6. Groups may overlap.

7. Groups may wrap around the table. The leftmost cell in a row may be grouped with
the rightmost cell and the top cell in a column may be grouped with the bottom cell.

12/1/2022 111
8. There should be as few groups as possible, as long as this does not contradict any of
the previous rules.

12/1/2022 112
 Writing the logic function after grouping
Write the mintems corresponding to each loop by omitting the changing
variables.
for example A is a changing variable in red loop

12/1/2022 113
Procedure in K-map (continued)

Step-1: Find the minterms

Ex.

Step-2: Find the cells in K-map corresponding to the minterms. Enter 1’s
in that cells.

000 010 101 100 Binary value of input variables

corresponding to the Minterms
0 2 5 4 Cell number

Step-3: Group 1’s in the adjacent cells. Look for largest possible loop.
(8 cell, 4 cell, 2 cell).

Step-4: Form minimum number of loops.

Step-5: Write the reduced function from the K-map.

12/1/2022 114
Mapping a Standard SOP Expression on the Karnaugh Map

12/1/2022 115
Mapping a Nonstandard SOP Expression on the Karnaugh Map

(A’+B’+C’)
12/1/2022 116
P 47 Exercise:
Simplify the following SOP expression using the Karnaugh mapping
procedure :

12/1/2022 117
P 48 Exercise:
Write the logic functions from the K-map

12/1/2022 118
12/1/2022 119
P 49 Exercise:
Shows a Karnaugh map of a sum-of-products (SOP) function. Determine
the simplified SOP function.

12/1/2022 120
12/1/2022 121
 Mapping Directly on Karnaugh Map from a Truth Table
P 50 Exercise:
Implement the following Boolean expression using minimum number of 3-
input NAND gates.

12/1/2022 122
12/1/2022 123
P 51 Exercise:

Consider a logic circuit with 4 input variables in which the output is high
when at least 3 inputs are high. Reduce the logic function using K-map.

12/1/2022 124
P 52 Exercise: Reduce the expression F = Σm(0,1,2,3,6,7,13,15) by mapping
and implement in NAND logic.
▪Enter 1 for given minterms in corresponding location and 0 for others.
▪Group the maximum number of 1s in the order of 2n.
▪Ensure that all the 1s must come under at least once in a group.
▪Simplify the resultant minterms using basic laws and OR the Result.
▪Implement the hardware.

CD 00 01 11 10
AB
Group I = A’B’C’D’ A’B’C’D A’B’CD
00 1 1 1 1 A’B’CD’
0 1 3 2
= A’B’
1 Group II = A’BCD A’BCD’ A’B’CD A’B’CD’
01 0 4 05 1 = A’C
7 6
Group III = ABC’D ABCD
0 1 1 0 = ABD
11 12 13 15 14
F = A’B’+A’C+ABD
10 0 8 0 9 011 010
12/1/2022 125
 NAND Implementation

A’
B’

A’ F = A’B’+A’C+ABD

A
B
D

12/1/2022 126
P 53 Simplify the Boolean function
F(x, y, z) =  (0, 2, 4, 5, 6)

Ans: Z’+XY’

P 54 Given the following Boolean function: F = A'C + A'B + AB'C + BC

(a) Express it in sum of minterms,
(b) Find the minimal sum of products expression,

The function can be expressed in sum of

min terms form: F(A, B, C) = (1, 2, 3, 5, 7)

A ‘C + A 'B + AB'C + BC = C + A 'B

12/1/2022 127
P 55 Simplify the Boolean function

F(w, x, y, z)=  (0,1,2,4,5,6,8,9,12,13,14)

yz
wx 00 01 11 10
0 1 3 2
00

4 5 7 6
01

12 13 15 14
11

8 9 11 10
10

Ans: y' + w'z' + xz'

12/1/2022 128
 P 56 Simplify the Boolean function

F = A'B'C' + B'CD' + A'BCD' + AB'C'

Canonical form: F = A'B'C‘(D+D’) + (A+A’)B'CD' + A'BCD' + AB'C‘(D+D’)

F = A'B'C‘D + A'B'C‘D’ + AB'CD' + A’B'CD' + A'BCD' + AB'C‘D+ AB'C‘D’

F = ∑ (0,1,2,6,8,9,10)

CD
AB 00 01 11 10
0 1 3 2
00

4 5 7 6 Ans: B’(C’+’D’)+A’CD’
01

12 13 15 14
11

8 9 11 10
10
129
12/1/2022
P 57 Simplify the following Boolean functions

1. F(A, B, C, D) = (0, 2, 3, 5, 7, 8, 9,10,11,13,15)

CD 2. F(A, B, C, D) = (0,1,2,5,8,9,10)
AB 00 01 11 10
0 1 3 2 CD
00 1 1 1 AB 00 01 11 10
0 1 3 2
4 5 7 6 00 1 1 1
01 1 1
4 5 7 6
11 13 15 14 01 1
11 1 1
11 13 15 14
8 9 11 10 11
10 1 1 1 1
8 9 11 10
10 1 1 1
Choose the correct answer
F = B'D' + B'C' + A'C'D
F = BD + B' D' + CD + AD
F = BD + B' D' + CD + AB'
F = BD + B' D' + B' C + AD
F = BD + B' D' + B' C + AB'

12/1/2022 130
P 58

CD
AB 00 01 11 10
0 1 3 2
00 1 1 1

4 5 7 6
01 1 1 1

12 13 15 14
11 1 1

8 9 11 10
10 1 1 1

12/1/2022 131
P 59

CD
AB 00 01 11 10
0 1 3 2
00

4 5 7 6
01

12 13 15 14
11

8 9 11 10
10

12/1/2022 132
 Combinational and Sequential Logic Circuits

Combinational logic (sometimes also referred to as time-independent logic) is a type

of digital logic which is implemented by Boolean circuits, where the output is a pure
function of the present input only.

Sequential logic is a type of logic circuit whose output depends not only on the
present value of its input signals but on the sequence of past inputs.

12/1/2022 133
12/1/2022 134
Examples of Combinational Logic Circuits

1. Half adder – to perform two bit binary addition

2. Full adder – to perform three bit binary addition

3. Multiplexer – binary information from one of many input lines and

directs it to a single output line. [2n:1]

4. Demultiplexer - Several output lines, one input line. [1:2n]

5. Encoder – similar to MUX, many input lines and n output lines.

[2n:n]

6. Decoder – similar to DeMUX, n input lines and many output lines.

[n:2n]

12/1/2022 135
 Half Adder

Sum = X’Y+XY’
= XY
XOR

X Y = X Y +X Y

Carry = XY

12/1/2022 136
 Full Adder

SUM=

Carry Out=

12/1/2022 137
A simple 4 Bit Ripple Carry Adder is shown below. It is not the most efficient
adder because the higher stages in the cascade have to wait for the previous
stage to compute Carry Out bit.

12/1/2022 138
12/1/2022 139
 Multiplexers / Data Selectors
➢ 2n data inputs, n control inputs (called "select line"), 1 output
➢ Used to connect 2n points to a single point
➢ Control signal pattern forms binary index of input connected to output

2 : 1 mux

Output function Y = S' I0 + S I1

4 : 1 mux

Output function Y = S1' S0' I0 + S1' S0 I1 + S1 S0' I2 + S1 S0 I3

12/1/2022 140
 2 : 1 mux 4 : 1 mux

S1 S0

I0
S

I0 I1

Y Y

I1 I2

I3

12/1/2022 141
 4-to-1 Multiplexer Waveforms
I0

I1
Input
Data
I2

I3

S0
Select
Line
S1

Output
Y Data
Io I1 I2 I3 I0 I1 I2 I3
142
Why product of input and
select signals

mi – Minterms of control inputs

12/1/2022 143
12/1/2022 144
 Typical Application of a MUX
Multiple Sources Selector Single
Destination
MP3 Player
Docking Station

D0
Laptop

MUX
D1
Sound Card Y
D2

D3

Surround Sound System

Digital B A Selected Source

Satellite
0 0 MP3
0 1 Laptop
1 0 Satellite
Digital
1 1 Cable TV
Cable TV

145
 Demultiplexer / Data distributer

It is a digital function that

performs inverse of the multiplexing
operation.
It has one input line (F) and
transmits it to one of 2n possible
output lines (D0, D1, D2, …, D2n -1).
The selection of the specific output is
controlled by the bit combination of n
select inputs.

1 : 2 Demux

S
D

Yo S D Y0 Y1
0 D D 0
1 D 0 D
Y1
 1 : 4 Demux
The input Din is directed to one of the outputs as specified by the two select lines
a1 and a0 Output functions

Yo = Din if a1 and a0 = 0 0  Yo = a1’a0’ Din

Y1 = Din if a1 and a0 = 0 1  Y1 = a1’a0 Din
Y2 = Din if a1 and a0 = 1 0  Y2 = a1a0’ Din
Y3 = Din if a1 and a0 = 1 1  Y3 = a1 a0 Din

12/1/2022 147
1-to-4 De-multiplexer Waveforms

Din

a1

a0

Yo

Y1

Y2

Y3

148
Typical Application of a DEMUX
Single Source Selector Multiple
Destinations
B/W Laser
Printer

Fax
Machine

D0

DEMUX
X D1

D2 Color Inkjet
Printer
D3

B A Selected Destination
0 0 B/W Laser Printer Pen
Plotter
0 1 Fax Machine
1 0 Color Inkjet Printer
1 1 Pen Plotter

149
 Encoder

Unlike a multiplexer that selects one individual data input line and then sends that data to a
single output line or switch, Digital Encoder more commonly called a Binary Encoder
takes ALL its data inputs one at a time and then converts them into a single encoded
output.
So we can say that a binary encoder, is a multi-input combinational logic circuit that
converts the logic level “1” data at its inputs into an equivalent binary code at its output.

An “n-bit” binary encoder has 2n input lines and n-bit output lines with common types that
include 4-to-2, 8-to-3 and 16-to-4 line configurations.
The output lines of a digital encoder generate the binary equivalent of the input line whose
value is equal to “1” and are available to encode either a decimal or hexadecimal input
pattern to typically a binary or “B.C.D” (binary coded decimal) output code.

12/1/2022 150
 Decoder

Decoder is a combinational circuit with n input lines and 2n output lines. In functionality, a
binary decoder converts a definite sequence of input bits into a specific pattern as decided
by the user based on the requirement. Figure 1 shows a binary decoder with one enable pin
and 3 input lines which further results in 8 lines at its output.

The output sequence of a

decoder for a particular input
pattern is realized using its truth
table.

Table I shows the truth table for the

decoder of Figure 1 which shows that
when the enable is low, all the output lines
are low, no matter what the input sequence
be. This indicates the OFF state of the
decoder which can also be considered to
be its reset state. Thus one has to drive
high on the enable pin to realize the
functionality of the decoder 151