System Buses

NUCSF

Mr. RK Wissal
 Connecting
• A computer consists of a set of components or modules of three basic
types (processor, memory, I/O) that communicate with each other.

• In effect, a computer is a network of basic modules.

• Thus, there must be paths for connecting the modules.

• The collection of paths connecting the various modules is called the

interconnection structure. The design of this structure will depend on
the exchanges that must be made among modules.
Computer Modules

Memory
Input/Output
CPU
Memory Connection
• Typically, a memory Each word is assigned a unique numerical
address (0,1,..., N -1).

• A word of data can be read from or written into the memory.

• The nature of the operation is indicated by read and write control

signals.

• The location for the operation is specified by an address.

Memory Connection
• Receives and sends data

• Receives addresses (of locations)

• Receives control signals

 Read

 Write

 Timing
Input/Output Connection

• I/O module: From an internal (to the computer system) point of view,
I/O is functionally similar to memory.

• There are two operations, read and write. Further, an I/O module may
control more than one external device.
Input/Output Connection(1)

• We can refer to each of the interfaces to an external device as a port

and give each a unique address (e.g., 0, 1, ..., M-1).

• In addition, there are external data paths for the input and output of
data with an external device.

• Finally, an I/O module may be able to send interrupt signals to the

processor.
Input/Output Connection(1)
• Similar to memory from computer’s viewpoint

• Output

 Receive data from computer

 Send data to peripheral

• Input

 Receive data from peripheral

 Send data to computer

Input/Output Connection(2)
• Receive control signals from computer

• Send control signals to peripherals

– e.g. spin disk

• Receive addresses from computer

– e.g. port number to identify peripheral

• Send interrupt signals (control)

CPU(Processor) Connection
• The processor reads in instructions and data, writes out data
after processing, and uses control signals to control the
overall operation of the system.

• It also receives interrupt signals.

CPU Connection

• Reads instruction and data

• Writes out data (after processing)

• Sends control signals to other units

• Receives (& acts on) interrupts

CPU Connection
• The preceding list defines the data to be exchanged.

• The interconnection structure must support the following

types of transfers:

• Memory to processor: The processor reads an instruction or

a unit of data from memory.

• Processor to memory: The processor writes a unit of data to

memory.
• I/O to processor: The processor reads data from an I/O device via an
I/O module.

• Processor to I/O: The processor sends data to the I/O device.

• I/O to or from memory: For these two cases, an I/O module is

allowed to exchange data directly with memory, without going
through the processor, using direct memory access (DMA).
Buses
• A bus is a communication pathway connecting two or more devices.

• A key characteristic of a bus is that it is a shared transmission medium.

• Multiple devices connect to the bus, and a signal transmitted by any one
device is available for reception by all other devices attached to the bus.

• If two devices transmit during the same time period, their signals will
conflict and become problem. Thus, only one device at a time can
successfully transmit.
Buses
• Typically, a bus consists of multiple communication pathways, or
lines. Each line is capable of transmitting signals representing binary
1 and binary 0.

• Computer systems contain a number of different buses that provide

pathways.

• between components at various levels of the computer system

hierarchy. A bus that connects major computer components
(processor, memory, I/O) is called a system bus.
Buses
• A bus is a set of physical connections (cables, circuits, etc.) that can
be shared by multiple hardware components to communicate with one
another.

• Memory and input/ output devices are connected to the Central

Processing Unit through a group of lines called a bus.

• These lines are designed to transfer data between different

components..
Buses
• Types of Computer Bus According to Transform
 Address Bus

 Data Bus

 Control Bus
1. Address Bus
• A collection of wires used to identify particular location in main
memory is called Address Bus.

• in other words, the information used to describe the memory locations

travels along the address bus.

• The address bus transports memory addresses which the processor wants
to access in order to read or write data..

• The address bus is unidirectional.

• The size of address bus determines how many unique memory locations
can be addressed
2. Data Bus
• A collection of wires through which data is transmitted from one part
of a computer to another is called Data Bus.

• Data Bus can be thought of as a highway on which data travels within

a computer.

• The main objective of data bus is transfer of the data between

microprocessor to input/ output devices or memory.
2. Data Bus
• The data bus transfers instructions coming from or going to the processor.

• The data bus is bidirectional because the data can flow in either direction from
CPU to memory(or input/output device) or from memory to the CPU.

• The size (width) of bus determines how much data can be transmitted at one
time.

• Example:

– A 16-bit bus can transmit 16 bits of data at a time.

– 32-bit bus can transmit 32 bits at a time.

3. Control Bus
• The connections that carry control information between the CPU and
other devices within the computer is called Control Bus.

• The main objective of control bus is all signals controller carried from
processor to other hardware device.

• The control bus transports orders and synchronization signal coming

from the control unit and travelling to all other hardware components
3. Control Bus
The Control bus is bidirectional because the can flow in either direction
from CPU to memory(or input/output device) or from memory to the
CPU.

• it also transmits response signals from the hardware.

Example:

– This bus is used to indicate whether the CPU is reading from

memory or writing to memory.
Typical control lines include:
• Memory write: Causes data on the bus to be written into the
addressed location
• Memory read: Causes data from the addressed location to be placed on the bus.

• I/O write: Causes data on the bus to be output to the addressed I/O
port

• I/O read: Causes data from the addressed I/O port to be placed on the
bus.

• Clock: Is used to synchronize operations

Typical control lines include:
• Transfer ACK: Indicates that data have been accepted from or placed
on the bus

• Bus request: Indicates that a module needs to gain control of the bus

• Bus grant: Indicates that a requesting module has been granted control
of the bus

• Interrupt request: Indicates that an interrupt is pending

• Interrupt ACK: Acknowledges that the pending interrupt has been

recognized
Multiple-Bus Hierarchies
• If a great number of devices are connected to the bus, performance
will suffer.

• There are two main causes:

1_ In general, the more devices attached to the bus, the greater the bus
length and hence the greater the propagation delay.

This delay determines the time it takes for devices to coordinate the use
of the bus. When control of the bus passes from one device to another
frequently, these propagation delays can noticeably affect performance.
Multiple-Bus Hierarchies
• 2. The bus may become a bottleneck as the aggregate data transfer
demand approaches the capacity of the bus.

• This problem can be countered to some extent by increasing the data

rate that the bus can carry and by using wider buses (e.g., increasing
the data bus from 32 to 64 bits).
Multiple-Bus Hierarchies
• However, because the data rates generated by attached devices (e.g.,
graphics and video controllers, network interfaces) are growing
rapidly, this is a race that a single bus is ultimately destined to lose.
Elements of Bus Design
Single Bus Problems
• Lots of devices on one bus leads to:
– Propagation delays

• Long data paths mean that co-ordination of bus use can

adversely affect performance

• If aggregate data transfer approaches bus capacity

• Most systems use multiple buses to overcome these

problems
Bus Types
• Dedicated
– Separate data & address lines
• Multiplexed
– Shared lines
– Address valid or data valid control line
– Advantage - fewer lines
– Disadvantages
• More complex control
• Ultimate performance
BUS Arbitration
• In a computer system, multiple devices, such as the CPU, memory,
and I/O controllers, are connected to a common communication
pathway, known as a bus.

• In order to transfer data between these devices, they need to have

access to the bus.

• Bus arbitration is the process of resolving conflicts that arise when

multiple devices attempt to access the bus at the same time.
BUS Arbitration
• When multiple devices try to use the bus simultaneously, it
can lead to data corruption and system instability.

• To prevent this, a bus arbitration mechanism is used to

ensure that only one device has access to the bus at any
given time.
BUS Arbitration
• There are several types of bus arbitration methods, including:

• centralized, and distributed arbitration.

• In centralized arbitration, a single device, known as the bus controller, is

responsible for managing access to the bus.

• In decentralized arbitration, each device has its own priority level, and the
device with the highest priority is given access to the bus.

• In distributed arbitration, devices compete for access to the bus by sending

a request signal and waiting for a grant signal
BUS Arbitration
• Bus Arbitration refers to the process by which the current
bus master accesses and then leaves the control of the bus
and passes it to another bus requesting processor unit.

• The controller that has access to a bus at an instance is

known as a Bus master.
BUS Arbitration
• There are two approaches to bus arbitration:

• Centralized bus arbitration

A single bus arbiter performs the required arbitration.

• Distributed bus arbitration

All devices participating in the selection of the next bus
master.
Bus
Conclusion
• The bus system is the important part of computer
architecture which helps the computer CPU to communicate
efficiently with memory as well input/output devices.

• The performance and reliability of a computer system is

depending to the design and implementation of the
computer bus system is mentioned into the points that we
elaborate the importance of computing.
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