Minia University

Faculty of Engineering
Computers and Systems Engineering Department
Sheet No.: 2
Course: Systems Analysis (CS314)
Time: 2 Hours

1- A state machine with 𝐼𝑛𝑝𝑢𝑡𝑠 = {𝑎, 𝑏, 𝑐, 𝑑, 𝑎𝑏𝑠𝑒𝑛𝑡} has a state 𝑆 with two emerging arcs
with guards 𝑔𝑢𝑎𝑟𝑑1 = {𝑎} 𝑎𝑛𝑑 𝑔𝑢𝑎𝑟𝑑2 = {𝑎, 𝑏, 𝑑}. 3.1
a. Is this state machine deterministic?
b. Define the set else for state 𝑆 and specify the source and destination state for the
else arc.
2- For the answering service example of the flowing figure assume the input sequence is
(𝑜𝑓𝑓ℎ𝑜𝑜𝑘; 𝑜𝑓𝑓ℎ𝑜𝑜𝑘; 𝑟𝑖𝑛𝑔; 𝑜𝑓𝑓ℎ𝑜𝑜𝑘; 𝑟𝑖𝑛𝑔; 𝑟𝑖𝑛𝑔; 𝑟𝑖𝑛𝑔; 𝑜𝑓𝑓ℎ𝑜𝑜𝑘;···) This corresponds to a
user of the answering service making two phone calls, answering a third after the first
ring, and answering a second after the third ring. 3.2
a. Give the state response of the answering service.
b. Give the trace of the answering service.
c. Give the output sequence.

3- Consider the alphabets 𝐼𝑛𝑝𝑢𝑡𝑠 = 𝑂𝑢𝑡𝑝𝑢𝑡𝑠 = 𝐵𝑖𝑛𝑎𝑟𝑦 = {0,1} note that there is no
stuttering input or output symbols here. This simplifies the notation in the problem
somewhat.3.3

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 Minia University
Faculty of Engineering
Computers and Systems Engineering Department
Sheet No.: 2
Course: Systems Analysis (CS314)
Time: 2 Hours

a. Construct a state machine that uses these alphabets such that given any input
sequence (𝑥(0), 𝑥(1), . . ) without stuttering symbols, the output sequence is given
by, ∀𝑛 ∈ ℕ0 ,
1 𝑖𝑓 𝑛 ≥ 2 ∧ (𝑥(𝑛 − 2), 𝑥(𝑛 − 1), 𝑥(𝑛)) = (1,1,1)
𝑦(𝑛) = {
0 𝑜𝑡ℎ𝑒𝑟𝑤𝑖𝑠𝑒
In words, the machine outputs 1 if the current input symbol and the two previous
input symbols are all 1’s, otherwise it outputs 0. (Had we included a stuttering
symbol, the above equation would be a bit more complicated.)
b. For the same input and output alphabet, construct a state machine that outputs 1
if the current input symbol and two previous input symbols are either
(1,1,1) 𝑜𝑟 (1, 0, 1), and otherwise it outputs 0.
4- A modulo 𝑁 counter is a device that can output any integer between 0 and 𝑁 − 1. The
device has three input symbols, increment, decrement, and reset, plus, as always, a
stuttering symbol absent; increment increases the output integer by 1 decrement
decreases this integer by 1; and reset sets the output symbol to 0. Here increment and
decrement are modulo 𝑁 operations. Unless otherwise stated, you may assume that the
counter begins at 0. Note: Modulo 𝑁 numbers work as follows. For any integer 𝑚,
𝑚 𝑚𝑜𝑑 𝑁 = 𝑘 𝑤ℎ𝑒𝑟𝑒 0 ≤ 𝑘 ≤ 𝑁 − 1 is the unique integer such that 𝑁
𝑑𝑖𝑣𝑖𝑑𝑒𝑠 (𝑚 − 𝑘). Thus there are only 𝑁 distinct 𝑚𝑜𝑑𝑢𝑙𝑜 − 𝑁 numbers, namely, 0;···
; 𝑁 − 1. 3.4
a. Give the state transition diagram of this counter for N = 4.
b. Give the update table of this counter for N = 4.
c. Give a description of the state machine by specifying the five entities
𝑆𝑡𝑎𝑡𝑒𝑀𝑎𝑐ℎ𝑖𝑛𝑒 = (𝑆𝑡𝑎𝑡𝑒𝑠; 𝐼𝑛𝑝𝑢𝑡𝑠; 𝑂𝑢𝑡𝑝𝑢𝑡𝑠; 𝑢𝑝𝑑𝑎𝑡𝑒; 𝑖𝑛𝑖𝑡𝑖𝑎𝑙𝑆𝑡𝑎𝑡𝑒)again, assume N = 4.
d. Take 𝑁 = 3. Calculate the state response for the input sequence
(𝑖𝑛𝑐𝑟𝑒𝑚𝑒𝑛𝑡 4 ; 𝑑𝑒𝑐𝑟𝑒𝑚𝑒𝑛𝑡 3 ;···) starting with initial state 1, where 𝑠 𝑛 means 𝑠
repeated 𝑛 times. You may give the state response for the first seven reactions
only.
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 Minia University
Faculty of Engineering
Computers and Systems Engineering Department
Sheet No.: 2
Course: Systems Analysis (CS314)
Time: 2 Hours

5- Construct an infinite state machine that realizes 𝐸𝑞𝑢𝑎𝑙.

6- The state machine 𝑈𝑛𝑖𝑡𝐷𝑒𝑙𝑎𝑦 is defined to behave as follows. On the first nonstuttering
reaction (when the first non-stuttering input symbol arrives), the output symbol a is
produced. On subsequent reactions (when subsequent input symbols arrive), the input
symbol that arrived at the previous non-stuttering reaction is produced as an output
symbol.3.5
a. Assume the input and output alphabets 𝑎𝑟𝑒 𝐼𝑛𝑝𝑢𝑡𝑠 = 𝑂𝑢𝑡𝑝𝑢𝑡𝑠 =
{𝑎; 𝑏; 𝑐; 𝑎𝑏𝑠𝑒𝑛𝑡}i. Give a finite state machine that implements 𝑈𝑛𝑖𝑡𝐷𝑒𝑙𝑎𝑦 for this
input set. Give both a state transition diagram and a definition of each of the
components in 𝑆𝑡𝑎𝑡𝑒𝑀𝑎𝑐ℎ𝑖𝑛𝑒 =
(𝑆𝑡𝑎𝑡𝑒𝑠; 𝐼𝑛𝑝𝑢𝑡𝑠; 𝑂𝑢𝑡𝑝𝑢𝑡𝑠; 𝑢𝑝𝑑𝑎𝑡𝑒; 𝑖𝑛𝑖𝑡𝑖𝑎𝑙𝑆𝑡𝑎𝑡𝑒)
b. Assume the input and output sets are 𝑖𝑛𝑝𝑢𝑡𝑠 = 𝑜𝑢𝑡𝑝𝑢𝑡𝑠 = ℕ0 ∪ {𝑎𝑏𝑠𝑒𝑛𝑡} and
that on the first non-stuttering reaction, the machine produces 0 instead of a. Give
an (informal) argument that no finite state machine can implement 𝑈𝑛𝑖𝑡𝐷𝑒𝑙𝑎𝑦 for
this input set. Give an infinite state machine by defining each of the components in
𝑆𝑡𝑎𝑡𝑒𝑀𝑎𝑐ℎ𝑖𝑛𝑒 = (𝑆𝑡𝑎𝑡𝑒𝑠; 𝐼𝑛𝑝𝑢𝑡𝑠; 𝑂𝑢𝑡𝑝𝑢𝑡𝑠; 𝑢𝑝𝑑𝑎𝑡𝑒; 𝑖𝑛𝑖𝑡𝑖𝑎𝑙𝑆𝑡𝑎𝑡𝑒)
7- The state machine in the Figure blow has the property that it outputs at least one 1
between any two 0’s. Construct a two-state nondeterministic state machine that
simulates this one and preserves that property. 3.8

8- For the nondeterministic state machine in the Figure blow the input and output alphabets
are 𝑖𝑛𝑝𝑢𝑡𝑠 = 𝑜𝑢𝑡𝑝𝑢𝑡𝑠 = {0,1, 𝑎𝑏𝑠𝑒𝑛𝑡}.3.9
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 Minia University
Faculty of Engineering
Computers and Systems Engineering Department
Sheet No.: 2
Course: Systems Analysis (CS314)
Time: 2 Hours

a. Define the 𝑝𝑜𝑠𝑠𝑖𝑏𝑙𝑒𝑈𝑝𝑑𝑎𝑡𝑒𝑠 function for the state machine.

b. Define the relation 𝐵𝑒ℎ𝑎𝑣𝑖𝑜𝑟𝑠 in for this state machine. Part of the challenge here
is to find a way to describe this relation compactly. For simplicity, ignore stuttering;
i.e., assume the input symbol is never absent.

𝑛
9- Use induction to show that if 𝐴 = [
𝑎 1
] then for all 𝑛 ≥ 0 𝐴𝑛 = [𝑎 𝑛𝑎𝑛−1 ] 5.2
0 𝑎 0 𝑎𝑛

10- Consider a state machine where:

𝑖𝑛𝑝𝑢𝑡𝑠 = {1, 𝑎𝑏𝑠𝑒𝑛𝑡}
𝑜𝑢𝑡𝑝𝑢𝑡𝑠 = {0,1, 𝑎𝑏𝑠𝑒𝑛𝑡}
𝑠𝑡𝑎𝑡𝑒𝑠 = {𝑎, 𝑏, 𝑐, 𝑑, 𝑒, 𝑓},
𝑖𝑛𝑖𝑡𝑖𝑎𝑙𝑆𝑡𝑎𝑡𝑒 = 𝑎,
And the update table is given by
(currentState; inputSymbol) (nextState; outputSymbol)

(a, 1) (b, 1)

(b, 1) (c, 0)

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 Minia University
Faculty of Engineering
Computers and Systems Engineering Department
Sheet No.: 2
Course: Systems Analysis (CS314)
Time: 2 Hours

(c, 1) (d, 0)

(d, 1) (e, 1)

(𝑒, 1) (f, 0)

(𝑓, 1) (𝑎, 0)

a. Draw the state transition diagram for this machine.

b. Ignoring stuttering, give the Behaviors relation for this machine.
c. Find a state machine with three states that simulates this one and that is simulated by
this one. Draw that state machine and give the simulation relations.