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Lab 8

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15 views

Lab 8

Uploaded by

M. ZAIN
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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VLSI Design Lab Lab 9

Design and Implementation of an Inverter

OBJECTIVE: To design and Implementation of an Inverter.

EQUIPMENT REQUIRED
 Tanner/ Mentor Graphics-Pyxis, AMS, Calibre

Basic Design Concept: The term “CMOS” stands for “complementary-symmetry metal–oxide–
semiconductor” which is pronounced as “see mos”. CMOS is a type of MOSFET, where its fabrication
process uses complementary & symmetrical P-type & N-type MOSFET pairs for logic functions. The main
CMOS devices characteristics are consumption of low static power & high noise immunity. The inverter is
accepted universally as the basic logic gate while performing a Boolean operation on a single i/p variable. A
basic inverter circuit is used to accomplish a logic variable by complementing from A to A’. So, a CMOS
inverter is a very simple circuit, designed with two opposite-polarity MOSFETs within a complementary
way. This article discusses an overview of the CMOS inverter and its working with applications. CMOS
inverter definition is a device that is used to generate logic functions is known as CMOS inverter and is the
essential component in all integrated circuits. A CMOS inverter is a FET (field effect transistor), composed
of a metal gate that lies on top of oxygen’s insulating layer on top of a semiconductor. These inverters are
used in most electronic devices which are accountable for generating data n small circuits.

Figure 1: CMOS Inverter

The CMOS inverter circuit diagram is shown below. The general CMOS inverter structure is the
combination of both the PMOS & NMOS transistors where the pMOS is arranged at the top & nMOS is
arranged at the bottom.

The connection of both the PMOS & NMOS transistors in the CMOS inverter can be done like this. The
NMOS transistor is connected at the drain (D) & gate (G) terminals, a voltage supply (VDD) is connected at
the source terminal of PMOS & a GND terminal is connected at the source terminal of NMOS. Input voltage
(Vin) is connected to both the gate terminals of transistors & output voltage (Vout) is connected to the drain
(D) terminals of the transistor. It is very significant to observe that the CMOS device does not have any
resistors, so it will be more power-efficient. Once the input voltage of CMOS changes between 0 to 5 volts,
then both the transistors state will be changed accordingly. If we design every transistor like a simple switch
that is operated through input voltage (Vin), then operations of the inverter can be observed very simply:

CMOS Inverter Operation & Working

The working of CMOS inverter is the same as other types of FETs except depends on an oxygen layer to
divide electrons within the gate & semiconductor. They are designed with a power supply, input voltage
terminal, output voltage, gate, drain, and PMOS & NMOS transistors which are connected to the gate & the
VLSI Design Lab Lab 9
drain terminals. When the low input voltage is given to the CMOS inverter, then the PMOS transistor is
switched ON whereas the NMOS transistor will switch OFF by allowing the flow of electrons throughout the
gate terminal & generating high logic output voltage. Similarly, when the high input voltage is given to the
CMOS inverter then, the PMOS transistor is switched OFF whereas the NMOS transistor will be switched
ON avoiding as many electrons from attaining the output voltage & generating low logic output voltage.
Thus, direct current supplies from the supply voltage (VDD) to the output voltage (Vout) & the load
capacitor (CL) can be charged and shows that Vout = VDD. As a result, the above circuit works like an
inverter.

Task 1 Circuit Diagram:

Waveform:
VLSI Design Lab Lab 9

NOR Gate:

Circuit Diagram:
VLSI Design Lab Lab 9

Waveform:
VLSI Design Lab Lab 9
Results and Discussion:

Advantages

The CMOS inverter advantages include the following.


 The CMOS inverter’s steady-state power dissipation is negligible virtually, apart from small power
dissipation because of leakage currents.
 The VTC (voltage transfer characteristic) exhibits a complete o/p voltage swing in between 0 V & VDD, and
the transition of voltage transfer characteristic is normally very sharp. Thus, the characteristics of the CMOS
inverter look like an ideal inverter.
 These inverters use electricity once they are switched ON & OFF resulting in less power consumption. As a
result, these inverters generate extremely less waste heat to make them highly efficient, so used in small and
delicate electronic devices.
 These inverters include high noise immunity, which lets them block both incoming & outgoing frequency
spikes.
 These are low-cost to produce mass.

Disadvantages

The CMOS inverter disadvantages include the following.


 As compared to other inverters, the switching speed of the CMOS inverter is high.
 These are very difficult to fabricate due to both the transistors used on the same Silica piece.
 It uses two transistors to make an inverter, so it uses more space on the IC as compared to the NMOS
inverter.

Applications

The applications of CMOS inverters include the following.


 CMOS inverters are used in different ICs (integrated circuits) like microprocessors, static
RAM, microcontrollers, data converters, image sensors & transceivers.
 These are found in mobile devices, digital cameras, home computers, cell phones, routers, network servers,
modems & virtually each other electronic device that needs logic functions.

What is the function of a CMOS inverter?


CMOS inverters are the most frequently used flexible MOSFET inverters that are used in designing integrated
circuits like CD4069UB CMOS hex inverter, CD4069UBE, CD40106BE, etc. They function through very little
power loss & high speed. These inverters are used for generating data in small electronic circuits.

What is an inverter gate in CMOS?


In CMOS, an inverter gate is one type of logic gate, used to implement logical negation (¬).

Which gate is also called an inverter?


VLSI Design Lab Lab 9
NOT logic gate is also called an inverter because NOT gate gives low output for high input and provides a high
output for low input.
Why do we use P substrate in CMOS?
A P-type substrate in CMOS allows constructing n-channel transistors with no additional doping. So this is the
main benefit because the doping is low, the electrons mobility is higher, the gain is higher and the transistor’s
switching speed is high.

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