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Analog Assignment

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28 views8 pages

Analog Assignment

Uploaded by

manojhanmanthu04
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ASSIGNMENT

MAHESH MENDU
EE22B059
BASIC CURRENT MIRROR
Objective : Develop and evaluate a basic current mirror circuit, and confirm its
functionality through LTspice simulation.
 Reference Current (Iref): 59 µA
 Supply Voltage (VDD): 1.8 V
 Simulation Software: LTspice

Current Mirror : A simple current mirror typically consists of two transistors (M1 and
M2), where M1 is the reference transistor, and M2 mirrors the current from M1. The
output current (Iout) is a replica of the reference current (Iref), with the assumption that
both transistors are in saturation and have matched characteristics.

CIRCUIT DIAGRAM :

Theory :
 The gate and drain terminals of transistor M1 are connected, ensuring it operates
in saturation mode.
 Transistor M2 replicates the reference current (Iref) by maintaining the same
gate-source voltage as M1. To keep M2 in saturation, its drain-source voltage
(VDS) must meet the condition:
VDS(M2) ≥ VGS(M2) – VT
 Furthermore, Vx will be varied from 0 to 2V to study the voltage-current
relationship.
LTSpice Simulation Graph of Ix vs Vx:

DC OPERATING POINTS :

OBSERVATIONS:
 The output current, Iout, was initially equal to the reference current, Iref.
 As the output voltage, Vx, increased, the output current began to deviate
because of channel-length modulation.
 The current mirror was not perfectly precise, and the output current varied with
changes in Vx.

CONCLUSION:
The basic current mirror replicates Iref, but its accuracy is limited by channel-length
modulation.
W/L ratio are maintained same for both transistors so that output current replicates
Iref.

CASCODE CURRENT
MIRROR
OBJECTIVE: Create and simulate a cascode current mirror in Ltspice, showcasing
enhanced precision and minimized channel-length modulation e ects when compared
to a standard current mirror design.

Reference Current (Iref): 59 µA

 Supply Voltage (VDD): 1.8 V


 Simulation Software: LTspice

Cascode Current Mirror:


A cascode current mirror adds two additional transistors (M3 and M2) in a cascode
configuration. These cascode transistors improve the output resistance by reducing the
variation of the output current due to voltage fluctuations at the output node (Vout). The
cascode design is intended to minimize the e ects of channel-length modulation and
improve the accuracy of current mirroring.
 CIRCUIT DIAGRAM:

Theory:

 Includes four transistors (M1, M2, M3, M4), with M3 and M2 forming a cascode
configuration to enhance performance.
 Provides higher accuracy by isolating M1 from output voltage fluctuations,
reducing the impact of channel-length modulation.
 Higher output resistance, improving stability and reducing current deviations.
 Minimizes channel-length modulation e ects, resulting in more stable and
accurate current mirroring.
 More complex design with additional transistors, but o ers superior
performance.

LTspice Simulation Graph of Ix vs VX:


Dc operating points:

Observations :
 The cascode current mirror provides significantly better current accuracy
compared to a standard current mirror. This is achieved by isolating the output
transistor from voltage fluctuations, which minimizes variations in the output
current due to changes in the output voltage (Vout).
 The cascode design results in better matching between the reference current
and the mirrored output current. This leads to a more accurate replication of the
reference current.
Conclusion:
Comparison between the basic current mirror and cascode current mirror.
W/L ratio are maintained same for transistors so that output current replicates Iref.

BASIC CURRENT MIRROR :

CASCODE CURRENT MIRROR


Channel-Length Modulation:
 Current Mirror: Susceptible to channel-length modulation, which causes
variations in the output current as VDS changes.
 Cascode Current Mirror: Minimizes the e ects of channel-length modulation by
isolating the output transistor from Vout.
Accuracy:
 Current Mirror: Less accurate due to variations in VDS and channel-length
modulation.
 Cascode Current Mirror: More accurate as it reduces sensitivity to VDS
variations, ensuring better current mirroring.
Complexity:
 Current Mirror: Simpler design with only two transistors.
 Cascode Current Mirror: More complex, requiring four transistors, which
increases the circuit's design complexity.
Power Consumption:
 Current Mirror: Consumes less power due to fewer transistors.
 Cascode Current Mirror: Consumes more power because of the additional
cascode transistors.
Minimum voltage required:
The minimum voltage Vx required to keep all transistors in saturation is low for basic
current mirror and high for cascode current mirror.

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