Students Copy CTE 241 Intro To Microprocessor and Assembl 055542
Students Copy CTE 241 Intro To Microprocessor and Assembl 055542
Engr. Otobong
Onwunali
To
interpret
the
instructions & generate control signals for them, this control unit uses fixed logic
circuits. To generate signals, the fixed logic circuits use the contents of the
control step counter, Instruction Register (IR) & code flag, and some external
input signals such as interrupt signals. The figure below shows the architecture
view of the Hardwired control unit as follows.
The fixed logic circuit in the diagram is a combinational circuit made from
decoders & encoders. It generates the output based on the state of its input(s).
The decoder decodes the instruction loaded in IR (Instruction Register) &
generates the signal that serves as an input to the encoder. Also, external input
& conditional codes act as an input to the encoder. The encoder then
accordingly generates the control signals based on the inputs. After the
execution of each instruction, another signal: the end signal is generated which
resets the state of control step counter & makes it ready for the next instruction.
Advantages of Hardwired Control Unit:
Here, we will discuss the advantages of the Hardwired Control Unit as follows.
Because of the use of combinational circuits to generate signals, Hardwired
Control Unit is fast.
It depends on number of gates; how much delay can occur in generation of
control signals.
It can be optimized to produce the fast mode of operation.
Faster than micro- programmed control unit.
It does not require control memory.
Disadvantages of Hardwired Control Unit:
Here, we will discuss the disadvantages of the Hardwired Control Unit as follows.
The complexity of the design increases as we require more control signals to
be generated (need of more encoders & decoders)
Modifications in the control signals are very difficult because it requires
rearranging of wires in the hardware circuit.
Adding a new feature is difficult & complex.
Difficult to test & correct mistakes in the original design.
It is Expensive.
Only limited number of instructions are Control signals for many instructions
Hardwired Control Unit Microprogrammed Control Unit
Basics of Microprocessor
A Microprocessor takes a bunch of instructions in machine language and executes
them, telling the processor what it has to do. Microprocessor performs three basic
things while executing the instruction:
It performs some basic operations like addition, subtraction, multiplication, division,
and some logical operations using its Arithmetic and Logical Unit (ALU). New
Microprocessors also perform operations on floating-point numbers also.
1. Data in microprocessors can move from one location to another.
2. It has a Program Counter (PC) register that stores the address of the next
instruction based on the value of the PC, Microprocessor jumps from one location
to another and takes decisions.
Does not contain a built in I/o port Most of the processor contains multiple
functionally needs to be implemented build in I/o ports which can be operated
with the help external programmable as a single 8 or 16 or 32 bit port or as
peripheral inter phase chips like 8255. individual port pins.
Targeted for high end market where Targeted for embedded market where
performance is important. performance is not so critical ( at present
this demarcation is invalid).
Limited power saving options compare to Includes lot of power savings features
micro controllers
Features of Microprocessor
Low Cost - Due to integrated circuit technology microprocessors are available
at very low cost. It will reduce the cost of a computer system.
High Speed - Due to the technology involved in it, the microprocessor can work
at very high speed. It can execute millions of instructions per second.
Small Size - A microprocessor is fabricated in a very less footprint due to very
large scale and ultra large scale integration technology. Because of this, the size
of the computer system is reduced.
Versatile - The same chip can be used for several applications, therefore,
microprocessors are versatile.
Low Power Consumption - Microprocessors are using metal oxide
semiconductor technology, which consumes less power.
Less Heat Generation - Microprocessors uses semiconductor technology
which will not emit much heat as compared to vacuum tube devices.
Reliable - Since microprocessors use semiconductor technology, therefore, the
failure rate is very less. Hence it is very reliable.
Portable - Due to the small size and low power consumption microprocessors
are portable.
The instruction set is a collection of pre-defined machine codes, which the CPU is
designed to expect and be able to act upon when detected. Different processors have
different instruction sets, to allow for greater features, easier coding, and to cope with
changes in the actual architecture of the processor itself. Each machine code of an
instruction set consists of two separate fields: Opcode and Operand.
The exact format of the machine codes is CPU-dependent.
Opcodes are also given mnemonics (short names) so that they can be easily referred
to in code listings and similar documentation. For example, an instruction to store the
contents of the accumulator in a given memory address could be given the binary
opcode 000001, which may then be referred to using the mnemonic STA (short for
STore Accumulator).
The most common fields found in instruction format are: -
1. An operation code field that specified the operation to be performed
2. An address field that designates a memory address or a processor registers.
3. A mode field that specifies the way the operand or the effective address is
determined.
MACHINE INSTRUCTIONS
Machine Instructions are commands or programs written in machine code of a
machine (computer) that it can recognize and execute.
A machine instruction consists of several bytes in memory that tells the
processor to perform one machine operation.
The processor looks at machine instructions in main memory one after another,
and performs one machine operation for each machine instruction.
The collection of machine instructions in main memory is called a machine
language program.
Machine code or machine language is a set of instructions executed directly by a
computer’s central processing unit (CPU). Each instruction performs a very specific
task, such as a load, a jump, or an ALU operation on a unit of data in a CPU register or
memory. Every program directly executed by a CPU is made up of a series of such
instructions.
The general format of a machine instruction is
Modifications and error fixing cannot be Modifications and error fixing can be
done in machine language. done in assembly language.
INSTRUCTION FORMATS
Instruction includes a set of operation codes and operands that manage with the
operation codes. Instruction format supports the design of bits in an instruction. It
contains fields including opcode, operands, and addressing mode.
An instruction is a command to the microprocessor to perform a given task on a
specified data. Each instruction has two parts: one is task to be performed, called the
operation code (opcode), and the second is the data to be operated on, called the
operand. The operand (or data) can be specified in various ways.
The instruction length is generally preserved in multiples of the character length,
which is 8 bits. When the instruction length is permanent, several bits are assigned to
opcode, operands, and addressing modes.
The function of allocating bits in the instruction can be interpreted by considering the
following elements −
Number of addressing modes
Number of operands
Number of CPU registers
Number of register sets
Number of address lines
These registers are utilized for playing out the different operations. When we perform
some operations, the CPU utilizes these registers to perform the operations. When we
provide input to the system for a certain operation, the provided information or the
input gets stored in the registers. Once the ALU arithmetic and logical unit process the
output, the processed data is again provided to us by the registers.
The sole reason for having a register is the quick recovery of information that the CPU
will later process. The CPU can use RAM over the hard disk to retrieve the memory,
which is comparatively a much faster option, but the speed retrieved from RAM is still
not enough. Therefore, we have Cache memory, which is faster than registers. These
registers work with CPU memory like catch and RAM to complete the task quickly.
8. Relative Addressing Mode: In the content above we have discussed the index
addressing mode. There we were adding a constant to the register content to refer
the next operand address. In some computer instead of a register, the program
counter is used.
Advantage: Relative addressing mode doesn’t require memory references.
Disadvantage: Relative addressing mode doesn’t have any disadvantage as such.
ARITHMETIC INSTRUCTIONS
ADD INSTRUCTION
Purpose: Addition of the operators.
Syntax: ADD destiny, source
It adds the two operators and stores the result on the destiny operator.
SUB INSTRUCTION
Purpose: Subtraction.
Syntax: SUB destiny, source
It subtracts the source operator from the destiny.
MUL INSTRUCTION
Purpose: Multiplication with sign.
Syntax: MUL source
DIV INSTRUCTION
Purpose: Division without sign.
Syntax: DIV source
LOGIC INSTRUCTIONS
They are used to perform logic operations on the operators. Those instructions are:
AND, NEG, NOT, OR, & XOR
AND INSTRUCTION
Purpose: It performs the conjunction of the operators’ bit by bit.
Syntax: AND destiny, source
With this instruction the "y" logic operation for both operators is carried out:
Source Destiny
Destiny
11 1
10 0
01 0
00 0
The result of this operation is stored on the destiny operator.
NEG INSTRUCTION
Purpose: It generates the complement to 2.
Syntax: NEG destiny
This instruction generates the complement to 2 of the destiny operators and stores it
on the same operator.
NOT INSTRUCTION
Purpose: It carries out the negation of the destiny operator bit by bit.
Syntax: NOT destiny
The result is stored on the same destiny operator.
OR INSTRUCTION
Purpose: Logic inclusive OR
Syntax: OR destiny, source
The OR instruction carries out, bit by bit, the logic inclusive disjunction of the two
operators:
Source- Destiny
Destiny
1-1 1
1-0 1
0-1 1
0-0 0
TEST INSTRUCTION
Purpose: It logically compares the operators
Syntax: TEST destiny, source
It performs a conjunction, bit by bit, of the operators, but differing from AND, this
instruction does not place the result on the destiny operator, it only has effect on the
state of the flags.
XOR INSTRUCTION
Purpose: OR exclusive
Syntax: XOR destiny, source Its function is to perform the logic exclusive disjunction
of the two operators’ bit by bit.
Source- Destiny
Destiny
1-0 0
0-0 1
1-1 0
0-1 1
Program control instructions
JUMP INSTRUCTIONS
They are used to transfer the flow of the process to the indicated operator. Some of
these instructions are:
JMP, JA (JNBE), JAE (JNBE), JB (JNAE), JBE (JNA), JE (JZ) and JNE (JNZ)
JMP INSTRUCTION
Purpose: Unconditional jump.
Syntax: JMP destiny
This instruction is used to deviate the flow of a program without taking into account
the actual conditions of the flags or of the data.
JA (JNBE) INSTRUCTION
Purpose: Conditional jump.
Syntax: JA Label
JB (JNAE) INSTRUCTION
Purpose: Conditional jump.
Syntax: JB label
It jumps if it is down, if it is not or if it is the equal. The jump is done if CF is activated.
JE (JZ) INSTRUCTION
Purpose: Conditional jump.
Syntax: JE label
It jumps if it is the equal or if it is zero. The jump is done if ZF is activated.
LOOPE INSTRUCTION
Purpose: To generate a cycle in the program considering the state of ZF.
Syntax: LOOPE label
LOOPNE INSTRUCTION
Purpose: To generate a cycle in the program, considering the state of ZF.
Syntax: LOOPNE label
COUNTING INSTRUCTIONS
They are used to decrease or increase the content of the counters. Those instructions
are: DEC & INC.
DEC INSTRUCTION
Purpose: To decrease the operator.
Syntax: DEC destiny
This operation subtracts 1 from the destiny operator and stores the new value in the
same operator.
INC INSTRUCTION
Purpose: To increase the operator.
Syntax: INC destiny the instruction adds 1 to the destiny operator and keeps the
result in the same destiny operator.
COMPARISON INSTRUCTIONS
They are used to compare operators, and they affect the content of the flags. This
instruction is like CMP instruction.
CMP INSTRUCTION
Purpose: To compare the operators.
Syntax: CMP destiny, source
This instruction subtracts the source operator from the destiny operator but without
this one storing the result of the operation, and it only affects the state of the flags.
FLAG INSTRUCTIONS
They directly affect the content of the flags. Those instructions are: CLC, CLD, CLI,
CMC, STC, STD ans STI.
CLC INSTRUCTION
Purpose: To clean the cartage flag.
Syntax: CLC
This instruction turns off the bit corresponding to the cartage flag, or in other words it
puts it on zero.
CLD INSTRUCTION
Purpose: To clean the address flag.
Syntax: CLD
This instruction turns off the corresponding bit to the address flag.
CLI INSTRUCTION
Purpose: To clean the interruption flag.
Syntax: CLI
This instruction turns off the interruptions flag, disabling this way those mask arable
interruptions. A mask arable interruption is that one whose functions are deactivated
when IF=0.
CMC INSTRUCTION
Purpose: To complement the cartage flag.
Syntax: CMC
This instruction complements the state of the CF flag, if CF = 0 the instructions equals
it to 1, and if the instruction is 1 it equals it to 0. We could say that it only "inverts"
the value of the flag.
STC INSTRUCTION
Purpose: To activate the cartage flag.
Syntax: STC
This instruction puts the CF flag in 1.
STD INSTRUCTION
Purpose: To activate the address flag.
Syntax: STD
The STD instruction puts the DF flag in 1.
STI INSTRUCTION
Purpose: To activate the interruption flag.
Syntax: STI
The instruction activates the IF flag, and this enables the mask arable external
interruptions (the ones which only function when IF = 1).