Scribd
Upload
4 views44 pages

Power Electronics Project

Dc-Dc converter design

Uploaded by

omar.abdelmottaleb04
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
4 views44 pages

Power Electronics Project

Dc-Dc converter design

Uploaded by

omar.abdelmottaleb04
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 44

EPES306 Power Electronics 1

Course Project - Fall 2024

Team Members:
• Omar Hatem Mohamed 1210261
• Youssef Mohamed Abdelnaby Darwish 1210342
• Adham Ahmed Shoaib 1210198

Submitted To: Dr. Ahmed Lotfy


1. Verify your design using LTSpice simulation using the actual part
numbers of the selected transistor, diode and controller IC to simulate the
different operating points and record the results as requested in the next
page.

Type: Boost converter


Specifications:
• Vin Range (30V-50V)
• Iout Range (1A-2A)
• Fsw : 100 KHz
• Conduction Mode: CCM ΔI<40%
• Output Voltage ripple<0.5%

2. PWM Controller (LT3757)

Feedback Voltage =1.6


The FBX pin is connected to 2 resistors
We assumed R2 to be 20kohms then
used voltage divider to get R3=
730kohm
VFeedback=R2/(R2+R3) *60=1.6 V
Design Steps:
Hand Calculations:
We choose the inductor as
220uH as it was the closest
to the value in the design
(234.375)

Circuit Schematic:
Simulation Results:
Case 1: maximum input voltage with minimum
load current conditions
IL:

Peak to peak current satisfies the 40% ripples


VL:

ID:
VD:

Comment: we can observe negative diode voltage as calculated.

I Q:
VQ:

IC:

VC:

Voltage ripples satisfy the condition <0.5%


d. Losses
Load:

Capacitor:

Inductor:
Transistor:

Diode:
Case 2: maximum input voltage with maximum load
current conditions
IL:

Peak to peak current satisfies the 40% ripples

VL:
ID:

VD:

Comment: we can observe negative diode voltage as calculated.


I Q:

VQ:
IC:

VC:

Voltage ripples satisfy the condition <0.5%


d. Losses:
Load:

Capacitor:
Inductor:

Transistor:

Diode:
Case 3: minimum input voltage with maximum load
current conditions.
IL:

Peak to peak current satisfies the 40% ripples

VL:
ID:

VD:

Comment: we can observe negative diode voltage as


calculated.
I Q:

VQ:
IC:

VC:

Voltage ripples satisfy the condition <0.5%


d. Losses
Load:

Capacitor:
Inductor:

Transistor:

Diode:
Case 4: minimum input voltage with minimum load
current conditions
IL:

Peak to peak current satisfies the 40% ripples

VL:
I D:

VD:

Comment: we can observe negative diode voltage as


calculated.
I Q:

VQ:
IC:

VC:

Voltage ripples satisfy the condition <0.5%


d. Losses:
Load:

Capacitor:
Inductor:

Transistor:

Diode:
e.
LT spice
ƞ Vs. D @ max current

ƞ Vs. D @ min current


ƞ Vs. ILoad @ min Vin

ƞ Vs. ILoad @ max Vin


Large signal ideal model of boost converter using
Simulink:

Function:
The model transfer function (Vout/D) for ideal model:
Case1: Vin=30 , D=0.5, Imin:

Graph:
Case 2: Vin=50, D=1/6:
Large signal nonideal model of boost converter using
Simulink:

Function:
Calculations: at D max

The model transfer function (Vout/D) for non ideal


model:
Case1: Vin=30 , D=0.5,Imax:
Case 2: Vin=30, D=0.5, Imin:
Calculations: at D min:
The model transfer function (Vout/D) for non ideal
model:
Case 1: Vin=50, D=1/6,Imax:
Case 2: Vin=50, D=1/6, Imin:
Losses in (Rx and Vx) at D max(0.5) Imax:
Losses in (Rx and Vx) at D max(0.5) Imin:

Losses in (Rx and Vx) at D min(1/6) Imin:


Losses in (Rx and Vx) at D min Imax(1/6):

Efficiency vs Duty:
Efficiency vs Iload:

Components:

PWM Controller:
Diode:

Mosfet
Inductor:

Capacitor:
Comments:
1. Maximum Current Operation
• Inductor Current: High peaks and larger ripple, always above zero (CCM).
• Voltage Ripple: More pronounced.
• Component Stress: Higher due to elevated current

2. Minimum Current Operation


• Inductor Current: Smaller ripple, may drop to zero (DCM).
• Voltage Ripple: Lower and smoother.
• Component Stress: Reduced, enhancing reliability.

3.Efficiency
High efficiency (usually >85%) due to minimal energy loss, but losses occur in
the switch, diode, and inductor.

Conclusion:
This report detailed the design and simulation of a boost converter intended for
a 30V to 50V input and a regulated 60V. The simulation results demonstrate
successful output voltage regulation across the entire input voltage and load
range. A peak efficiency of 96.5% was achieved. The dominant loss
mechanisms were identified as conduction losses in the MOSFET and inductor,
as expected. While the simulated efficiency closely matched theoretical
calculations at lower loads, a slight discrepancy of approximately 2% was
observed at maximum load. This difference is likely attributable to the
simplified inductor model used, which did not account for core losses at higher
frequencies. Future work could involve incorporating a more detailed inductor
model and performing thermal analysis to further refine the design. Overall, the
simulation results validate the design approach and demonstrate the potential for
achieving high efficiency in this boost converter application

You might also like