1 /*

2
3 GraphicsTest.ino
4
5 Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
6
7 Copyright (c) 2016, [email protected]
8 All rights reserved.
9
10 Redistribution and use in source and binary forms, with or without modification,
11 are permitted provided that the following conditions are met:
12
13 * Redistributions of source code must retain the above copyright notice, this list
14 of conditions and the following disclaimer.
15
16 * Redistributions in binary form must reproduce the above copyright notice, this
17 list of conditions and the following disclaimer in the documentation and/or other
18 materials provided with the distribution.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33
34 */
35
36 #include <Arduino.h>
37 #include <U8g2lib.h>
38
39 #ifdef U8X8_HAVE_HW_SPI
40 #include <SPI.h>
41 #endif
42 #ifdef U8X8_HAVE_HW_I2C
43 #include <Wire.h>
44 #endif
45
46
47 /*
48 U8g2lib Example Overview:
49 Frame Buffer Examples: clearBuffer/sendBuffer. Fast, but may not work with all
Arduino boards because of RAM consumption
50 Page Buffer Examples: firstPage/nextPage. Less RAM usage, should work with all
Arduino boards.
51 U8x8 Text Only Example: No RAM usage, direct communication with display
controller. No graphics, 8x8 Text only.
52
53 This is a page buffer example.
54 */
55
56 // Please UNCOMMENT one of the contructor lines below
57 // U8g2 Contructor List (Picture Loop Page Buffer)
58 // The complete list is available here:
https://github.com/olikraus/u8g2/wiki/u8g2setupcpp
59 // Please update the pin numbers according to your setup. Use U8X8_PIN_NONE if the
reset pin is not connected
60 //U8G2_NULL u8g2(U8G2_R0); // null device, a 8x8 pixel display which does nothing
61 //U8G2_SSD1306_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
62 //U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 12, /* dc=*/ 4, /*
reset=*/ 6); // Arduboy (Production, Kickstarter Edition)
63 //U8G2_SSD1306_128X64_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
64 //U8G2_SSD1306_128X64_NONAME_1_3W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* reset=*/ 8);
 65 //U8G2_SSD1306_128X64_NONAME_1_3W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* reset=*/ 8);
66 //U8G2_SSD1306_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
67 //U8G2_SSD1306_128X64_ALT0_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //
same as the NONAME variant, but may solve the "every 2nd line skipped" problem
68 //U8G2_SSD1306_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
reset=*/ 8);
69 //U8G2_SSD1306_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA,
/* reset=*/ U8X8_PIN_NONE); // All Boards without Reset of the Display
70 //U8G2_SSD1306_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 16, /* data=*/ 17, /*
reset=*/ U8X8_PIN_NONE); // ESP32 Thing, pure SW emulated I2C
71 //U8G2_SSD1306_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE, /*
clock=*/ 16, /* data=*/ 17); // ESP32 Thing, HW I2C with pin remapping
72 //U8G2_SSD1306_128X64_NONAME_1_6800 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4,
/*enable=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8);
73 //U8G2_SSD1306_128X64_NONAME_1_8080 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4,
/*enable=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8);
74 //U8G2_SSD1306_128X64_VCOMH0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // same as the NONAME variant, but maximizes setContrast() range
75 //U8G2_SSD1306_128X64_ALT0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // same as the NONAME variant, but may solve the "every 2nd line
skipped" problem
76 //U8G2_SSD1306_102X64_EA_OLEDS102_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9,
/* reset=*/ 8); // same as the NONAME variant, but may solve the "every 2nd line
skipped" problem
77 //U8G2_SSD1312_128X64_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
78 //U8G2_SSD1312_128X64_NONAME_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA,
/* reset=*/ 8);
79 //U8G2_SSD1312_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8);
80 //U8G2_SH1106_128X64_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
81 //U8G2_SH1106_128X64_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
82 //U8G2_SH1106_128X64_VCOMH0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // same as the NONAME variant, but maximizes setContrast() range
83 //U8G2_SH1106_128X64_WINSTAR_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // same as the NONAME variant, but uses updated SH1106 init sequence
84 //U8G2_SH1106_128X32_VISIONOX_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
85 //U8G2_SH1106_128X32_VISIONOX_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
86 //U8G2_SH1106_72X40_WISE_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
87 //U8G2_SH1107_64X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
88 //U8G2_SH1107_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
89 //U8G2_SH1107_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8);
90 //U8G2_SH1107_128X80_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8);
91 //U8G2_SH1107_PIMORONI_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8);
92 //U8G2_SH1107_SEEED_128X128_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA,
/* reset=*/ U8X8_PIN_NONE);
93 //U8G2_SH1107_SEEED_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
94 //U8G2_SH1107_SEEED_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
95 //U8G2_SH1107_HJR_OEL1M0201_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9,
/* reset=*/ 8);
96 //U8G2_SH1107_TK078F288_80X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
97 //U8G2_SH1108_160X160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
98 //U8G2_SH1122_256X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // Enable U8G2_16BIT in u8g2.h
99 //U8G2_SH1122_256X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h
100 //U8G2_SSD1306_128X32_UNIVISION_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 21, /* data=*/ 20,
/* reset=*/ U8X8_PIN_NONE); // Adafruit Feather M0 Basic Proto + FeatherWing OLED
101 //U8G2_SSD1306_128X32_UNIVISION_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/
SDA, /* reset=*/ U8X8_PIN_NONE); // Adafruit Feather ESP8266/32u4 Boards +
FeatherWing OLED
102 //U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
// Adafruit ESP8266/32u4/ARM Boards + FeatherWing OLED
103 //U8G2_SSD1306_128X32_UNIVISION_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE, /*
clock=*/ SCL, /* data=*/ SDA); // pin remapping with ESP8266 HW I2C
104 //U8G2_SSD1306_128X32_WINSTAR_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE, /*
 clock=*/ SCL, /* data=*/ SDA); // pin remapping with ESP8266 HW I2C
105 //U8G2_SSD1306_64X48_ER_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //
EastRising 0.66" OLED breakout board, Uno: A4=SDA, A5=SCL, 5V powered
106 //U8G2_SSD1306_48X64_WINSTAR_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
107 //U8G2_SSD1306_64X32_NONAME_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
108 //U8G2_SSD1306_64X32_1F_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
109 //U8G2_SSD1306_96X16_ER_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //
EastRising 0.69" OLED
110 //U8G2_SSD1306_72X40_ER_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //
EastRising 0.42" OLED
111 //U8G2_SSD1306_96X40_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //
EastRising 0.42" OLED
112 //U8G2_SSD1322_NHD_256X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8G2_16BIT in u8g2.h
113 //U8G2_SSD1322_NHD_256X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Enable U8G2_16BIT in u8g2.h
114 //U8G2_SSD1322_NHD_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
115 //U8G2_SSD1322_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
116 //U8G2_SSD1325_NHD_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
117 //U8G2_SSD1325_NHD_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
118 //U8G2_SSD0323_OS128064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
119 //U8G2_SSD0323_OS128064_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
120 //U8G2_SSD1326_ER_256X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // experimental driver for ER-OLED018-1
121 //U8G2_SSD1327_SEEED_96X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /*
reset=*/ U8X8_PIN_NONE); // Seeedstudio Grove OLED 96x96
122 //U8G2_SSD1327_SEEED_96X96_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); //
Seeedstudio Grove OLED 96x96
123 //U8G2_SSD1327_EA_W128128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
124 //U8G2_SSD1327_EA_W128128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
125 //U8G2_SSD1327_EA_W128128_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 5, /* data=*/ 4, /*
reset=*/ U8X8_PIN_NONE);
126 //U8G2_SSD1327_EA_W128128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); /* Uno:
A4=SDA, A5=SCL, add "u8g2.setBusClock(400000);" into setup() for speedup if possible
*/
127 //U8G2_SSD1327_MIDAS_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
128 //U8G2_SSD1327_MIDAS_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
129 //U8G2_SSD1327_MIDAS_128X128_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE); /*
Uno: A4=SDA, A5=SCL, add "u8g2.setBusClock(400000);" into setup() for speedup if
possible */
130 //U8G2_SSD1327_WS_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
131 //U8G2_SSD1327_WS_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
132 //U8G2_SSD1327_VISIONOX_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/
11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
133 //U8G2_SSD1327_VISIONOX_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
134 //U8G2_SSD1329_128X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
135 //U8G2_SSD1329_128X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
136 //U8G2_SSD1329_96X96_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
137 //U8G2_SSD1329_96X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
138 //U8G2_SSD1329_96X96_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ A4, /* dc=*/ A2, /*
reset=*/ U8X8_PIN_NONE); // Adafruit Feather 32u4 Basic Proto
139 //U8G2_SSD1305_128X32_NONAME_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
140 //U8G2_SSD1305_128X32_NONAME_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
141 //U8G2_SSD1305_128X32_ADAFRUIT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/
 11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
142 //U8G2_SSD1305_128X32_ADAFRUIT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
143 //U8G2_SSD1305_128X64_ADAFRUIT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/
11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
144 //U8G2_SSD1305_128X64_ADAFRUIT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
145 //U8G2_SSD1305_128X64_RAYSTAR_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/
11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
146 //U8G2_SSD1305_128X64_RAYSTAR_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
147 //U8G2_SSD1309_128X64_NONAME0_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/
11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
148 //U8G2_SSD1309_128X64_NONAME0_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
149 //U8G2_SSD1309_128X64_NONAME2_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/
11, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
150 //U8G2_SSD1309_128X64_NONAME2_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
151 //U8G2_SSD1316_128X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
152 //U8G2_SSD1316_128X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
153 //U8G2_SSD1316_96X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
154 //U8G2_SSD1316_96X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
155 //U8G2_SSD1317_96X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // not tested, not confirmed
156 //U8G2_SSD1317_96X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // not tested, not confirmed
157 //U8G2_SSD1318_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
158 //U8G2_SSD1318_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
159 //U8G2_SSD1320_160X132_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
160 //U8G2_SSD1320_160X132_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
161 //U8G2_SSD1320_160X80_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
162 //U8G2_SSD1320_160X80_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
163 //U8G2_LD7032_60X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /* cs=*/
9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board
164 //U8G2_LD7032_60X32_1_4W_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /*
reset=*/ U8X8_PIN_NONE); // NOT TESTED!
165 //U8G2_LD7032_60X32_ALT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /*
cs=*/ 9, /* dc=*/ 10, /* reset=*/ 8); // SW SPI Nano Board
166 //U8G2_LD7032_60X32_ALT_1_4W_SW_I2C u8g2(U8G2_R0, /* clock=*/ 11, /* data=*/ 12, /*
reset=*/ U8X8_PIN_NONE); // NOT TESTED!
167 //U8G2_UC1701_EA_DOGS102_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
168 //U8G2_UC1701_EA_DOGS102_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
169 //U8G2_PCD8544_84X48_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Nokia 5110 Display
170 //U8G2_PCD8544_84X48_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // Nokia 5110 Display
171 //U8G2_PCF8812_96X65_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Could be also PCF8814
172 //U8G2_PCF8812_96X65_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // Could be also PCF8814
173 //U8G2_HX1230_96X68_1_3W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/
10, /* reset=*/ 8);
174 //U8G2_HX1230_96X68_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/
10, /* dc=*/ 9, /* reset=*/ 8);
175 //U8G2_KS0108_128X64_1 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ U8X8_PIN_NONE, /* reset=*/
U8X8_PIN_NONE); // Set R/W to low!
176 //U8G2_KS0108_ERM19264_1 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*dc=*/ 17, /*cs0=*/ 14, /*cs1=*/ 15, /*cs2=*/ 16, /* reset=*/ U8X8_PIN_NONE); //
Set R/W to low!
177 //U8G2_HD44102_100X64_1 u8g2(U8G2_R0, 4, 5, 6, 7, 8, 9, 10, 11, /*enable=*/ 2,
/*dc=*/ 3, /*cs0=*/ A0, /*cs1=*/ A1, /*cs2=*/ A2, /* reset=*/ U8X8_PIN_NONE); //
Set R/W to low!
178 //U8G2_T7932_150X32_1 u8g2(U8G2_R0, 4, 5, 6, 7, 8, 9, 10, 11, /*enable=*/ 2, /*dc=*/
3, /*cs0=*/ A0, /*cs1=*/ A1, /*cs2=*/ A2, /* reset=*/ U8X8_PIN_NONE); // Set R/W
to low!
179 //U8G2_ST7920_256X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE);
180 //U8G2_ST7920_256X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16
/* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE);
181 //U8G2_ST7920_192X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE);
182 //U8G2_ST7920_192X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16
/* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE);
183 //U8G2_ST7920_160X32_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ U8X8_PIN_NONE, /*dc=*/ 17, /*reset=*/ U8X8_PIN_NONE);
184 //U8G2_ST7920_160X32_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16
/* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE);
185 //U8G2_ST7920_128X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18 /*
A4 */, /*cs=*/ U8X8_PIN_NONE, /*dc/rs=*/ 17 /* A3 */, /*reset=*/ 15 /* A1 */); //
Remember to set R/W to 0
186 //U8G2_ST7920_128X64_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 18 /* A4 */ , /* data=*/ 16
/* A2 */, /* CS=*/ 17 /* A3 */, /* reset=*/ U8X8_PIN_NONE);
187 U8G2_ST7920_128X64_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* CS=*/ 10,
/* reset=*/ 8);
188 //U8G2_ST7920_128X64_1_SW_SPI u8g2(U8G2_R0, /* clock=*/ 14, /* data=*/ 13, /* CS=*/
15, /* reset=*/ 16); // Feather HUZZAH ESP8266, E=clock=14, RW=data=13, RS=CS
189 //U8G2_ST7920_128X64_1_HW_SPI u8g2(U8G2_R0, /* CS=*/ 10, /* reset=*/ 8);
190 //U8G2_ST7920_128X64_1_HW_SPI u8g2(U8G2_R0, /* CS=*/ 15, /* reset=*/ 16); // Feather
HUZZAH ESP8266, E=clock=14, RW=data=13, RS=CS
191 //U8G2_ST7528_ERC16064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
192 //U8G2_ST7528_ERC16064_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
193 //U8G2_ST7565_EA_DOGM128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
194 //U8G2_ST7565_EA_DOGM128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
195 //U8G2_ST7565_64128N_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
196 //U8G2_ST7565_64128N_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
197 //U8G2_ST7565_EA_DOGM132_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ U8X8_PIN_NONE); // DOGM132 Shield
198 //U8G2_ST7565_EA_DOGM132_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ U8X8_PIN_NONE); // DOGM132 Shield
199 //U8G2_ST7565_ZOLEN_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
200 //U8G2_ST7565_ZOLEN_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
201 //U8G2_ST7565_LM6059_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Adafruit ST7565 GLCD
202 //U8G2_ST7565_LM6059_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // Adafruit ST7565 GLCD
203 //U8G2_ST7565_KS0713_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // KS0713 controller
204 //U8G2_ST7565_KS0713_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // KS0713 controller
205 //U8G2_ST7565_LX12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
206 //U8G2_ST7565_LX12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
207 //U8G2_ST7565_ERC12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
208 //U8G2_ST7565_ERC12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
209 //U8G2_ST7565_ERC12864_ALT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // contrast improved version for ERC12864
210 //U8G2_ST7565_ERC12864_ALT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // contrast improved version for ERC12864
211 //U8G2_ST7565_NHD_C12832_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
212 //U8G2_ST7565_NHD_C12832_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
 reset=*/ 8);
213 //U8G2_ST7565_NHD_C12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
214 //U8G2_ST7565_NHD_C12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
215 //U8G2_ST7565_JLX12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
216 //U8G2_ST7565_JLX12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
217 //U8G2_ST7567_PI_132X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8); // Pax Instruments Shield, LCD_BL=6
218 //U8G2_ST7567_PI_132X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/
8); // Pax Instruments Shield, LCD_BL=6
219 //U8G2_ST7567_JLX12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8);
220 //U8G2_ST7567_JLX12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/
8);
221 //U8G2_ST7567_122X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8);
222 //U8G2_ST7567_122X32_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/
8);
223 //U8G2_ST7567_OS12864_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 7, /* dc=*/ 9, /* reset=*/ 8);
224 //U8G2_ST7567_OS12864_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 9, /* reset=*/
8);
225 //U8G2_ST7567_ENH_DG128064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
226 //U8G2_ST7567_ENH_DG128064_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
227 //U8G2_ST7567_ENH_DG128064I_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
228 //U8G2_ST7567_ENH_DG128064I_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
229 //U8G2_ST7567_64X32_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
230 //U8G2_ST7567_HEM6432_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ U8X8_PIN_NONE);
231 //U8G2_ST7567_ERC13232_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
232 //U8G2_ST7567_ERC13232_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
233 //U8G2_ST7571_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
234 //U8G2_ST7571_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
235 //U8G2_ST7571_128X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
236 //U8G2_ST7571_128X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
237 //U8G2_ST7586S_JLX384160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
238 //U8G2_ST7586S_ERC240160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
239 //U8G2_ST7586S_YMC240160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
240 //U8G2_ST75160_JM16096_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
241 //U8G2_ST75160_JM16096_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
242 //U8G2_ST75256_JLX172104_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
243 //U8G2_ST75256_JLX172104_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
244 //U8G2_ST75256_JLX19296_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
245 //U8G2_ST75256_JLX19296_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
246 //U8G2_ST75256_JLX256128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this
display
247 //U8G2_ST75256_JLX256128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
248 //U8G2_ST75256_WO256X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this
display
249 //U8G2_ST75256_WO256X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
250 //U8G2_ST75256_JLX256128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 9, /* data=*/ 8, /*
cs=*/ 7, /* dc=*/ 6, /* reset=*/ 5); // MKR Zero, Enable U8g2 16 bit mode for this
display
251 //U8G2_ST75256_JLX256128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 7, /* dc=*/ 6, /*
reset=*/ 5); // MKR Zero, Enable U8g2 16 bit mode for this display
252 //U8G2_ST75256_JLX256160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this
display
253 //U8G2_ST75256_JLX256160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
254 //U8G2_ST75256_JLX256160M_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
255 //U8G2_ST75256_JLX256160M_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
256 //U8G2_ST75256_JLX256160_ALT_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11,
/* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this
display
257 //U8G2_ST75256_JLX256160_ALT_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
258 //U8G2_ST75256_JLX240160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
259 //U8G2_ST75256_JLX240160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
260 //U8G2_ST75256_JLX25664_1_2ND_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); // Due, 2nd I2C,
enable U8g2 16 bit mode for this display
261 //U8G2_ST75320_JLX320240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this
display
262 //U8G2_ST75320_JLX320240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8); // Uno, Enable U8g2 16 bit mode for this display
263 //U8G2_NT7534_TG12864R_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
264 //U8G2_NT7534_TG12864R_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
265 //U8G2_ST7588_JLX12864_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ SCL, /* data=*/ SDA, /*
reset=*/ 5);
266 //U8G2_ST7588_JLX12864_1_HW_I2C u8g2(U8G2_R0, /* reset=*/ 5);
267 //U8G2_IST3020_ERC19264_1_6800 u8g2(U8G2_R0, 44, 43, 42, 41, 40, 39, 38, 37,
/*enable=*/ 28, /*cs=*/ 32, /*dc=*/ 30, /*reset=*/ 31); // Connect WR pin with GND
268 //U8G2_IST3020_ERC19264_1_8080 u8g2(U8G2_R0, 44, 43, 42, 41, 40, 39, 38, 37,
/*enable=*/ 29, /*cs=*/ 32, /*dc=*/ 30, /*reset=*/ 31); // Connect RD pin with 3.3V
269 //U8G2_IST3020_ERC19264_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
270 //U8G2_IST3088_320X240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
271 //U8G2_IST3088_320X240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
272 //U8G2_IST7920_128X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Round display
273 //U8G2_IST7920_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // Round display
274 //U8G2_LC7981_160X80_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND
275 //U8G2_LC7981_160X160_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND
276 //U8G2_LC7981_240X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND
277 //U8G2_LC7981_240X64_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND
278 //U8G2_LC7981_128X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RW with GND
279 //U8G2_SED1520_122X32_1 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*dc=*/ A0, /*e1=*/
A3, /*e2=*/ A2, /* reset=*/ A4); // Set R/W to low!
280 //U8G2_T6963_240X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/
17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1
with GND
281 //U8G2_T6963_256X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17,
/*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with
GND
282 //U8G2_T6963_160X80_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17,
/*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with
 GND
283 //U8G2_T6963_128X64_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/ 17,
/*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1 with
GND
284 //U8G2_T6963_128X64_ALT_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable/wr=*/
17, /*cs/ce=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect RD with +5V, FS0 and FS1
with GND
285 //U8G2_SED1330_240X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 17,
/*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is /WR =
RW, FG with GND, 14=Uno Pin A0
286 //U8G2_SED1330_240X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/
17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // A0 is dc pin, /WR = RW = GND, enable
is /RD = E
287 //U8G2_RA8835_NHD_240X128_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/
17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // Connect /RD = E with +5V, enable is
/WR = RW, FG with GND, 14=Uno Pin A0
288 //U8G2_RA8835_NHD_240X128_1_6800 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/
17, /*cs=*/ 14, /*dc=*/ 15, /*reset=*/ 16); // A0 is dc pin, /WR = RW = GND, enable
is /RD = E
289 //U8G2_UC1601_128X32_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
290 //U8G2_UC1601_128X32_1_3W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* reset=*/ 8);
291 //U8G2_UC1601_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
292 //U8G2_UC1604_JLX19264_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
293 //U8G2_UC1604_JLX19264_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
294 //U8G2_UC1609_SLG19264_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
295 //U8G2_UC1609_SLG19264_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
296 //U8G2_UC1608_ERC24064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due ERC24064-1 Test Setup
297 //U8G2_UC1608_DEM240064_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due ERC24064-1 Test Setup
298 //U8G2_UC1608_ERC240120_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
299 //U8G2_UC1608_240X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due ERC24064-1 Test Setup
300 //U8G2_UC1610_EA_DOGXL160_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ U8X8_PIN_NONE);
301 //U8G2_UC1610_EA_DOGXL160_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ U8X8_PIN_NONE);
302 //U8G2_UC1611_EA_DOGM240_1_2ND_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); // Due, 2nd I2C,
DOGM240 Test Board
303 //U8G2_UC1611_EA_DOGM240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due DOGXL240 Test Board
304 //U8G2_UC1611_EA_DOGXL240_1_2ND_HW_I2C u8g2(U8G2_R0, /* reset=*/ 8); // Due, 2nd
I2C, DOGXL240 Test Board
305 //U8G2_UC1611_EA_DOGXL240_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // SW SPI, Due DOGXL240 Test Board
306 //U8G2_UC1611_EW50850_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/ 18,
/*cs=*/ 3, /*dc=*/ 16, /*reset=*/ 17); // 240x160, Connect RD/WR1 pin with 3.3V, CS
is aktive high
307 //U8G2_UC1611_CG160160_1_8080 u8g2(U8G2_R0, 8, 9, 10, 11, 4, 5, 6, 7, /*enable=*/
18, /*cs=*/ 3, /*dc=*/ 16, /*reset=*/ 17); // Connect WR1 and CD1 pin with 3.3V,
connect CS0 with cs, WR0 with enable, CD with dc
308 //U8G2_UC1611_IDS4073_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Enable U8g2 16Bit Mode
309 //U8G2_UC1611_IDS4073_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8); // Enable U8g2 16Bit Mode
310 //U8G2_UC1617_JLX128128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
311 //U8G2_UC1617_JLX128128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /*
reset=*/ 8);
312 //U8G2_UC1638_192X96_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
313 //U8G2_UC1638_192X96_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
314 //U8G2_UC1638_192X96_1_SW_I2C u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
reset=*/ 8); // u8g2 test board: I2C clock/data is same as SPI, I2C default address
 is 0x78
315 //U8G2_SSD1606_172X72_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // eInk/ePaper Display
316 //U8G2_SSD1607_200X200_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // eInk/ePaper Display, original LUT from
embedded artists
317 //U8G2_SSD1607_GD_200X200_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Good Display
318 //U8G2_SSD1607_WS_200X200_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // Waveshare
319 //U8G2_IL3820_296X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // WaveShare 2.9 inch eInk/ePaper Display,
enable 16 bit mode for this display!
320 //U8G2_IL3820_V2_296X128_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8); // ePaper Display, lesser flickering and
faster speed, enable 16 bit mode for this display!
321 //U8G2_LS013B7DH03_128X128_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/
U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display
322 //U8G2_LS027B7DH01_400X240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/
U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display, SPI Mode 2
323 //U8G2_LS027B7DH01_M0_400X240_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/
U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display, SPI Mode 0
324 //U8G2_LS013B7DH05_144X168_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/
U8X8_PIN_NONE, /* reset=*/ 8); // there is no DC line for this display
325 //U8G2_ST7511_AVD_320X240_1_8080 u8g2(U8G2_R0, 13, 11, 2, 3, 4, 5, 6, A4,
/*enable/WR=*/ 7, /*cs=*/ 10, /*dc=*/ 9, /*reset=*/ 8); // Enable U8g2 16Bit Mode and
connect RD pin with 3.3V/5V
326 //U8G2_S1D15721_240X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /*
cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
327 //U8G2_S1D15721_240X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/
8);
328 //U8G2_GU800_128X64_1_4W_SW_SPI u8g2(U8G2_R0, /* clock=*/ 13, /* data=*/ 11, /* cs=*/
10, /* dc=*/ 9, /* reset=*/ 8);
329 //U8G2_GU800_128X64_1_4W_HW_SPI u8g2(U8G2_R0, /* cs=*/ 10, /* dc=*/ 9, /* reset=*/ 8);
330
331
332
333
334 // End of constructor list
335
336
337 void u8g2_prepare(void) {
338 u8g2.setFont(u8g2_font_6x10_tf);
339 u8g2.setFontRefHeightExtendedText();
340 u8g2.setDrawColor(1);
341 u8g2.setFontPosTop();
342 u8g2.setFontDirection(0);
343 }
344
345 void u8g2_box_title(uint8_t a) {
346 u8g2.drawStr( 10+a*2, 5, "U8g2");
347 u8g2.drawStr( 10, 20, "GraphicsTest");
348
349 u8g2.drawFrame(0,0,u8g2.getDisplayWidth(),u8g2.getDisplayHeight() );
350 }
351
352 void u8g2_box_frame(uint8_t a) {
353 u8g2.drawStr( 0, 0, "drawBox");
354 u8g2.drawBox(5,10,20,10);
355 u8g2.drawBox(10+a,15,30,7);
356 u8g2.drawStr( 0, 30, "drawFrame");
357 u8g2.drawFrame(5,10+30,20,10);
358 u8g2.drawFrame(10+a,15+30,30,7);
359 }
360
361 void u8g2_disc_circle(uint8_t a) {
362 u8g2.drawStr( 0, 0, "drawDisc");
363 u8g2.drawDisc(10,18,9);
364 u8g2.drawDisc(24+a,16,7);
365 u8g2.drawStr( 0, 30, "drawCircle");
366 u8g2.drawCircle(10,18+30,9);
367 u8g2.drawCircle(24+a,16+30,7);
368 }
369
370 void u8g2_r_frame(uint8_t a) {
371 u8g2.drawStr( 0, 0, "drawRFrame/Box");
372 u8g2.drawRFrame(5, 10,40,30, a+1);
373 u8g2.drawRBox(50, 10,25,40, a+1);
374 }
375
376 void u8g2_string(uint8_t a) {
377 u8g2.setFontDirection(0);
378 u8g2.drawStr(30+a,31, " 0");
379 u8g2.setFontDirection(1);
380 u8g2.drawStr(30,31+a, " 90");
381 u8g2.setFontDirection(2);
382 u8g2.drawStr(30-a,31, " 180");
383 u8g2.setFontDirection(3);
384 u8g2.drawStr(30,31-a, " 270");
385 }
386
387 void u8g2_line(uint8_t a) {
388 u8g2.drawStr( 0, 0, "drawLine");
389 u8g2.drawLine(7+a, 10, 40, 55);
390 u8g2.drawLine(7+a*2, 10, 60, 55);
391 u8g2.drawLine(7+a*3, 10, 80, 55);
392 u8g2.drawLine(7+a*4, 10, 100, 55);
393 }
394
395 void u8g2_triangle(uint8_t a) {
396 uint16_t offset = a;
397 u8g2.drawStr( 0, 0, "drawTriangle");
398 u8g2.drawTriangle(14,7, 45,30, 10,40);
399 u8g2.drawTriangle(14+offset,7-offset, 45+offset,30-offset, 57+offset,10-offset);
400 u8g2.drawTriangle(57+offset*2,10, 45+offset*2,30, 86+offset*2,53);
401 u8g2.drawTriangle(10+offset,40+offset, 45+offset,30+offset, 86+offset,53+offset);
402 }
403
404 void u8g2_ascii_1() {
405 char s[2] = " ";
406 uint8_t x, y;
407 u8g2.drawStr( 0, 0, "ASCII page 1");
408 for( y = 0; y < 6; y++ ) {
409 for( x = 0; x < 16; x++ ) {
410 s[0] = y*16 + x + 32;
411 u8g2.drawStr(x*7, y*10+10, s);
412 }
413 }
414 }
415
416 void u8g2_ascii_2() {
417 char s[2] = " ";
418 uint8_t x, y;
419 u8g2.drawStr( 0, 0, "ASCII page 2");
420 for( y = 0; y < 6; y++ ) {
421 for( x = 0; x < 16; x++ ) {
422 s[0] = y*16 + x + 160;
423 u8g2.drawStr(x*7, y*10+10, s);
424 }
425 }
426 }
427
428 void u8g2_extra_page(uint8_t a)
429 {
430 u8g2.drawStr( 0, 0, "Unicode");
431 u8g2.setFont(u8g2_font_unifont_t_symbols);
432 u8g2.setFontPosTop();
433 u8g2.drawUTF8(0, 24, "☀ ☁");
434 switch(a) {
435 case 0:
436 case 1:
437 case 2:
438 case 3:
439 u8g2.drawUTF8(a*3, 36, "☂");
440 break;
441 case 4:
442 case 5:
443 case 6:
444 case 7:
445 u8g2.drawUTF8(a*3, 36, "☔");
446 break;
447 }
448 }
449
450 void u8g2_xor(uint8_t a) {
451 uint8_t i;
452 u8g2.drawStr( 0, 0, "XOR");
453 u8g2.setFontMode(1);
454 u8g2.setDrawColor(2);
455 for( i = 0; i < 5; i++)
456 {
457 u8g2.drawBox(10+i*16, 18 + (i&1)*4, 21,31);
458 }
459 u8g2.drawStr( 5+a, 19, "XOR XOR XOR XOR");
460 u8g2.setDrawColor(0);
461 u8g2.drawStr( 5+a, 29, "CLR CLR CLR CLR");
462 u8g2.setDrawColor(1);
463 u8g2.drawStr( 5+a, 39, "SET SET SET SET");
464 u8g2.setFontMode(0);
465
466 }
467
468 #define cross_width 24
469 #define cross_height 24
470 static const unsigned char cross_bits[] U8X8_PROGMEM = {
471 0x00, 0x18, 0x00, 0x00, 0x24, 0x00, 0x00, 0x24, 0x00, 0x00, 0x42, 0x00,
472 0x00, 0x42, 0x00, 0x00, 0x42, 0x00, 0x00, 0x81, 0x00, 0x00, 0x81, 0x00,
473 0xC0, 0x00, 0x03, 0x38, 0x3C, 0x1C, 0x06, 0x42, 0x60, 0x01, 0x42, 0x80,
474 0x01, 0x42, 0x80, 0x06, 0x42, 0x60, 0x38, 0x3C, 0x1C, 0xC0, 0x00, 0x03,
475 0x00, 0x81, 0x00, 0x00, 0x81, 0x00, 0x00, 0x42, 0x00, 0x00, 0x42, 0x00,
476 0x00, 0x42, 0x00, 0x00, 0x24, 0x00, 0x00, 0x24, 0x00, 0x00, 0x18, 0x00, };
477
478 #define cross_fill_width 24
479 #define cross_fill_height 24
480 static const unsigned char cross_fill_bits[] U8X8_PROGMEM = {
481 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x18, 0x64, 0x00, 0x26,
482 0x84, 0x00, 0x21, 0x08, 0x81, 0x10, 0x08, 0x42, 0x10, 0x10, 0x3C, 0x08,
483 0x20, 0x00, 0x04, 0x40, 0x00, 0x02, 0x80, 0x00, 0x01, 0x80, 0x18, 0x01,
484 0x80, 0x18, 0x01, 0x80, 0x00, 0x01, 0x40, 0x00, 0x02, 0x20, 0x00, 0x04,
485 0x10, 0x3C, 0x08, 0x08, 0x42, 0x10, 0x08, 0x81, 0x10, 0x84, 0x00, 0x21,
486 0x64, 0x00, 0x26, 0x18, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, };
487
488 #define cross_block_width 14
489 #define cross_block_height 14
490 static const unsigned char cross_block_bits[] U8X8_PROGMEM = {
491 0xFF, 0x3F, 0x01, 0x20, 0x01, 0x20, 0x01, 0x20, 0x01, 0x20, 0x01, 0x20,
492 0xC1, 0x20, 0xC1, 0x20, 0x01, 0x20, 0x01, 0x20, 0x01, 0x20, 0x01, 0x20,
493 0x01, 0x20, 0xFF, 0x3F, };
494
495 void u8g2_bitmap_overlay(uint8_t a) {
496 uint8_t frame_size = 28;
497
498 u8g2.drawStr(0, 0, "Bitmap overlay");
499
500 u8g2.drawStr(0, frame_size + 12, "Solid / transparent");
501 u8g2.setBitmapMode(false /* solid */);
502 u8g2.drawFrame(0, 10, frame_size, frame_size);
503 u8g2.drawXBMP(2, 12, cross_width, cross_height, cross_bits);
504 if(a & 4)
505 u8g2.drawXBMP(7, 17, cross_block_width, cross_block_height, cross_block_bits);
506
507 u8g2.setBitmapMode(true /* transparent*/);
508 u8g2.drawFrame(frame_size + 5, 10, frame_size, frame_size);
509 u8g2.drawXBMP(frame_size + 7, 12, cross_width, cross_height, cross_bits);
510 if(a & 4)
511 u8g2.drawXBMP(frame_size + 12, 17, cross_block_width, cross_block_height,
cross_block_bits);
512 }
513
514 void u8g2_bitmap_modes(uint8_t transparent) {
515 const uint8_t frame_size = 24;
516
517 u8g2.drawBox(0, frame_size * 0.5, frame_size * 5, frame_size);
518 u8g2.drawStr(frame_size * 0.5, 50, "Black");
519 u8g2.drawStr(frame_size * 2, 50, "White");
520 u8g2.drawStr(frame_size * 3.5, 50, "XOR");
521
522 if(!transparent) {
523 u8g2.setBitmapMode(false /* solid */);
524 u8g2.drawStr(0, 0, "Solid bitmap");
525 } else {
526 u8g2.setBitmapMode(true /* transparent*/);
527 u8g2.drawStr(0, 0, "Transparent bitmap");
528 }
529 u8g2.setDrawColor(0);// Black
530 u8g2.drawXBMP(frame_size * 0.5, 24, cross_width, cross_height, cross_bits);
531 u8g2.setDrawColor(1); // White
532 u8g2.drawXBMP(frame_size * 2, 24, cross_width, cross_height, cross_bits);
533 u8g2.setDrawColor(2); // XOR
534 u8g2.drawXBMP(frame_size * 3.5, 24, cross_width, cross_height, cross_bits);
535 }
536
537 uint8_t draw_state = 0;
538
539 void draw(void) {
540 u8g2_prepare();
541 switch(draw_state >> 3) {
542 case 0: u8g2_box_title(draw_state&7); break;
543 case 1: u8g2_box_frame(draw_state&7); break;
544 case 2: u8g2_disc_circle(draw_state&7); break;
545 case 3: u8g2_r_frame(draw_state&7); break;
546 case 4: u8g2_string(draw_state&7); break;
547 case 5: u8g2_line(draw_state&7); break;
548 case 6: u8g2_triangle(draw_state&7); break;
549 case 7: u8g2_ascii_1(); break;
550 case 8: u8g2_ascii_2(); break;
551 case 9: u8g2_extra_page(draw_state&7); break;
552 case 10: u8g2_xor(draw_state&7); break;
553 case 11: u8g2_bitmap_modes(0); break;
554 case 12: u8g2_bitmap_modes(1); break;
555 case 13: u8g2_bitmap_overlay(draw_state&7); break;
556 }
557 }
558
559
560 void setup(void) {
561
562 /* U8g2 Project: SSD1306 Test Board */
563 pinMode(10, OUTPUT);
564 pinMode(9, OUTPUT);
565 digitalWrite(10, 0);
566 digitalWrite(9, 0);
567
568 /* U8g2 Project: T6963 Test Board */
569 //pinMode(18, OUTPUT);
570 //digitalWrite(18, 1);
571
572 /* U8g2 Project: KS0108 Test Board */
573 //pinMode(16, OUTPUT);
574 //digitalWrite(16, 0);
575
576 u8g2.begin();
577 //u8g2.setFlipMode(0);
578 }
579
580 void loop(void) {
581 // picture loop
582 u8g2.firstPage();
583 do {
584 draw();
585 } while( u8g2.nextPage() );
586
587 // increase the state
588 draw_state++;
589 if ( draw_state >= 14*8 )
590 draw_state = 0;
591
592 // delay between each page
593 delay(150);
594
595 }
596