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Introduction To 8085 Microprocessor

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Introduction To 8085 Microprocessor

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INTRODUCTION TO 8085 MICROPROCESSOR

Q. 1 : What is microprocessor ?
Ans : a) Microprocessor is a semiconductor, multipurpose, programmable logic device that
reads binary instruction from a memory , accepts binary data as input and process
data according to that instruction and provides desire result.
b) The microprocessor is a semiconductor device consisiting of electronic logic circuits.
It is capable of performing various conputing functions and making decision to
change the sequence of program execution.
Microprocessor
It consists of three parts.
Input / Output
1) ALU ( Arithematic Logic Unit) ALU Registers

2) Registers System Bus

3) Control Unit
Control Unit
Memory
1) ALU ( Arithematic Logic Unit) :
This unit perfroms arithematic operations such as addition , subtraction,
multiplication and division and logical operations such as logical AND , OR and
Exclusive OR.
2) Registers :
These are primarily used to store data temporarily during the execution of program.
3) Control Unit :
This unit provides the necesary logic and control signals to all the operations.
It control the flow of data between the microprocessor and memory and peripheral
devices.
4) Memory :
It stores instruction and provide to the microprocessor whenever necessary.
The microprocessor reads instruction and data from memory. Results are stored into
the memory.
5) Input / Output (I/O) :
This section communicate to the outside world.
Input device : This device are used to transfer data from outside world to the
microprocessor.
Output Device : This device is used to transfer data from microprocessor to the
outside world.
6) System bus :
It is communicating path between microprocessor and peripherals.
1..
Q. 2 : List any three primary functions of CPU of microcomputer.
Ans : The primary functions of CPU of microcomputer are
1) To fetch , decode and execute program instructions in proper order.
2) Transfer data to and from memory and input output sections.
3) Respond to external interrupts.
4) Providing overall timing and control signals.
Q. 3 : Explain the evolution of microprocessor.
Ans : There are five generation.
1) First generation :
a) It is a 4-bit microprocessor.
b) It was developed in 1971 by scientist Fagin.
c) It is used in calculator.
d) In 1972, Intel introduced first general purpose 8-bit microprocessor Intel 8008.
e) It was followed by Intel’s 8080 in 1973 and Motorola’s 6800 in the same year.
e.g. Intel’s 4004(4-bit), 8008(8-bit) , Motorola”s 6800(8-bit)
2) Second generation :
a) In 1974, Intel’s 8080, Zilog’s Z-80, Motorola’s M6800 were introduced.
All these were 8-bit microprocessors.
b) During second generation, the development of microprocessor has been in a
direction to complete microprocessor system (microcontroller) i.e. CPU, ROM,
RAM, clock, I/O ports all in single package.
c) In 1976, INTEL’S 8085, 8-bit microprocessor was introduced .
d) In 1977, 12-bit microprocessor IM6100 and Toshiba’s T8190 developed.
e.g. INTEL’S 8085(8-bit), Zilog’s Z80(8-bit).
3) Third generation :
a) Intel introduced first 16-bit microprocessor 8086 in 1978.
b) It was followed by Zilog’s Z-8000 in 1979 and Motorola’s 68000 in 1980.
c) In third generation, memory space was 64 KB. The other features were full
arithematic execution and efficient higher level language addressing.
e.g. Intel’s 8086 (16-bit) , Zilog Z-8000 (16-bit).
4) Fourth generation :
a) In 1981, Intel inroduced first 32-bit microprocessor 80386. It can address
physical memory of 4 GB.
b) Other 32-bit microprocessor Hewlett Packard’s HP-32 announced in 1982.
c) In 1987, Motorola’s 68020, a 32-bit microprocessor introduced.
e.g. INTEL 80386 (32-bit) , INTEL 80486 (32-bit). 2..
5) Fifth generation :
a) It is a 64 bit microprocessor.
b) The processor is called pentium.
c) System can run on new OS like UNIX and LINUX.
d) Pintium I, Pentium III and Pentium IV are recently introduced microprocessor
by INTEL, INTEL CORE 2 DUO, INTEL XEON are most advanced
microprocessors.
Q. 4 : Draw the neat block diagram of microcomputer system.

KEYBOARD
>

> KEYBOARD INTERFACE


>
Decoder
Address

>
MPU
>

CLOCK
AddressBus
> > Data Bus
> ROM

> RAM >

DISPLAY INTERFACE
> >

DISPLAY
>

3..
Q. 5 : Explain the following blocks of microprocessor.
1) Address Bus :
a) This bus is 16 bit wide.
b) This bus is denoted by A0 to A15.
c) This bus is unidirectional i.e. the data is transferred from microprocessor (MPU)
to peripheral devices.
2) Data Bus :
a) This bus is 8 bit wide.
b) This bus is denoted by D0 to D7.
c) This bus is bidirectional i.e. the data is transferred from microprocessor (MPU)
to peripheral devices and vice versa.
3) Data address Register :
a) These are two 8 bit registers.
b) They are labelled as H ( Higher) and L (Lower).
c) Seperately these registers stored 8 bit data.
d) When these registers are paired then it is called H-L pair and it can store 16 bit
address.
4) Instruction Register : ( IR )
a) This is an 8 bit register.
b) The first byte (i.e. 8 bits) of an instruction is stroed in this register.
5) Instruction Decoder : ( ID )
a) This unit interprets the contents of instruction register. It determines the exact
steps to be followed in executing the entire instruction.
b) It directs the control section accordingly.
6) Arithmetic and Logic unit : ( ALU )
a) This unit performs arithmetic and logic operations.
b) This unit also performs rotate operation.
c) The operations in this unit affects the status register.
d) The results from ALU are stored in accumulator.
7) Accumulator : ( A )
a) Accumulator is 8 bit register.
b) Many time it is treated as a part of ALU.
c) The result of ALU is stroed in accumulator.

4..
8) Status Register : ( Flag Register )
a) Status register consist of flipflops that are set or reset according to data conditions
in accumulator. Status register is also called as flag registers.
9) Program Counter : ( PC )
a) Program counter is 16 bit register.
b) It contains the address of the next instruction to be executed.
c) It can be incremented or reset by the control section.
10) Stack Pointer : ( SP )
a) Stack pointer is also a 16 bit register.
b) It consist of addresses of memory location called stack.
c) Stack is a set of memory locations in R/W memory specified by programmer,
used for temporary strorage.
11) Timing and control unit :
a) This section receives signals from the instruction docoder to determine the nature
of instruction to be executed.
b) Information from status register is also available for conditional branching.
c) Timing and control signals are sent to all parts of microprocessor to coordinate
execution of instructions.
12) Bus buffer and latches :
a) Latch is a flip flop used for to store one bit of information.
b) Information is stored into latch by enabling buffer.
Q. 6 : Explain the following terms.
Ans : 1) Address Bus : a) This bus is 16 bit wide.
b) This bus is denoted by A0 to A15.
c) This bus is unidirectional i.e. the data is transferred from
microprocessor (MPU) to peripheral devices.
2) Data Bus : a) This bus is 8 bit wide.
b) This bus is denoted by D0 to D7.
c) This bus is bidirectional i.e. the data is transferred from
microprocessor (MPU) to peripheral devices and vice versa..
3) Control Bus : a) This bus provides necessary timimg and control signals to all the
operation.
b) It control flow between microprocessor , memory and
peripherals.
c) Control signal in bus are IO/ M , RD and WR 5..
Q. 7 : Explain the features of 8085 microprocessor.
Ans : The main features of 8085 microprocessor is as follows.
1) It is 8 bit microproceesr.
2) It has 16 bit wide address bus and 8 bit wide data bus.
3) 8085 has 40 pin IC.
5) It can address a physical memory of 64 kbytes.
5) Address bus is divide into two groups. The least signficant 8 bits address bus are
transferred on same eight lines of the data bus. Such bus is called as multiplexed
address / data bus.
6) Most significant bits of address are trasferred on address bus.
7) To select memory or I/O devices 8085 used I/O mapped I/O system.
8) To communicate with external devices, 8085 used interrupt method.
9) The 8085 requires +5 v power supply and can operate on 3 MHz single phase clock.
Q. 8 : Draw the pin diagram of 8085 microprocessor.
Ans : The 8085 is housed in a 40 Pin dual - in - line package (DIP).
All the pins of 8085 can be classified into six groups.
1) Address Bus 2) Multiplexed Address / Data bus.
3) Control and status singnals. 4) Power supply and frequency signals.
5) Externally initiated signals. 6) Serial I / O ports.
VCC
GND

SID > X1 X2
A8-A15 Address Bus
>
SOD
TRAP > AD0-AD7
RST 7.5 > Multiplexed Address / data Bus

RST 6.5 >


> ALE
RST 5.5 >
> RD
INTR >
READY > > WR

> IO/M
RESET IN >
HOLD > > S0
>
HLDA
> > S1
INTA

RESET OUT CLK OUT


6..
>
>
a) Address Bus :
1) This bus has 16 address lines.
2) The eight signal lines ( A8 - A15) which are unidirectional and used as the high
order address bus.
3) The lower order address bus (A0 - A7) are multiplexed with bidirectional data bus.
b) Multiplexed Address / Data Bus :
1) 8085 has 8 bit data bus and 16 bit adress bus.
2) The least significant 8 bits of address bus are passed on the same eight lines as that
of data bus i.e. on the signal line AD0 - AD7.
3) This bus is used as dual purpose for lower 8 bits of address bus and 8 bit data bus.
So this bus is known as multiplexed address / data bus.
4) The 8085 has special signal ALE ( Address Latch Enable) for informing peripheral
that this bus acts as a address or data bus.
5) If signal of pin ALE is high i.e. 1 then the bits on AD0-AD7 are address bit otherwise
data bits
3) Control and Status signals :
a) ALE ( (Address Latch Enable) :
i) It is a specialsignal generated by the microprocessor.
ii) It is positive going pulse generated during first clock cycle of machine
state it indicates that bits on AD7 -AD0 are address bits.
b) RD :
i) This is Read control signal. This is active low signal.
ii) This signal indicates that selected I/O or memory device is to be read and
data are available on data bus.
c) WR :
i) This is write control signal. This also active low.
ii) This signal indicates that the data on data bus are to be written into
selected memory or I / O locations.
d) IO/M :
i) This is a status signal used to differentiate between I / O and memory
operation. When it is hight, if indicates an I / O operation. When it is low,
it indicates a memory operation.

7..
e) S1 and S0 :
i) These are status signals. They can identify various operations.
ii) The machine cycle types along with status signals are listed in following figure.

Status Signals Machine Cycle


IO / M S1 S0 Status
0 0 1 Machine Write
0 1 0 Machine Read
1 0 1 I/O Write
1 1 0 I/O Read
0 1 1 OP code fetch
1 1 1 Interrupt Acknowledge
* 0 0 Halt
* x x Hold
* x x Reset

4) Power supply and clock frequency


a) Vcc : + 5V power supply
b) Vss : Ground Reference.
c) X1 and X2 : A crystal having freguency 6 MHz is connected at these two pins.
The freguency is internally divided by two.The system operate at 3 MHz
d) CLK (OUT) : This is clock output. This signal can be used as the system clock for
other devices.
5) Externally Initiated signals
The 8085 five interrupt signals - INTR, RST 7.5, RST 5.5 and TRAP.
These sinals can be used to interrupt a program execution.
a) TRAP :
1) This is vectored interrupt.
2) It is directed to transfer the control to specific memory location
i.e. TRAP = 4.5 x 8 = 0024 H.
3) This is nonmaskable interrupt which cannot be disabled.
4) This interrupt has highest priority.

8..
b) RST 7.5
1) This is vectored interrupt.
2) It is directed to transfer the control to specific memory location
i.e. RST 7.5 = 7.5 x 8 = 003C H.
3) This is maskable interrupt which can be disabled.
4) This interrupt has priority less than TRAP.
c) RST 6.5
1) This is vectored interrupt.
2) It is directed to transfer the control to specific memory location
i.e. RST 6.5 = 6.5 x 8 = 0034 H.
3) This is maskable interrupt which can be disabled.
4) This interrupt has priority less than RST 7.5.
d) RST 5.5
1) This is vectored interrupt.
2) It is directed to transfer the control to specific memory location
i.e. RST 5.5 = 5.5 x 8 = 002C H.
3) This is maskable interrupt which can be disabled.
4) This interrupt has priority less than RST 6.5.
e) INTR :
1) This is interrupt reguest signal.
3) This is maskable interrupt which can be disabled.
4) This interrupt has lowest priority.
6) INTA :
1) This is interrupt acknowledge.
2) When this pin goes low then processor has acknowledged an INTR interrupt.

7) READY :
i) It is input signal used by mocroprocessor to sense whether the periphera devices
is ready to transfer data or not.
ii) If READY is high then peripheral is ready
iii) If the signal at this READY pin is low, the microprocesser enters into a wait state
until it goes high.
ii) This signal is used primarily to synchronize slower peripherals with the
microprocessor.
9..
8) HOLD :
i) When HOLD pin is activated by an external signal, the microprocesser reliquishes
control of buses and allows the external peripherals to use them.
9) HLDA :
i) This is hold acknowledgement.
ii) A HLDA output indicates to a peripheral that HOLD request has been received
and microprocessor relinquishes control on buses for next clock cycle.
iii) After the removal of HOLD request HLDA goes low.
10) RESET IN :
1) When the signal on this pin gose low, the program counter is set to 0000 H.
2) The buses are tristated and MPU is reset.
11) RESET OUT :
1) This signal indicates that the MPU is being reset.
2) The signal can be used to reset other devices.
12) Serial I/O Ports
1) SID : ( Serial Input Data )
1) It is a data line for serial input.
2) The 7th bit of the accumulator in inputed on SID line when RIM
instruction is executed.
3) The SID line elliminates the need of an output port in the software
controlled serial I/O.
2) SOD : ( Serial Output Data )
1) It is a data line for serial output.
2) The 7th bit of the accumulator in outputed on SOD line when SIM
instruction is executed.
3) The SID line elliminates the need of an output port in the software
controlled serial I/O.

10..
Q. 9: Explain hardware interrupt provided by 8085. List them according to their
priority.
Ans : 1) These are the five hardware interrupt.
1) TRAP 2) RST 7.5 3) RST 6.5 4) RST 5.5 5) INTR
2) These are vectored interrupt. That means these interrupts are transferred to the
specific memory locations.
TRAP = 4.5 * 8 = 0024 H RST 7.5= 7.5 *8 = 003C H
RST 6.5= 6.5 * 8 = 0034 H RST 5.5= 5.5 * 8 = 002C H
3) TRAP is non maskable interrupt which cannot be disabled. Others interrupts are
maskable interrupt which can be disabled.
4) TRAP is the highest priority and INTR has lowest priority .
5) The ascending orderof priority is as follows.
1)TRAP 2) RST 7.5 3) RST 6.5 4) RST 5.5 5) INTR

Q. 10 : Explain software interrupt provided by 8085.


Ans : 1) The normal operation of a microprocessor is interrupted by the special
instruction. Such interrupt is called software interrupt.
2) 8085 has eight software interrupts from RST 0 to RST 7.
3) These are also vectored interrupt and transferred to the following specific location

Interrupt Menonics Call Location


RST 0 0000
RST 1 0008
RST 2 0010
RST 3 0018
RST 4 0020
RST 5 0028
RST 6 0030
RST 7 0030

4) These interrupts can not be ignored or maksed.


5) They have more priority than hardware interrupt.
6) They are used in program debugging.
7) After execution of these interrupts program counter will be incremented.
11..
Q. 11 :Differentiate betwen Hardwatre interrupt and Software interrupt .
Ans :
Hardware Interrupt Software interrupt
1) It is used to handle asynchronous events. 1) It is not used to handle asynchronous
events.
2) These interrupts are requested by external 2) These interrupts are not requested by
device. external device but generated in
microprocessor itself.
3) After execution of these interrupts program 3) After execution of these interrupts
counter is not incremented. program counter is incremented.
4) These interrupts may be maskable or non 4) These cannot be masked or ignored.
maskable.
5) They have lower priority than software 5) They have more priority than hardware
interrupt. interrupt.
6) It improves throuput of system. 6) It doesnot improves throuput of system.

Q. 12 : Differentiate between Non maskable and Maskable interrupr.


Ans :
Non maskable interrupt Maskable Interrupt
1) These interrupts can not be masked or 1) These interrupts can be masked or make
cannot make pending. pending.
2) It disable all maskable interrupts. 2) A maskable interrupts cannot disable
any non maskable interrupts.
3) It is used for emrgency purpose like power 3) It is used to interface with peripheral
failure, smoke detectors. devices.
4) It has highest priority than maskable 4) It has lowestpriority than non maskable
interrupts. interrupts.
5) It is always vectored interrupts. 5) It vectored or non vectored interrupts.
6) Response time is low. 6) Response time is high.

12..
Q. 13 : What is vectored and non vectored interrupt ?
Ans : 1) Vectored Interrupt :
It means that when these interrupts are given it is directed to transfer the control to
specific memory location.
Ex. TRAP - 0024 H , RST 7.5 - 003C H , RST 6.5 - 0034 H , RST 5.5 - 002C H
1) Non-Vectored Interrupt :
It means that when these interrupts are given it does not directed to transfer the
control to specific memory location. INTR is non vectores interrupt because it is
only request taken by other device and does not transfer control to any memory
location.
Q. 14 : Whar are maskable and Non maskable interrupt ?
Ans : 1) Maskable interrupt :
1) These interrupts can be masked or made pending.
2) It cannot be disabled by any non maskable interrupt.
3) It has lower priority than non maskable interrupt.
4) It is vectored interrupt.
2) Non Maskable interrupt :
1) These interrupts cannot be masked or made pending.
2) It can disabled all maskable interrupt.
3) It has higher priority than non maskable interrupt.
4) It is vectored interrupt.
Q. 15 : What are I/O and memory mapped I/O schemes ? OR
Write notes on addressing I/O devices.
Ans : 1) I/O mapped I/O :
1) In this case same address may be used for I/O as well as for memory location.
2) 8085 uses this scheme to address I/O devices.
3) Using status signal differentiation between I/O operation and memory operation is
done.
4) When the signal is IO/M is high the address on the address bus is for IO devices and
when this is low then it is for memory devices.
2)Memory mapped I/O :
1) In this scheme whenever address appearing on address bus is for an I/O devicesthen
there is no other information on corresponding memory location.
2) When an address is used to select I/O device then that address is nor used for memory
locations. 13..
Q. 16: Explain the flag registers of 8085 ?
Ans : There are five flags of 8085.
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
Sign Flag Carry Flag
Auxi l i a ry
Zero Flag Parity Flag
Carry Flag

1) S- Sign flag : After execution of arithmetic or logic operation, if bit D7 of result is


1, the sign flag is set i.e S= 1 i.e umber is negative otherwise reset i.e.
S= 0 i.e number is positive.
2) Z - Zero flag : If the result of an operation is zero then zero flag is set i.e. Z=1 ,
otherwise resetm i.e Z= 0.
3) AC - Auxiliary : In an arithmetic operation, when carry is generated from
Carry flag digit D3 to D4 bit then Auxilliary Carry flag is set i.e Ac = 1
otherwise reset i.e. AC= 0.
4) P - Parity flag : If the result of an operation contains even number of 1’s then
parity flag is set i.e. P= 1 otherwise reset i.e P =0.
5) CY - Carry flag : If the carry is generated in the MSB of an arithmetic operation
then Carry flag is set i.e CY = 1 otherwise reset i.e. CY =0.

Q. 17 : An accumulator contains EF H data. Intepret its meaning.


Ans : A = EF H = 1 1 1 0 1 1 1 1
D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
Sign Flag Carry Flag
Auxi l i a ry
Zero Flag Parity Flag
Carry Flag

1 1 1 0 1 1 1 1

1) S - Sign Flag : Sign flag is set i.e S= 1 means the resut is negative.
2) Z - Zerto Flag : Zero flag is set i.e Z= 1 means the result of an operation is zero.
3) AC- Auxilliry : Auxilliry Carry Flag is reset i.e AC= 0 means there is no carry
Carry Flag generated from 3rd bit to 4th bit.
4) P - Parity Flag : Parity flag is set i.e P= 1 means the result of an operation contains
even number of 1’s.
5) CY - Carry Flag : Carry flag is set i.e. CY = 1 means there is carry generated in the
MSB of the operation. 14..
Q. 18 : Explain the organisation of ALU with suitable diagram.
Ans : Block diagram of ALU

ALU Satus Register >

Internal CPU Bus


>
Temporary

>
> >
Register
>
Shifter Binary Adder
>
>
Accumulator
>
>
>

>
1) ALU is 8 bit unit.
2) ALU stands for arithmetic logic unit. It is used to preform arithmetic, Logic, rotate
operation.
3) Binary Adder perform arithmetic opertion like addition, subtraction, increment,
decrement.
4) Shifter perform logical operation like rotate Left, rotate right etc.
Result is placed in accumulator.
5) The result is stored in accumulator.
6) The Temporary register is used to hold data during arithmetic / logic aperation.
7) Flags are set or reset according to the result of operations in status register.

Q. 19 : Draw the diagram of CPU register of Intel 8085 with function of each register..
Draw and explain programming model of 8085 MPU.
Ans :
Program Status PSW (8) A (8) Primary accumulator
Word B (8) C (8)
Secondaryaccumulator
D (8) E (8)
or Data counters
H (8) L (8)
SP (16) Stack pointer
PC (16) Program couner

The 8085 MPU has both 8 and 16 bit registers


1) A (Accumulator ) : It is 8 bit register. It stores result from the ALU.
2) General Purpose Registers : There are six general purpose registers name as
B, C, D, E, H and L.
The valid registers pairs are BC ,DE and HL.
15..
3) Program Counter ( PC ) : It consist of address of the next instruction to be executed.
4) Stack Pointer (SP ): It consist of addresses of memory location called stack.
5) Flag Registers : It shows the status of operation after arithmetic and logical operation.

Q. 20 : Define PSW.
Ans : PSW ( Program Status Word)
1) It rafers to the accumulator and the flag register.
2) The accumulator is the high order register and and flags are the lower order register.
3) Using stack operation line PUSH and POP user can oberve and modified the contents
of flag register using instruction like PUSH PSW.

Q . 21 : Define the following Terms.


Ans : 1) Instruction Cycle : It is defined as the time required to complete the execution of an
instruction. It consists of one to five machine cycles.
2) Machine Cycle : It is defined as the time required to complete any operation such as
I/O or memory. It consists of three to six T states.
3) T state : The subdivision of an operation which is performed in one clock period is
called as T state.
CLOCK

T
State
T1 T2 T3 T1 T2 T3 T4
< < < <
<
< < <
< < < < <
<
<
<
<
Machine Cycle 1 Machine Cycle 2
<
<
Instruction Cycle

Q . 22 : Define the ter Fetch Cycle.


Ans : Fetch Cycle : To load an instruction or piece of data from memory into a CPU’s register.
All instructions must be fetched before they can be executed.
The time it takes to fetch an item is called as fetch cycle or fetch time and is
measured in clock ticks.
16..
Q. 23 : The accumlator contain D6 H data and register C contain 74 H data. What will be the
contents of flags on execution of ADD C instruction.
Ans : A = D6 H = 1101 0110
C = 74 H = 0111 0100
1 0100 1010
Flag regiter contents ara as follows.
S Z AC P CY
0 0 0 0 1
1) Sign flag is reset i.e. result is positive.
2) Zero flag is reset i.e result is nonzero.
3) Auxilliary carry flag is reset i.e there is no carry generated from 3 rd to 4th bit.
4) Parityflag is reset i.e result contain odd number of 1’s.
5) Carry flag is set i.e there is carry generated in the MSB.

Q. 24 : Explain use of extended pairs BC and HL of 8085 microprocesor as pointers with


the help of suitable example.
Ans : 1) Use of pair BC as pointer :
1) BC pair can be used to point memory location for putting data at respective memory
location or taken data to load to another register.
2) Instruction in 8085 BC as a pointer are STAX B , LDAX B.
3) Ex. STAX B
Let B=40 H and C= 00 H and A =55 H. After execution of STAX B instruction
contetnt of accumulator is transferred to memory location whose address is stored
in BC i.e. 4000 H. Then after execution 4000 H = 55 H
2) Use of pair HL as pointer :
1) 8085 microprocessor uses HL pair to point memory location.
2) The instruction used is as follows.
MOV r, M , MOV M,r , LXI H,16 bit data , LDAX H , STAX H
3) Ex. HL =4000 H = 35 H and B=82 H
After execution of MOV B, M B=35 H. It means that contents of memory location
pointed by HL pair is laded into register B.
Q. 25 : What is stack ? Give it related instructions in 8085.
Ans : Stack is part of R/W memory that is used for temporary storage of binary information during
the execution of a program.
Ex. PUSH rp , PUSH PSW , POP rp ,POP PS 17..
Q. 26 : Draw a labelled diagram of generic microprocessor.
OR
Draw a neat simplified block diagram of CPU architecture of microcomputer.

Ans : Block diagram of generic microprocessor.

ALU
< Status Rgegister Temporary <
<
Rgegister
<

< Accumulator <


<
<

Shifter < < Data


<
Adder <
< Bus <
<

< H L
Address
<
<

< Bus < <


<

< Program Counter <

< Stack Pointer <

Instruction Instruction <


Decoder < Register
Write
<

<

<
Timing and Control Unit < Reset
<
Read
<

<

Clock < Clock Interrupt


Controller < INTR

18..
Q.27 : Draw a labelled functional block diagram of microprocessor 8085.
Ans :

INTA SOD
RST RST RST TRAP SID

>
INTR 5.5 6.5 7.5

>
>
>
>

>

>
>
Interrupt Control Serial I/O Control

>

>
>
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Data Bus

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Accumulator Temporary Instruction > Multilexer
Register >
Register
Flag W Z
Register B C
D E
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H L
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Instruction Stack Pointer

> ALU
Decoder Program Counter
Increment
> Decrement
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X1 > Address Buffer Data/ Address Buffer
Timing and Control Unit
X2 >

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A8 - A15
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CLK AD0 - AD7


ALE RD WR S0 S1 IO/M HLDA RESET
OUT Ready HOLD OUT
RESET
IN

19..
Q 28. Select correct alternatives and rewrite the following.
1) The invalid register pair of 8085 microprocessor is _______
a) BC b) HL c) SP d) DE
Ans : c) SP
2) In 8085 microprocessor serial data from external device is received on ____pin.
a) SID b) SOD c) HOLD d) READY
Ans : a) SID
3) _____ bus is one way data path from MPU to all devices.
a) Data b) Address c) Control d) None of these
Ans : b) Address
4) In case of 8085 microprocessor data bus between ALU and accumulator is ____
a) Bidirectinal b) Unidirectional c) Both d) None
Ans : a) Bidirectional
5) PSW is a combination of _______ register.
a) M and F b) H and F c) L and F d) A and F
Ans : d) A and F
6) In 8085 microprocessor ,_____ pin is the only output terminal of interrupt control
block.
a) TRAP b) INTR c) RST 7.5 d) INTA
Ans : d) INTA
7) _____ pin of 8085 is multiplexed.
a) IO/M b) HOLD c) SID d) ALE
Ans : a) IO/M
8) There are _____flags in 8085 microprocessor.
a) 8 b) 6 c) 5 d) 16
Ans : c) 5
9) ____ is used to store 8 bit opcode in 8085.
a) IR b) PC c) SP d) Accumulator
Ans : a) IR
10) In 8085 microprocessor ______pin is used for demultilexing of address / data bus.
a) S0 b) ALE c) IO/M d) HOLD
Ans : b) ALE

20..
11) In CPU ,the register which keep the track of address of next instruction to be fetched
is called _________
a) Instruction register b) Program counter
c) Stack Pointer d) Accumulator
Ans : b) Program Counte
13) Intel 8085 is an ____ bit microprocessor .
a) 16 b) 4 c) 8 d) 32
Ans : c) 8
14) _____ bits of flag register of 8085 microprocessor are unused.
a) 1 b) 2 c) 3 d) 4
Ans : c) 3
15) ______ is a non maskable interrupt.
a) RST 5.5 b) RST 6.5 c) RST 7.5 d) TRAP
Ans : d) TRAP
16) The SIDpin handles______bit at a time.
a) 8 b) 1 c) 4 d) 2
Ans : b) 1
17) 8085 is _____ pin IC.
a) 45 b) 40 c) 35 d) 20
Ans : b) 40
18) ______ is not a vector interrupt.
a) TRAP b) INTR c) RST 5.5 d) RST 6.5
Ans :b) INTR
19) After execution of an arithematic instruction the flag register of 8085 contains 04 H,
this means that the result is ________.
a) Positive b) Nagative c) Floating d) None of these
Ans : a) Positive
20) Stack pointer holds ________
a) 16 bit address b) 16 bit data
c) 8 bit address d) 8 bit dta
Ans : a) 16 bit address

21..
21) The crystal frequency of 8085 is ______ microprocessor is-
a) 6MHz,5MHz b) 3MHz,6MHz
c) 6MHz,3MHz d) 5MHz,6MHz
Ans:c) 6MHz,3MHz
22) CPU generally contains storage device called ______
a) Registers b) ALU c) Timing and control d) Counter
Ans : a) Registers
23) 8085 uses ____V power supply.
a) +5 b) -5 c) +12 d) -12
Ans : a) +5
24) Intel 4004 is a ____ bit microprocessor.
a) 4 b) 44 c) 8 d) 16
Ans : a) 4
25) _____ registers of 8085 is only used during arithematixcal and logical operations and not
for other purpose.
a) ACC b) B c) TEMP d) SP
Ans : c) TEMP
26) Usually operating frequency of 8085 is ____.
a) 3 MHz b) 100 MHz c) 1 MHz d) 20MHz
Ans : a) 3 MHz
27) _____is a 32 bit microprocessor.
a) 8086 b) 80386 c) Intel pentium d) M68000
Ans : b) 80386
28) Microprocessor T8190 is a ____ bit microprocessor.
a) 4 b) 8 c)12 d) 16
Ans : c)12
29) ____ pin of microprocessor 8085 is never tr. stated.
a) SOD b) READY c) ALE d) HOLD
Ans : c) ALE
30) 8085 microprocessor consisits of ______ general purpose registers.
a) 4 b) 6 c) 8 d) 16
Ans : b) 6
31) ______ flag bit is reset wheen flag register contain D4 H.
a) S b) Z c) CY d) AC
Ans : c) CY
32) Microprocessor 8085 is manufactured by ____.
a) Intel b) Motorola c) Zilog d) Toshiba
Ans : a) Intel
33) _____is used to store 8 bit opcode is 8085.
a) IR b) PC c) SP d) Accumulator
Ans : a) IR
34) Microprocessor 8085 has _____ bit wide data bus.
a) 8 b) 16 c) 32 d) 64
Ans : a) 8
35) Microprocessor 8085 has _____ bit wide address bus.
a) 8 b) 16 c) 32 d) 64
Ans : a)16
22..

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