| Reg.no. | | | LL] ] L] B.Tech/ M.Tech (Integrated) DEGREE EXAMINATION, JULY 2024 Third Semester 21CS$201T — COMPUTER ORGANIZATION AND ARCHITECTURE (For the candidates admitted from the academic year 2022-2023 onwards) Note: @ Part A should be answered in OMR sheet within first 40 minutes and OMR sheet should be handed over to hall invigilator at the end of 40" minute. (i) Part - Band Part - C should be answered in answer booklet. Time: 3 Hours Max. Marks: 75 PART — A (20 x 1 = 20Marks) Mans BECO PO Answer ALL Questions 1, The representation of octal number (532.2)s in decimal is. por. (A) 646.25)i0 (B) (532.864):0 (©) G40.67)10 (D) (531.668): 2, 2's compliment of 11001011 is poraid (A) 01010111 @®) 11010100 (C) 00110101 (D) 11100010 ‘The gate which is used to reverse the output obtained is por (A) NOR (B) NAND (©) EXOR (D) NOT 4, are arithmetic gates hora @ Nor (B) NAND & NOR (C) X-OR & X-NOR (D) NOT, AND & OR 5. In register transfer the processor register as 2 (A) MAR (B) PC (©) IR ©) RI 6. A CPU has 12 registers and uses 6 addressing modes. RAM is 64Kx32. 1 1 2! ‘What is the maximum size of the op-code field ifthe instruction has a register operand and a memory address operand’? (A) 8 bits (B) 9 bits (©) 10bits (D) 11 bits 7. Which of the following acts as a temporary storage location to hold an intermediate result in mathematical and logical calculations? (A) RAM (B) Accumulator (C) Program counter (D) Memory address register 8. The bus used to connect the monitor to the CPU is . 1 (A) PCI bus (B) SCSI bus (C) Memory bus (D) RAM bas Page 1of3 1SIF3.21C¢Ss201T10. i 12. 13 14, 15, 16, 17. 18, 19. 20. Page? of 3 Booth’s algorithm is applied on _ (A) Decimal numbers ~ (B) Binary numbers (C) Hexadecimal numbers (D) Octal numbers In IEEE 32-bit representation, the mantissa of the fraction is said to occupy bits. (A) 24 (B) 23 (©) 20 (D) 16 The normalized representation of 0.0010110*25is__ (A) 0 10001000 0010110 (B) 0 10000101 0110 (©) 0 10101010 1110 (D) 0 11110100 11100 The difference between half adder and full adder is (A) Half adder has two inputs while (B) Half adder has one input while full adder has focus inputs full adder has two outputs (C) Half adder has two inputs while (D) Half adder has three inputs while full adder has three inputs full adder has two inputs are the different type/s of generating control signals. (A) Micro-programed (B) Hardwired (C) Micro-instruetion (D) Both micro-programmed and hardwired What does the end instruction do? (A) Itends the generation of a signal (B) It ends the complete generation process (C) Itstarts a new instruction fetch (D) It is used to shift the control to cycle and resets the counter the processor By using pipelining, the latency of the instructions. (A) Increase (B) Remains the same (C) Decrease (D) lis unity Which specific task is not included in super scalar processing? (A) Parallel decoding (B) Super scale instructions (C) Paraltel instructions (D) Pipelines SIMD stands for (A) System instruction multiple data (B) Single instruction multiple data (C) Symmetric instruction multiple (D) Scale instruction multiple data data How many instruction sets does ARM have? (A) One (B) Two (©) Three (D) Four Virtual memory consists of (A) Static RAM (B) Dynamic RAM (C) Magnetic memory (D) Virtual RAM The number successful accesses to memory stated as a fraction is called as (A) Access rate (B) Success rate (C) Hitrate (D) Miss rate 1SIE3-21CSs201T2la. ii. 22.a. 23. a. 24a. 25.a. 26.1. iii. iy, 27, Page3 of 3 PART-B (5 x 8=40 Marks) Answer ALL Questions Convert decimal 23419 to (Binary (i) BCD Gi) Octal (iv) Hexadecimal (OR) Find 2’s complement of (1001)2 and (1010 0011)3. Subtract 1010112 from 1110012 using the 1°s complement method. Describe the basic instruction types in assembly language programming. (OR) Describe addressing mode with example. Apply Booth’s algorithm to multiple the signed numbers +13 and~6. (OR) Divide 14+5 using non restoring division algorithm. Explain the types of hazards. (OR) List the characteristics of hardwired control and the advantages and disadvantages of microprogrammed control unit. Write short notes on memory in multiprocessor system and hardware multithreading, (OR) Discuss in detail about cache coherence problem and the protocol that is used to overcome cache coherence. PART ~ C (1 x 15 = 15 Marks) Answer ANY ONE Question Define Boolean algebra. . Explain the working of 2 logic gate. List the types of logic gate with diagram. Explain any two types of logic gate in detail Explain in detail about parallelism and its types. Rees eo a4 aor 8 2 8 2 83 Boa s 2 82 8 2 2 2 4 2 4 2 4 5 4 Is 2 co co. 1SIF3.-21¢S8201T