ICS 2101: Computer Organization - Complete Notes

Course Overview:

1. Processor Architectures:

- RISC (Reduced Instruction Set): Small, fast instructions for high-speed execution.

- CISC (Complex Instruction Set): Larger, more complex instructions to reduce code size.

- Superscalar: Multiple pipelines to execute multiple instructions at once.

2. Memory Organization:

- Registers, Cache, RAM.

- ROM & External Storage: Non-volatile memory (e.g., hard drives, SSDs, optical disks).

3. System Buses:

- Address Bus (location information), Data Bus (data transfer), Control Bus (commands and

signals).

4. Input/Output (I/O) Systems:

- Programmed I/O, Interrupt-driven I/O, Direct Memory Access (DMA).

5. Operating Systems (OS):

- Schedules and manages resources, ensures protection and efficient operation.

6. Digital Logic:

- Boolean Algebra, Logic Gates, Combinational and Sequential Circuits.

Chapter 1: Introduction to Computer Organization

1. Definition and Key Differences:

- Architecture: Programmer-visible attributes like instruction sets, data types, and I/O mechanisms.

- Organization: Operational units and interconnections implementing the architecture (e.g.,

hardware).

2. Functions of a Computer:

- Data Processing: Perform arithmetic and logic operations.

- Data Storage: Temporary (cache, RAM) and long-term (hard drives).

- Data Movement: Transfer data within the system and externally.

- Control: Managed by Control Unit (CU) to ensure proper execution of instructions.

3. Computer System Components:

- CPU: Controls all operations, including arithmetic and logic.

- Control Unit (CU): Decodes instructions, sends control signals.

- Arithmetic Logic Unit (ALU): Performs calculations and logic operations.

- Registers: Temporary storage for quick data access.

- Memory: Stores programs and data for execution.

- Buses: Data Bus, Address Bus, and Control Bus for communication.

4. System Layers:

- Physical Layer: Hardware (transistors, logic gates).

- Digital Logic Layer: Boolean operations and logic gates to implement instructions.

- Microprogramming Layer: Controls the CU via microcode.

- Operating System Layer: Manages resources, schedules tasks, and interfaces with users.

- Application Layer: Programs interacting with the OS (e.g., word processors, games).
Chapter 2: System Buses

1. Bus Types:

- Address Bus: Carries memory addresses (unidirectional).

- Data Bus: Carries data (bidirectional).

- Control Bus: Sends control signals (e.g., Read, Write) to manage operations.

2. Bus Arbitration:

- Centralized: A single controller assigns the bus.

- Distributed: Devices independently request bus access.

3. Bus Timing:

- Synchronous: Data transfers happen at fixed intervals.

- Asynchronous: Data transfer depends on device readiness, using handshaking signals.

4. Interrupts:

- Mechanism allowing devices to request CPU attention.

- Types:

- Program Interrupts: Errors like division by zero.

- Timer Interrupts: OS functions like task scheduling.

- I/O Interrupts: Data transfer completion.

- Hardware Failure Interrupts: Indicates issues like hardware malfunctions.

Chapter 3: Memory Organization

1. Memory Hierarchy:

- Registers: Fastest but smallest.

- Cache: Speeds up access to frequently used data.

 - RAM: Primary working memory for programs (volatile).

- Hard Drives & SSDs: Large, non-volatile storage for programs and data.

- Tapes: Sequential access for large backups.

2. Cache Memory:

- Stores frequently used data to speed up memory access.

- Replacement Policies:

- FIFO (First In, First Out): Replaces the oldest cached data.

- LRU (Least Recently Used): Replaces the least recently used data.

- LFU (Least Frequently Used): Replaces the least frequently accessed data.

3. Access Methods:

- Sequential: Data is accessed in a fixed order (e.g., tapes).

- Direct: Data location is calculated (e.g., hard drives).

- Random Access: Data can be accessed directly by its address (e.g., RAM).

Chapter 4: External Memory

1. Magnetic Disks (e.g., Hard Drives):

- Data is stored in tracks and sectors on rotating platters.

2. RAID (Redundant Array of Independent Disks):

- RAID 0: No redundancy, speeds up data transfer (striping).

- RAID 1: Data mirrored across two drives for fault tolerance.

- RAID 5: Parity distributed across drives for balance between speed and redundancy.

- Optical Media (e.g., CDs, DVDs): Store data permanently using lasers; read-only or rewritable.

- Magnetic Tapes: Sequential access, used for large-scale backups and storage.
Chapter 5: Input/Output (I/O)

1. I/O Methods:

- Programmed I/O: CPU directly manages I/O operations; inefficient for slow devices.

- Interrupt-Driven I/O: CPU performs other tasks while waiting for I/O to complete.

- DMA (Direct Memory Access): Devices transfer data to/from memory without CPU intervention.

2. Peripherals:

- Human-Readable: Devices like monitors, printers, and keyboards.

- Machine-Readable: Devices like hard drives, sensors, and barcode scanners.

Chapter 6: Operating Systems (OS)

1. OS Functions:

- Scheduling: Decides when tasks run on the CPU.

- Memory Management: Allocates and deallocates memory for programs.

- Process Management: Manages active processes.

- Error Handling: Detects and responds to hardware/software errors.

- Resource Allocation: Manages input/output devices, memory, and processing power.

2. OS Modes:

- Batch Processing: Executes tasks sequentially.

- Time-Sharing: Allows multiple users to share CPU time.

- Real-Time: Handles tasks with strict time constraints.

Chapter 7: Instruction Sets & Addressing Modes

1. Instruction Format:

- Opcode: Specifies the operation (e.g., Add, Subtract).

- Operand(s): Data inputs for the operation.

- Address Field: Location of operands in memory or registers.

2. Addressing Modes:

- Immediate: Operand is part of the instruction.

- Direct: Instruction specifies the address of the operand.

- Indirect: Address points to another address containing the operand.

- Register: Operand stored in a CPU register.

Chapter 8: RISC vs. CISC

1. RISC (Reduced Instruction Set Computers):

- Focuses on simple, fast instructions.

- Optimized for pipelining.

- More registers to minimize memory accesses.

2. CISC (Complex Instruction Set Computers):

- Supports more complex instructions with fewer lines of code.

- More flexible but slower in execution.

Chapter 9: Superscalar Processors

1. Features:

- Executes multiple instructions simultaneously using pipelines.

- Handles dependencies and resolves conflicts during execution.

2. Challenges:

- Data Dependency: One instruction needs results from a previous one.

- Branch Prediction: Anticipates the outcome of branching instructions to avoid delays.

Chapter 10: Parallel Processing

1. Types:

- SMP (Symmetric Multiprocessing): Processors share memory and tasks.

- Clusters: Independent systems working together as one.

- NUMA (Non-Uniform Memory Access): Memory access time varies depending on the processor.

2. Benefits:

- Increases processing power, fault tolerance, and scalability.

Chapter 11: Digital Logic

1. Boolean Algebra:

- Operations: AND, OR, NOT, XOR.

- Simplifies circuit design and analysis.

2. Logic Gates:

- Basic: AND, OR, NOT.

- Derived: NAND, NOR, XOR (functionally complete).

- Combinational Circuits: Output depends only on current inputs (e.g., Adders).

- Sequential Circuits: Output depends on current and past inputs (e.g., Flip-Flops, Counters).

3. Truth Tables:

- Represent all input/output combinations for logic gates.

4. Simplification Techniques:

- Boolean Algebra: Simplify logic expressions.

- Karnaugh Maps: Graphically simplify Boolean expressions.

Chapter 12: Control Unit (CU) and ALU

1. Control Unit (CU):

- Directs all CPU operations and ensures correct instruction sequencing.

- Hardwired: Fixed logic, fast but inflexible.

- Microprogrammed: Uses stored instructions (microcode), more flexible but slower.

2. Arithmetic Logic Unit (ALU):

- Performs arithmetic (addition, subtraction) and logical (AND, OR) operations.

- Operates on data from registers and stores results back in registers.