Chapter 3

Addressing Modes
What Is an Addressing Mode?

 An addressing mode is the process used by a microprocessor to deliver instructions to a

machine so operations can be performed.
 The addressing mode is the method to specify the operand of an instruction. The job of a
microprocessor is to execute a set of instructions stored in memory to perform a specific task.

F Operations require the following:

1. The operator or opcode which determines what will be done

2. The operands which define the data to be used in the operation

For example, if we wanted to add the numbers 1 and 2 and get a result, mathematically we would
likely write this as 1 + 2. In this case, our operator is (+), or the addition, and our operands are the
numbers 1 and 2.

In a microprocessor, the machine needs to be told how to get the operands to perform the operation.
The effective address is a term that describes the address of an operand that is stored in memory.
There are several methods to designate the effective address of those operands or get them directly
from the register. These methods are known as addressing modes.

The 8086 memory addressing modes provide flexible access to memory, allowing you to easily
access variables, arrays, records, pointers, and other complex data types. The key to good
assembly language programming is the proper use of memory addressing modes.

Types of addressing modes

1. Register addressing mode

This mode involves the use of registers. These registers hold the operands. This mode is very fast as
compared to others because CPU does not need to access memory. CPU can directly perform an
operation through registers.

Example: MOV AX, BL

MOV AL, BL

The above two instructions copy the data of BL register to AX and AL.

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2. Immediate Addressing Mode
In this mode, there are two operands. One is a register and the other is a constant value. The register
comes quickly after the op code.

For example:
 The instruction MOV AX, 30H copies hexadecimal value 30H to register AX.
 The instructions MOV BX, 255 copies decimal value 255 to register BX.
You cannot use the immediate addressing mode to load immediate value into segment registers. To
move any value into segment registers, first load that value into a general-purpose register then add
this value into segment register.

3. Direct Addressing Mode

It loads or stores the data from memory to register and vice versa. The instruction consists of a
register and an offset address. To compute physical address, shift left the DS register and add the
offset address into it.
MOV CX, [481]
The hexadecimal value of 481 is 1E1. Assume DS=2162H then the logical address will be
2162:01E1. To compute physical address, shift left the DS register and add it to offset address. The
physical address will be 26120H + 1E1H=26301H. Hence, after execution of the MOV instruction
the contents of the memory location 26301H will be loaded into the register CX. The instruction
MOV [2481], CX will store the CX register content to memory location 26301H.

4. Register Indirect Addressing Mode

The register indirect addressing mode uses the offset address which resides in one of these three
registers i.e., BX, SI, DI. The sum of offset address and the DS value shifted by one position
generates a physical address.
For example: MOV AL, [SI]
This instruction will calculate the physical address by shifting DS to the left by one position and
adding it to the offset address residing in SI. The brackets around SI indicates that the SI contain the
offset address of memory location whose data needs to be accessed. If brackets are absent, then the
instruction will copy the contents of SI register to AL. Therefore, brackets are necessary.

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 5. Based Relative Addressing Mode

This addressing mode uses a base register either BX or BP and a displacement value to calculate
physical address.

Physical Address= Segment Register (Shifted to left by 1) + Effective address

The effective address is the sum of offset register and displacement value. The default segments for
BX and BP are DS and SS.

For example: MOV [BX+5], DX

In this example, the effective address is BX + 5 and the physical address is DS (shifted left) +
BX+5. The instruction on execution will copy the value of DX to memory location of physical
address= DS (shifted left) +BX+5.

6. Indexed Relative Addressing Mode

This addressing mode is same as the based relative addressing mode. The only difference is it uses
DI and SI registers instead of BX and BP registers.

For example: Given that DS=704, SI = 2B2, DI= 145

MOV [DI]+12, AL
This instruction on execution will copy the content of AL at memory address 7197 (7040 + 145 +
12)

7. Based Indexed Addressing Mode

The based indexed addressing mode is actually a combination of based relative addressing mode
and indexed relative addressing mode. It uses one base register (BX, BP) and one index register (SI,
DI).

For example: MOV AX, [BX+SI+20]

The above instruction can also be written as MOV AX, [SI+BX+20] or MOV AX, [SI] [BX] +20

In this case, the physical address will be DS (Shifted left) + SI + BX + 20. Now, if we replace BX
with BP then the physical address is equal to SS (Shifted left) + SI + BX + 20.

Now, let us have a look on these two instructions:

MOV AX, [BX] [BP] +20

MOV AX, [SI] [DI] +20
Both expressions are illegal as this mode supports one base register and one segment register.

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 8. Data memory addressing modes

In these types of addressing modes, the offset address of the operands is mentioned in the
instructions. So, in the Data Memory Addressing mode, first the offset address is calculated after
that memory location is calculated, and then the data stored at that location is fetched.

Some examples of the Data memory Addressing modes are:

MOV AL, [2000H]

MOV AL, [BX]

9. Program Memory Addressing Mode

These types of addressing modes are used in branch instructions like JMP or CALL instruction.

Example: JMP 0006H

Note: The Data memory-addressing mode and the Program Memory Addressing mode are further
categorized into various types about which we will discuss in the upcoming articles.

10. Stack Memory Addressing Mode

The stack memory-addressing mode is used whenever you perform a push or pop operation.
Always a word will be entered or popped from the stack in this addressing mode, and the value of
the Stack Pointer (SP) will be incremented or decremented accordingly. The higher byte of data will
be stored at SP-1 location and the lower byte of data will be stored at the SP-2 memory location.

Example: PUSH BX

Here, suppose BX=1234H and SP=2000H

So, the byte 34H will be stored at 1999H and byte 12H will be stored at 1998H location

Memory

Program, data and stack memories occupy the same memory space. As the most of the processor
instructions use 16-bit pointers the processor can effectively address only 64 KB of memory. To
access memory outside of 64 KB the CPU uses special segment registers to specify where the code,
stack and data 64 KB segments are positioned within 1 MB of memory (see the “Registers” section
below).

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1. Program memory
program can be located anywhere in memory. Jump and call instructions can be
used for short jumps within currently selected 64 KB code segment, as well as for far
jumps anywhere within 1 MB of memory. All conditional jump instructions can be
used to jump within approximately +127 to – 127 bytes from current instruction.
2. Data memory
the processor can access data in any one out of 4 available segments, which limits
the size of accessible memory to 256 KB (if all four segments point to different 64
KB blocks). Accessing data from the Data, Code, Stack or Extra segments can be
usually done by prefixing instructions with the DS:, CS:, SS: or ES: (some registers
and instructions by default may use the ES or SS segments instead of DS segment).
Word data can be located at odd or even byte boundaries. The processor uses two
memory accesses to read 16-bit word located at odd byte boundaries. Reading word
data from even byte boundaries requires only one memory access.
3. Stack memory
It can be placed anywhere in memory. The stack can be located at odd memory
addresses, but it is not recommended for performance reasons.