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Chapter 3 - Assembly and Machine Language-WPS Office

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30 views11 pages

Chapter 3 - Assembly and Machine Language-WPS Office

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wondimuredwan
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© © All Rights Reserved
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Chapter 3: Assembly Level Machine Organization

3.1 Basic Organization of the Von Neumann Machine

The Von Neumann architecture is a computer design model that forms the foundation of most modern
computers. It is characterized by the following key components:

Memory: Stores both data and instructions.

Central Processing Unit (CPU): Executes instructions. It consists of:

Control Unit (CU): Directs the operation of the processor.

Arithmetic Logic Unit (ALU): Performs arithmetic and logical operations.

Input/Output (I/O): Allows communication with external devices.

Registers: Temporary storage for data and instructions within the CPU.

Von Neumann Cycle:

1. Fetch: Retrieve the next instruction from memory.


2. Decode: Interpret the fetched instruction.

3. Execute: Perform the operation specified by the instruction.

4. Store: Save the result back into memory or a register.

---

3.2 Control Unit: Instruction Fetch, Decode, and Execution

The Control Unit (CU) manages the execution of instructions through the Instruction Cycle:

1. Fetch Phase:

The address of the next instruction is loaded from the Program Counter (PC).

The instruction is fetched from memory and placed in the Instruction Register (IR).
2. Decode Phase:

The instruction is decoded by the control unit to determine the operation and required operands.

3. Execute Phase:

The control signals activate the necessary circuits to perform the operation (e.g., ALU operations,
memory access).

4. Write-Back Phase:

Results are written back to memory or registers.

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3.3 Instruction Sets and Types

An Instruction Set is the set of commands understood by a CPU.


Types of Instructions:

1. Data Manipulation Instructions:

Perform arithmetic (ADD, SUB), logical (AND, OR), and shift (SHL, SHR) operations.

2. Control Instructions:

Direct program execution (JUMP, CALL, RET).

3. Input/Output Instructions:

Manage data transfer between CPU and peripherals (IN, OUT).

Example Instructions:

MOV A, B → Move data from register B to register A.


ADD A, B → Add the contents of register B to register A.

JMP LABEL → Jump to the instruction labeled "LABEL".

---

3.4 Assembly/Machine Language Programming

Assembly language serves as an interface between machine code and high-level programming
languages.

Key Concepts:

Mnemonics: Human-readable operation codes (e.g., ADD, MOV).

Operands: Specify the data or memory location involved in the operation.

Assembler: Converts assembly language code into machine code.

Example Program (Addition of Two Numbers):

MOV AX, 5 ; Load 5 into register AX


MOV BX, 3 ; Load 3 into register BX

ADD AX, BX ; Add AX and BX

MOV [RESULT], AX ; Store the result in memory

---

3.5 Instruction Formats

Instructions have specific formats that define their structure.

Common Instruction Formats:

1. Zero-Address Instruction: No explicit operands (e.g., Stack-based operations).

2. One-Address Instruction: One operand explicitly specified.

3. Two-Address Instruction: Two operands explicitly specified.

4. Three-Address Instruction: Three operands explicitly specified.


Example Formats:

Opcode + Operand(s)

ADD AX, BX → Two-address format.

---

3.6 Addressing Modes

Addressing modes define how operands are accessed.

Common Addressing Modes:

1. Immediate Addressing: Operand is directly specified in the instruction.

MOV AX, 5

2. Register Addressing: Operand is in a register.


MOV AX, BX

3. Direct Addressing: Address of the operand is specified.

MOV AX, [1234H]

4. Indirect Addressing: Address of the operand is held in a register.

MOV AX, [BX]

5. Indexed Addressing: Offset is added to a base address.

MOV AX, [BX + SI]


---

3.7 Subroutine Call and Return Mechanisms

A subroutine is a reusable block of code invoked using CALL and terminated using RET.

Mechanism:

1. CALL Instruction:

Saves the return address on the stack.

Transfers control to the subroutine.

2. Subroutine Execution:

Performs the task.

3. RET Instruction:

Retrieves the return address from the stack.


Transfers control back to the calling program.

Example Subroutine:

CALL ADD_NUMBERS

...

ADD_NUMBERS:

MOV AX, BX

ADD AX, CX

RET

---

Summary:

The Von Neumann architecture underpins most modern computers.

The Control Unit governs instruction execution through fetch-decode-execute cycles.

Instruction sets include data manipulation, control, and I/O instructions.


Addressing modes determine how operands are accessed.

Subroutines enable modular programming through CALL and RET instructions.

This chapter provides a foundational understanding of how low-level instructions control and manage
computer hardware efficiently.

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