M27C160

16 Mbit (2 Mb x 8 or 1 Mb x 16) UV EPROM and OTP EPROM

Features
■ 5V ± 10% Supply Voltage in Read Operation
■ Access Time: 50 ns 42 42

■ Byte-wide or Word-wide Configurable

1 1
■ 16 Mbit Mask ROM Replacement FDIP42W (F) PDIP42 (B)
■ Low Power Consumption
– Active Current: 70 mA at 8 MHz
– Standby Current: 100 µA 42

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■ Programming Voltage: 12.5V ± 0.25V
1

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■ Programming Time: 50 µs/word
Electronic Signature
SDIP42 (S)

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■
– Manufacturer Code: 20h
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P
44

– Device Code: B1h

■ ECOPACK® packages available
te 1

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PLCC44 (K) SO44 (M)

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April 2006 Rev 5 1/26

www.st.com 1
 Contents M27C160

Contents

1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.5 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.6 Presto III programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.7
)
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
s
2.8
t(
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
c
2.9
u
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
d
2.10
o
Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11
r
3
e P
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

le t
4 o
DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
s
5 Ob
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1
) -
42-pin Ceramic Frit-seal DIP with window (FDIP42WB) . . . . . . . . . . . . . 19
( s
5.2
5.3 u ct
42-pin Plastic DIP, 600 mils width (PDIP42) . . . . . . . . . . . . . . . . . . . . . . . 20
42-lead Shrink Plastic DIP, 600 mils width (SDIP42) . . . . . . . . . . . . . . . . 21

o d
5.4
5.5 Pr
44-lead Square Plastic Leaded Chip Carrier (PLCC44) . . . . . . . . . . . . . . 22
44-lead Plastic Small Outline, 525 mils body width (SO44) . . . . . . . . . . . 23

et e
6
o l Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

7b s Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
O

2/26
 M27C160 List of tables

List of tables

Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3. Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 5. Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6. Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 7. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 8. AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 9. Read Mode AC Characteristics (-50 and -70) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 10. Read Mode AC Characteristics (-90, -100, -120 and -150) . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 11. Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 12. FDIP42WB package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. PDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 14. SDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 15. PLCC44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
s)
Table 16.
Table 17.
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SO44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 18.
u
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
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 List of figures M27C160

List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. PLCC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. SO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 5. Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. AC Testing Input Output Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 7. AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Word-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Byte-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 10. BYTE Transition AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Programming and Verify Modes AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. FDIP42WB package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 13. PDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 14. SDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 15.
)
PLCC44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
s
Figure 16.
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SO44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

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 M27C160 Summary description

1 Summary description

The M27C160 is a 16-Mbit EPROM offered in two ranges UV (Ultraviolet Erase) and OTP
(One-Time Programmable). It is ideally suited for microprocessor systems requiring large
data or program storage and is organized as either 2 Mbit words of 8 bits or 1 Mbit word of
16 bits. The pin-out is compatible with a 16-Mbit Mask ROM.
The FDIP42W (window ceramic frit-seal package) has a transparent lid which enables the
user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be
written rapidly to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C160 is offered in PDIP42, SDIP42, PLCC44 and SO44 packages.
In order to meet environmental requirements, ST offers the M27C160 in ECOPACK®
packages. ECOPACK packages are Lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
s)
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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connected to this device.
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See Figure 1: Logic diagram and Table 1: Signal names for a brief overview of the signals

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Figure 1. Logic diagram

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VCC

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20
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A0-A19

Ob 15
Q15A–1

) E - M27C160
Q0-Q14

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G

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BYTEVPP

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e P VSS

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5/26
 Summary description M27C160

Table 1. Signal names

Signal Description

A0-A19 Address Inputs

Q0-Q7 Data Outputs
Q8-Q14 Data Outputs
Q15A–1 Data Output / Address Input
E Chip Enable
G Output Enable
BYTEVPP Byte Mode / Program Supply
VCC Supply Voltage
VSS Ground
NC Not Connected Internally

Figure 2. PLCC Connections

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VSS
A17
A18

A19

A10
A11
A5
A6
A7

A8
A9

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A4
A3
1 44
A12
P
A13
r
A2
te A14
A1
A0
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A16
E
VSS
12

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M27C160 34 BYTEVPP
VSS
G
Q0
- O Q15A–1
Q7
Q8

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Q1 Q6
23

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Q9
Q2
Q10
Q3
Q11
NC
VCC
Q4
Q12
Q5
Q13

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6/26
 M27C160 Summary description

Figure 3. DIP Connections

A18 1 42 A19
A17 2 41 A8
A7 3 40 A9
A6 4 39 A10
A5 5 38 A11
A4 6 37 A12
A3 7 36 A13
A2 8 35 A14
A1 9 34 A15
A0 10 33 A16
M27C160
E 11 32 BYTEVPP
VSS 12 31 VSS
G 13 30 Q15A-1
Q0 14 29 Q7
Q8 15 28 Q14
Q1
Q9
16
17
27
26
Q6
Q13
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Q2 18 25 Q5
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Q10
Q3
19
20
24
23
Q12
Q4
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Q11 21 22 VCC
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AI00740

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Figure 4. SO Connections
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NC 1 44 NC
A18
A17
Ob2
3
43
42
A19
A8
A7

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A6 - 4
5
41
40
A9
A10

( sA5 6 39 A11

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A3
7
8
38
37
A12
A13

o d A2 9 36 A14

Pr A1
A0
10
11
M27C160
35
34
A15
A16

et e E 12 33 BYTEVPP

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G
13
14
32
31
VSS
Q15A-1

b s Q0
Q8
15
16
30
29
Q7
Q14

O Q1
Q9
17
18
28
27
Q6
Q13
Q2 19 26 Q5
Q10 20 25 Q12
Q3 21 24 Q4
Q11 22 23 VCC
AI01264

7/26
 Device description M27C160

2 Device description

Table 2 lists the operating modes of the M27C160. A single power supply is required in the
read mode. All inputs are TTL compatible except for VPP and 12V on A9 for the Electronic
Signature.

Table 2. Operating Modes

Mode E G BYTEVPP A9 Q15A–1 Q8-Q14 Q7-Q0

Read Word-wide VIL VIL VIH X Data Out Data Out Data Out
Read Byte-wide Upper VIL VIL VIL X VIH Hi-Z Data Out
Read Byte-wide Lower VIL VIL VIL X VIL Hi-Z Data Out
Output Disable VIL VIH X X Hi-Z Hi-Z Hi-Z
Program VIL Pulse VIH VPP X Data In Data In Data In
Verify VIH VIL VPP X Data Out Data Out
)
Data Out

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Program Inhibit VIH VIH VPP X Hi-Z Hi-Z
t( Hi-Z
Standby VIH X X X Hi-Z
uc
Hi-Z Hi-Z

od
Electronic Signature VIL VIL VIH VID Code Codes Codes

Note: X = VIH or VIL, VID = 12V ± 0.5V.

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2.1 Read mode
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The M27C160 has two organisations, Word-wide and Byte-wide. The organisation is
selected by the signal level on the BYTEVPP pin. When BYTEVPP is at VIH the Word-wide

- O
organisation is selected and the Q15A–1 pin is used for Q15 Data Output. When the

( s )
BYTEVPP pin is at VIL the Byte-wide organisation is selected and the Q15A–1 pin is used for
the Address Input A–1. When the memory is logically regarded as 16 bit wide, but read in

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the Byte-wide organisation, then with A–1 at VIL the lower 8 bits of the 16 bit data are

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selected and with A–1 at VIH the upper 8 bits of the 16 bit data are selected.

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The M27C160 has two control functions, both of which must be logically active in order to
obtain data at the outputs. In addition the Word-wide or Byte- wide organisation must be
P
selected.

e
l et
Chip Enable (E) is the power control and should be used for device selection. Output Enable
(G) is the output control and should be used to gate data to the output pins independent of

s o device selection. Assuming that the addresses are stable, the address access time (tAVQV)

O b is equal to the delay from E to output (tELQV). Data is available at the output after a delay of
tGLQV from the falling edge of G, assuming that E has been low and the addresses have
been stable for at least tAVQV-tGLQV.

2.2 Standby mode

The M27C160 has a standby mode which reduces the active current from 50mA to 100µA.
The M27C160 is placed in the standby mode by applying a CMOS high signal to the E input.

8/26
 M27C160 Device description

When in the standby mode, the outputs are in a high impedance state, independent of the G
input.

2.3 Two-line output control

Because EPROMs are usually used in larger memory arrays, this product features a 2-line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
● the lowest possible memory power dissipation,
● complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.

s)
2.4 System considerations
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The power switching characteristics of Advanced CMOS EPROMs require careful
d u
decoupling of the supplies to the devices. The supply current ICC has three segments of

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importance to the system designer: the standby current, the active current and the transient
peaks that are produced by the falling and rising edges of E.

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The magnitude of the transient current peaks is dependent on the capacitive and inductive
loading of the device outputs. The associated transient voltage peaks can be suppressed by

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complying with the two line output control and by properly selected decoupling capacitors. It
is recommended that a 0.1µF ceramic capacitor is used on every device between VCC and

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VSS. This should be a high frequency type of low inherent inductance and should be placed
as close as possible to the device. In addition, a 4.7µF electrolytic capacitor should be used

) -
between VCC and VSS for every eight devices.

( s
This capacitor should be mounted near the power supply connection point. The purpose of

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this capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.

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2.5
r
Programming
P
ete
When delivered (and after each erasure for UV EPROM), all bits of the M27C160 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.

o l Although only '0's will be programmed, both '1's and '0's can be present in the data word.

b s The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27C160 is in the programming mode when VPP input is at 12.5V, G is at VIH and E is

O pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data output
pins. The levels required for the address and data inputs are TTL. VCC is specified to be
6.25V ± 0.25V.

2.6 Presto III programming algorithm

The Presto III Programming Algorithm allows the whole array to be programed with a
guaranteed margin in a typical time of 52.5 seconds. Programming with Presto III consists of

9/26
 Device description M27C160

applying a sequence of 50µs program pulses to each word until a correct verify occurs (see
Figure 5). During programing and verify operation a Margin mode circuit is automatically
activated to guarantee that each cell is programed with enough margin. No overprogram
pulse is applied since the verify in Margin mode provides the necessary margin to each
programmed cell.

Figure 5. Programming Flowchart

VCC = 6.25V, VPP = 12.5V

n=0

E = 50µs Pulse

NO

++n NO
= 25 VERIFY ++ Addr

)
YES YES

Last NO
t( s
FAIL Addr

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YES

od
CHECK ALL WORDS
BYTEVPP =VIH
P r
1st: VCC = 6V
2nd: VCC = 4.2V
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AI01044B

2.7 Program Inhibit Ob

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Programming of multiple M27C160s in parallel with different data is also easily
(
ct
accomplished. Except for E, all like inputs including G of the parallel M27C160 may be
common. A TTL low level pulse applied to a M27C160's E input and VPP at 12.5V, will

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program that M27C160. A high level E input inhibits the other M27C160s from being
programmed.
r o
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2.8
l et
Program Verify

s o A verify (read) should be performed on the programmed bits to determine that they were
correctly programmed. The verify is accomplished with E at VIH and G at VIL, VPP at 12.5V

O b and VCC at 6.25V.

2.9 Electronic Signature

The Electronic Signature (ES) mode allows the reading out of a binary code from an
EPROM that will identify its manufacturer and type. This mode is intended for use by
programming equipment to automatically match the device to be programmed with its
corresponding programming algorithm. The ES mode is functional in the 25°C ± 5°C

10/26
 M27C160 Device description

ambient temperature range that is required when programming the M27C160. To activate
the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of
the M27C160, with VPP = VCC = 5V. Two identifier bytes may then be sequenced from the
device outputs by toggling address line A0 from VIL to VIH. All other address lines must be
held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer
code and byte 1 (A0 = VIH) the device identifier code. For the STMicroelectronics M27C160,
these two identifier bytes are given in Table 3 and can be read-out on outputs Q7 to Q0.

Table 3. Electronic Signature

Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data

Manufacturer’s Code VIL 0 0 1 0 0 0 0 0 20h

Device Code VIH 1 0 1 1 0 0 0 1 B1h

Note: Outputs Q15-Q8 are set to '0'.

2.10 Erasure operation (applies to UV EPROM)

s)
c t(
The erasure characteristics of the M27C160 is such that erasure begins when the cells are
exposed to light with wavelengths shorter than approximately 4000 Å. It should be noted

d u
that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 Å

r o
range. Research shows that constant exposure to room level fluorescent lighting could
erase a typical M27C160 in about 3 years, while it would take approximately 1 week to
P
cause erasure when exposed to direct sunlight. If the M27C160 is to be exposed to these
e
le t
types of lighting conditions for extended periods of time, it is suggested that opaque labels
be put over the M27C160 window to prevent unintentional erasure. The recommended

s o
erasure procedure for M27C160 is exposure to short wave ultraviolet light which has a
wavelength of 2537 Å. The integrated dose (i.e. UV intensity x exposure time) for erasure

Ob
should be a minimum of 30 W-sec/cm2. The erasure time with this dosage is approximately
30 to 40 minutes using an ultraviolet lamp with 12000 µW/cm2 power rating. The M27C160
-
should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps
)
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have a filter on their tubes which should be removed before erasure.
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 Maximum ratings M27C160

3 Maximum ratings

Table 4. Absolute Maximum Ratings (1)

Symbol Parameter Value Unit

TA Ambient Operating Temperature (2) –40 to 125 °C

TBIAS Temperature Under Bias –50 to 125 °C
TSTG Storage Temperature –65 to 150 °C
VIO (3) Input or Output Voltage (except A9) –2 to 7 V
VCC Supply Voltage –2 to 7 V
(3)
VA9 A9 Voltage –2 to 13.5 V
VPP Program Supply Voltage –2 to 14 V
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute

)
Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and

s
operation of the device at these or any other conditions above those indicated in the Operating sections of

t(
this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality
documents.
2. Depends on range.
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3. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than
20ns.

P r
Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than
20ns.

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 M27C160 DC and AC characteristics

4 DC and AC characteristics

TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC

Table 5. Read Mode DC Characteristics (1)

Symbol Parameter Test Condition Min. Max. Unit

ILI Input Leakage Current 0V ≤ VIN ≤ VCC ±1 µA

ILO Output Leakage Current 0V ≤ VOUT ≤ VCC ±10 µA
E = VIL, G = VIL,
70 mA
IOUT = 0mA, f = 8MHz
ICC Supply Current
E = VIL, G = VIL,
50 mA
IOUT = 0mA, f = 5MHz
ICC1 Supply Current (Standby) TTL E = VIH 1 mA
ICC2 Supply Current (Standby) CMOS E > VCC – 0.2V 100
)
µA

s
t(
IPP Program Current VPP = VCC 10 µA

uc
VIL Input Low Voltage –0.3 0.8 V

od
VIH (2)
Input High Voltage 2 VCC + 1 V

Pr
VOL Output Low Voltage IOL = 2.1mA 0.4 V
VOH Output High Voltage TTL IOH = –400µA 2.4 V

te
le
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Maximum DC voltage on Output is VCC +0.5V.

s o
TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V

Table 6. Ob
Programming Mode DC Characteristics (1)
-
(s)
Symbol Parameter Test Condition Min. Max. Unit

ct
ILI Input Leakage Current 0 ≤ VIN ≤ VCC ±1 µA

du
ICC Supply Current 50 mA
IPP
r o Program Current E = VIL 50 mA

e P
VIL Input Low Voltage –0.3 0.8 V

l et VIH Input High Voltage 2.4

VCC +
0.5
V

s o VOL Output Low Voltage IOL = 2.1mA 0.4 V

O b VOH
VID
Output High Voltage TTL
A9 Voltage
IOH = –2.5mA 3.5
11.5 12.5
V
V
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

13/26
DC and AC characteristics M27C160

Table 7. Capacitance (1)

Symbol Parameter Test Condition Min. Max. Unit

Input Capacitance (except BYTEVPP) VIN = 0V 10 pF

CIN
Input Capacitance (BYTEVPP) VIN = 0V 120 pF
COUT Output Capacitance VOUT = 0V 12 pF
1. Sampled only, not 100% tested.

TA = 25 °C, f = 1 MHz

Table 8. AC Measurement Conditions

Parameter High Speed Standard

Input Rise and Fall Times ≤ 10ns ≤ 20ns

Input Pulse Voltages 0 to 3V 0.4V to 2.4V
Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V

Figure 6. AC Testing Input Output Waveform

s)
High Speed

c t(
3V

d u
1.5V

r o
0V

e P
Standard

le t
2.4V
s o 2.0V

0.4V
Ob 0.8V

-
(s)
AI01822

Figure 7.
c t
AC Testing Load Circuit

u
od
1.3V

Pr 1N914

et e
o l 3.3kΩ

bs
DEVICE
UNDER OUT

O TEST
CL

CL = 30pF for High Speed

CL = 100pF for Standard
CL includes JIG capacitance AI01823B

14/26
 M27C160 DC and AC characteristics

TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC

Table 9. Read Mode AC Characteristics (1) (-50 and -70)

M27C160
Test
Symbol Alt Parameter -50 (2) -70 (2) Unit
Condition
Min. Max. Min. Max.

tAVQV tACC Address Valid to Output Valid E = VIL, G = VIL 50 70 ns

tBHQV tST BYTE High to Output Valid E = VIL, G = VIL 50 70 ns
Chip Enable Low to Output
tELQV tCE G = VIL 50 70 ns
Valid
Output Enable Low to Output
tGLQV tOE E = VIL 30 35 ns
Valid
tBLQZ (3) tSTD BYTE Low to Output Hi-Z E = VIL, G = VIL 30 30 ns

tEHQZ (3)
Chip Enable High to Output
s)
t(
tDF G = VIL 0 25 0 25 ns
Hi-Z

tGHQZ (3) tDF

Output Enable High to
E = VIL 0 25
u
0 c 25 ns
OutputHi-Z

o d
tAXQX tOH
Address Transition to Output
Transition
E = VIL, G = VIL 5
P r 5 ns

tBLQX tOH
BYTE Low to
te
E = VIL, G = VIL 5 5 ns

le
Output Transition

o
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

s
3. Sampled only, not 100% tested.
Ob
2. Speed obtained with High Speed AC measurement conditions.

) -
( s
u ct
o d
Pr
et e
o l
b s
O

15/26
DC and AC characteristics M27C160

Table 10. Read Mode AC Characteristics(1) (-90, -100, -120 and -150)
M27C160
Test
Symbol Alt Parameter -90 (2) -100 (2) -120/-150 (2) Unit
Condition
Min. Max. Min. Max. Min. Max.

Address Valid to Output E = VIL,

tAVQV tACC 90 100 120 ns
Valid G = VIL
BYTE High to Output E = VIL,
tBHQV tST 90 100 120 ns
Valid G = VIL
Chip Enable Low to
tELQV tCE G = VIL 90 100 120 ns
Output Valid
Output Enable Low to
tGLQV tOE E = VIL 45 50 60 ns
Output Valid
BYTE Low to Output Hi- E = VIL,
tBLQZ (3) tSTD 30 40 50 ns
Z G = VIL

s)
t(
Chip Enable High to
tEHQZ (3) tDF G = VIL 0 30 0 40 0 50 ns
Output Hi-Z

tGHQZ (3)
Output Enable High to
u c
tDF
OutputHi-Z
E = VIL 0 30 0

o
40
d 0 50 ns

tAXQX tOH
Address Transition to
Output Transition
E = VIL,
G = VIL
5
P5r 5 ns

BYTE Low to E = VIL,

te
le
tBLQX tOH 5 5 5 ns
Output Transition G = VIL

s o
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

3. Sampled only, not 100% tested.

Ob
2. Speed obtained with High Speed AC measurement conditions.

Figure 8.
) -
Word-Wide Read Mode AC Waveforms

( s
A0-A19

u ct VALID VALID

o d tAVQV tAXQX

Pr tEHQZ

et e tGLQV

o l G

bs
tELQV tGHQZ

Hi-Z

O Q0-Q15

AI00741B

Note: BYTEVPP = VIH.

16/26
M27C160 DC and AC characteristics

Figure 9. Byte-Wide Read Mode AC Waveforms

A–1,A0-A19 VALID VALID

tAVQV tAXQX

tEHQZ
tGLQV

tELQV tGHQZ

Hi-Z
Q0-Q7

AI00742B

Note: BYTEVPP = VIL.

s)
Figure 10. BYTE Transition AC Waveforms
c t(
d u
A0-A19 VALID

r o
e P
A–1 VALID

le t
so
tAVQV tAXQX

BYTEVPP

Ob
) - tBHQV

Q0-Q7
( s DATA OUT

u ct tBLQX

Q8-Q15

o d Hi-Z
DATA OUT

Pr tBLQZ

et e AI00743C

o l
bs
Note: Chip Enable (E) and Output Enable (G) = VIL.

17/26
DC and AC characteristics M27C160

TA = 25 °C; VCC = 6.25V ± 0.25V; VPP = 12.5V ± 0.25V

Table 11. Programming Mode AC Characteristics(1)

Symbol Alt Parameter Test Condition Min Max Unit

tAVEL tAS Address Valid to Chip Enable Low 2 µs

tQVEL tDS Input Valid to Chip Enable Low 2 µs
tVPHAV tVPS VPP High to Address Valid 2 µs
tVCHAV tVCS VCC High to Address Valid 2 µs
tELEH tPW Chip Enable Program Pulse Width 45 55 µs
tEHQX tDH Chip Enable High to Input Transition 2 µs
tQXGL tOES Input Transition to Output Enable Low 2 µs
tGLQV tOE Output Enable Low to Output Valid 120 ns
(2)
tGHQZ tDFP Output Enable High to Output Hi-Z 0 130 ns

tGHAX tAH
Output Enable High to Address
0
s) ns

t(
Transition

c
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.

u
2. Sampled only, not 100% tested.

o d
Figure 11. Programming and Verify Modes AC Waveforms

P r
A0-A19 VALID

te
tAVEL
le
Q0-Q15

tQVEL
b
DATA IN
so tEHQX
DATA OUT

BYTEVPP
- O
(s)
tVPHAV tGLQV tGHQZ
VCC

c t
d utVCHAV tGHAX

E
r o
e P tELEH tQXGL

l et
G

o
bs
PROGRAM VERIFY
AI00744

18/26
 M27C160 Package mechanical data

5 Package mechanical data

5.1 42-pin Ceramic Frit-seal DIP with window (FDIP42WB)

Figure 12. FDIP42WB package outline

A2 A

A1 L α
B1 B e C
eA
D2
eB
D
S
N

K E1 E

s)
t(
1 K1
FDIPW-C

u c
Table 12. FDIP42WB package mechanical data
o d
Symbol
Min.
millimeters

Typ. Max. Min. P r inches

Typ. Max.

te
le
A 5.71 0.225
A1
A2
0.50
3.90
s o 1.78
5.08
0.020
0.154
0.070
0.200
B 0.40
Ob 0.55 0.016 0.022
B1 1.27

) - 1.52 0.050 0.060

C 0.22

( s 0.31 0.009 0.012

ct
D 54.81 2.158

du
D2 50.80 2.000
E 15.24 0.600

r
E1 o 14.50 14.90 0.571 0.587

e P
e 2.29 2.79 0.090 0.110

l et eA
eB
15.40
16.17
15.80
18.32
0.606
0.637
0.622
0.721

s o K 9.32 9.47 0.367 0.373

O b K1
L
11.30
3.18
11.55
4.10
0.445
0.125
0.455
0.161
S 1.52 2.49 0.060 0.098
α 4° 15° 4° 15°
N 42 42

19/26
 Package mechanical data M27C160

5.2 42-pin Plastic DIP, 600 mils width (PDIP42)

Figure 13. PDIP42 package outline

A2 A

A1 L α
B1 B e1 C
eA
D2 eB

D
S
N

E1 E

1
PDIP

Table 13. PDIP42 package mechanical data

s)
millimeters inches
c t(
Symbol
Min. Typ. Max. Min.
d u
Typ. Max.
A 5.08
r o 0.200
A1 0.25 0.010

e P
A2
B
3.56
0.38
4.06
0.53
le t
0.140
0.015
0.160
0.021

so
B1 1.27 1.65 0.050 0.065
C
D
0.20
52.20
Ob
0.36
52.71
0.008
2.055
0.014
2.075
D2
) 50.80 - 2.000
E
( s 15.24 0.600
E1 13.59
ct 13.84 0.535 0.545

du
e1 2.54 0.100
eA
r o 14.99 0.590

e PeB
L
15.24
3.18
17.78
3.43
0.600
0.125
0.700
0.135

l et S 0.86 1.37 0.034 0.054

s o α 0° 10° 0° 10°

O b N 42 42

20/26
 M27C160 Package mechanical data

5.3 42-lead Shrink Plastic DIP, 600 mils width (SDIP42)

Figure 14. SDIP42 package outline

A2 A

A1 L
b2 b e c
eA
D2 eB

D
S
N

E1 E

1
SDIP

Table 14. SDIP42 package mechanical data

s)
millimeters inches
c t(
Symbol
Min. Typ. Max. Min.
d u
Typ. Max.
A 5.08
r o 0.200
A1 0.51 0.020

e P
A2
b
3.05
0.38
3.81
0.46
4.57
0.56
le t
0.120
0.015
0.150
0.018
0.180
0.022

so
b2 0.89 1.02 1.14 0.035 0.040 0.045
c
D
0.23
36.58
0.25
36.83
Ob 0.38
37.08
0.009
1.440
0.010
1.450
0.015
1.460
D2
) 35.60 - 1.402
e
( s 1.78 0.070
E 15.24
ct 16.00 0.600 0.630

du
E1 12.70 13.72 14.48 0.500 0.540 0.570
eA
r o 15.24 0.600

e P
eB
L 2.54 3.30
18.54
3.56 0.100 0.130
0.730
0.140

l et S 0.64 0.025

s o N 42 42

O b

21/26
Package mechanical data M27C160

5.4 44-lead Square Plastic Leaded Chip Carrier (PLCC44)

Figure 15. PLCC44 package outline
D A1
D1 c

1 N
B1

E2 e
E3 E1 E
B

D3 A2

CP
s)
t(
D2

uc
PLCC-B

Table 15. PLCC44 package mechanical data

o d
Symbol
millimeters

P rinches

Min. Typ. Max.

e
Min. Typ. Max.

let
A 4.200 4.570 0.1654 0.1799

so
A1 2.290 3.040 0.0902 0.1197
A2
B
3.650
0.331
Ob3.700
0.533
0.1437
0.0130
0.1457
0.0210
B1 0.661
- 0.812 0.0260 0.0320

(t s)
CP 0.101 0.0040
c 0.510 0.0201
D
u c
17.400 17.650 0.6850 0.6949
D1
o d
16.510 16.662 0.6500 0.6560

Pr
D2
D3
14.990
12.700
16.000 0.5902
0.5000
0.6299

ete E 17.400 17.650 0.6850 0.6949

o l E1 16.510 16.660 0.6500 0.6559

bs
E2 14.990 16.000 0.5902 0.6299
E3 12.700 0.5000
O e
N
1.270
44
0.0500
44

22/26
 M27C160 Package mechanical data

5.5 44-lead Plastic Small Outline, 525 mils body width (SO44)
Figure 16. SO44 package outline

A2 A
C
b e
CP

E EH

1 A1 α L
SO-d

s)
c t(
Table 16. SO44 package mechanical data
millimeters
d
inches u
Symbol
r o
A
Min. Typ. Max.
2.80
Min.

e P Typ. Max.
0.1102
A1 0.10
le t
0.0039

so
A2 2.20 2.30 2.40 0.0866 0.0906 0.0945
b
C
0.35
0.10
0.40
0.15
Ob 0.50
0.20
0.0138
0.0039
0.0157
0.0059
0.0197
0.0079
CP
- 0.08 0.0030

(t s)
D 28.00 28.20 28.40 1.1024 1.1102 1.1181
E
EH
u c
13.20
15.75
13.30
16.00
13.50
16.25
0.5197
0.6201
0.5236
0.6299
0.5315
0.6398
e
o d 1.27 0.0500
L
P
α
r 0.80
8°
0.0315
8°

et e N 44 44

o l
b s
O

23/26
 Part numbering M27C160

6 Part numbering

Table 17. Ordering Information Scheme

Example: M27C160 -70 X M 1

Device Type
M27

Supply Voltage
C = 5V

Device Function
160 = 16 Mbit (2mb x 8 or 1Mb x 16)

Speed
-50 (1) = 50 ns
s)
-70 (1)
= 70 ns
c t(
-90 = 90 ns

d u
-100 = 100 ns
-120 = 120 ns
r o
-150 = 150 ns

e P
VCC Tolerance
le t
blank = ± 10%
s o
X = ± 5%

Ob
Package
) -
F = FDIP42W
( s
ct
B = PDIP42
S = SDIP42
K = PLCC44
d u
M = SO44
r o
e P
l et
Temperature Range
1 = 0 to 70 °C

s o 6 = –40 to 85 °C

O b 1. High Speed, see AC Characteristics section for further information.

For a list of available options (Speed, Package, etc...) or for further information on any
aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.

24/26
 M27C160 Revision history

7 Revision history

Table 18. Document revision history

Date Revision Changes

January 1999 1 First Issue

20-Sep-00 2 AN620 Reference removed
19-Jul-01 3 SDIP42 package added
50ns speed class added, SO44 package mechanical data and drawing
17-Jan-02 4
clarified
Converted to new template. Updated ECOPACK® information.
12-Apr-2006 5
Removed Tape & Reel info.

s)
c t(
d u
r o
e P
le t
s o
Ob
) -
( s
u ct
o d
Pr
et e
o l
b s
O

25/26
 M27C160

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26/26