2nd Outline CS-III Computer Organization and Assembly Language V2 Course Outline Wef by 29-Oct FALL 2024
2nd Outline CS-III Computer Organization and Assembly Language V2 Course Outline Wef by 29-Oct FALL 2024
CLO3 Infer the interrupts and direct memory access the standard I/O PLO2
interfaces.
CLO4 Illustrate the design of a pipelined CPU and cache hierarchy, the need PLO3
for data path & control.
CLO5 Interpret between RAM, ROM, speed, cost, size, cache & virtual PLO5
memory and need for improving cache performance.
Lecture type Class room Lectures, Lab Sessions, Project Presentation
Prerequisites Digital Logic and Design
Follow up
Courses
Textbook Title Edition Authors Publisher Year ISBN
Computer Organization and 10th William Prentice
Architecture Edition Stallings Hall Inc.
GRADE DISTRIBUTION:
Evaluation Type Percentage % Activities
Assignments and Presentations 10 % Min 4 in the semester
Quiz & Projects 10 % Min 4 in the semester
Lab 15 % On weekly basis
Mid-Term 25 % Contents from Week-1 to Week-8
Final-Term 40 % Contents from Week-10-Week-17
Total Points 100
Methods of Evaluation Quizzes, Assignments, Mid and Final Term, Lab Paper, Lab-Projects
Note: Labs are managed and evaluated separately
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COURSE OUTLINE
(COMPUTER ORGANIZATION AND ASSEMBLY LANGUAGE)
Week Topic Lecture No. Relation with Lecture Material Class Activity Tasks
No. CLO
W1. Organization and Architecture, L1. CLO1 Slides: Chapter 0 Activity: Introduction of Homework: Go through the
Why Study Computer Organization and Slides: Chapter 1 each student module handbook
Arch, Structure and Function thoroughly
L2. CLO1 Slides Lecture 1
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Week Topic Lecture No. Relation with Lecture Material Class Activity Tasks
No. CLO
Interrupt-Driven I/O, Interrupt Processing, L28. CLO3
Direct Memory Access
W15. Drawbacks of Programmed & interrupt L29. CLO3 Slides: Chapter 7 Assignment 4:
driven I/O, DMA Function, I/O Channels
and Processors, The External Interface:
L30. CLO3 Quiz 4
Firewire and InfiniBand
W16. Computer Arithmetic, The Arithmetic and L31. CLO4 Slides: Chapter 10
logic unit, Integer Representation, Integer
Arithmetic, CPU Structure and Function
Processor Organization, Register L32. CLO3, CLO4
Organization, Instruction Cycle
W17. Instruction Pipelining, Control Unit L33. CLO5 Slides: Chapter 14
Operations,
Micro Instructions, Control of the Processor L34. CLO5
W18. L35, L36. Final Term Exam
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Computer Organization and Assembly Language
LAB COURSE OUTLINE
S. WEEK TOPIC ACTIVITIES/TASKS
NO. NO.
1. W1 Explore Visible Virtual Machine (VVM).
2. W2 Learn VVM Programming and simulate VVM program.
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