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Lecture20

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Lecture20

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CSC 252/452: Computer Organization

Fall 2024: Lecture 20

Instructor: Yanan Guo

Department of Computer Science


University of Rochester
Carnegie Mellon

Multiprocessing Illustration
Memory
Process 1 Process 2 Process N
Stack Stack Stack
Heap Heap Heap
Data Data Data
Code Code Code

CPU
Registers

2
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Problem 1: Space
Memory
Process 1 Process 2 Process N
Stack Stack Stack
Heap Heap Heap
Data Data Data
Code Code Code

3
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Problem 1: Space
Memory
Process 1 Process 2 Process N
Stack Stack Stack
Heap Heap Heap
Data Data Data
Code Code Code

• Space:
• Each process’s address space is huge (64-bit): can memory hold it
(16GB is just 34-bit)?
• 2^48 bytes is 256 TB
• There are multiple processes, increasing the storage requirement
further

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Recall: Memory Hierarchy


• Solution: store all the data in disk (several TBs typically), and
use memory only for most recently used data
• Of course if a process uses all its address space that won’t be enough, but usually a
process won’t use all 64 bits. So it’s OK.

Hard Disk/
CPU SSD
Main/Physical
Cache Memory Several
Registers (SRAM) (DRAM) TBs
(DFF)
Several GBs

~1 ns 1-10 ns
100 ns
~ 10 us
4
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Recall: Memory Hierarchy


• Solution: store all the data in disk (several TBs typically), and
use memory only for most recently used data
• Of course if a process uses all its address space that won’t be enough, but usually a
process won’t use all 64 bits. So it’s OK.

• Challange: who is moving data back and forth between the DRAM/main
memory/physical memory and the disk?
• Ideally should be managed by the OS, not the programmer.

Hard Disk/
CPU SSD
Main/Physical
Cache Memory Several
Registers (SRAM) (DRAM) TBs
(DFF)
Several GBs

~1 ns 1-10 ns
100 ns
~ 10 us
4
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Problem 2: Security
• Different programs/processes will share the same physical memory
•Or even different uses. A CSUG machine is accessed by all students, but
there is one single physical memory!
• What if a malicious program steals/modifies data from your program?
• If the malicious program get the address of the memory that stores your
password, should it be able to access it? If not, how to prevent it?
• We need isolation.
Hard Disk/
CPU SSD
Main/Physical
Cache Memory Several
Registers (SRAM) (DRAM) TBs
(DFF)
Several GBs

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One Way to Isolate: Segments


• Different processes will have exclusive access to just one part of the
physical memory.
• This is called Segments.
• Need a base register and a bound register for each process. Not
widely used today. x86 still supports it (backward compatibility!)
• Fast but not inflexible. Makes benign sharing hard.

base 1
Program 1 Program 1
bound 1

base 2

Program 2
bound 2
Program 2

Main/Physical
Memory Hard Disk/
SSD 6
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Problem 3: Fragmentation (with Segments)


• Each process gets a continuous chunk of memory. Inflexible.
• What if a process requests more space than any continuous chunk in
memory but smaller than the total free memory?
• This is called “fragmentation”; will talk about this more later.

• Need to allow assigning discontinuous chunks of memory to


processes.
12 MB
Program 1 Program 1

128 MB

Program 2
Program 2
12 MB
Main/Physical
Memory Hard Disk/
SSD 7
Carnegie Mellon

Problem 4: Benign Sharing (with Segments)


• Different programs/processes will share same data: files, libraries, etc.
• No need to have separate copies in the physical memory.
• Would be good to let other processes access part of the current’s
process’ memory based on the “permission”.

Program 1
CPU stdlib.so
stdlib.so
Cache
Registers (SRAM)
(DFF) Program 2
stdlib.so

Main/Physical
Memory Hard Disk/
SSD 8
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The Big Idea: Virtual Memory


Virtual Memory Hard Drive


of Process 1

99

100

101

Process 1 102

103
Physical/Main
104
Memory
105
… 1

2
Virtual Memory 3
of Process 2
… 4

99

100

101

Process 2 102

103

104

105

9
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“Cache” Data in Physical Memory


Virtual Memory Hard Drive


of Process 1

99 Unallocated

100 Data 1

101 …

Process 1 102 Data 2 A …

103 … B …
Physical/Main
104 … C …
Memory
105 … D …

… 1 Data 1

2
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

10
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Allow Using Discontinuous Allocation


Virtual Memory Hard Drive


of Process 1

99 Unallocated

100 Data 1

101 …

Process 1 102 Data 2 A …

103 … B …
Physical/Main
104 … C …
Memory
105 … D …

… 1 Data 1

2
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

11
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Allow Using Discontinuous Allocation


Virtual Memory Hard Drive


of Process 1

99 Unallocated

100 Data 1

101 …

Process 1 102 Data 2 A …

103 … B …
Physical/Main
104 … C …
Memory
105 … D …

… 1 Data 1

2
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

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Page Table
Virtual Memory Hard Drive
Page Table

of Process 1

99 Unallocated Invalid

100 Data 1 1

101 … A

Process 1 102 Data 2 4 A …

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

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Demand Paging
Virtual Memory Hard Drive
Page Table

of Process 1

99 Unallocated Invalid

100 Data 1 1

101 Data X A

Process 1 102 Data 2 4 A Data X

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

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Demand Paging
Virtual Memory Hard Drive
Page Table

of Process 1

99 Unallocated Invalid

100 Data 1 1

101 Data X A

Process 1 102 Data 2 4 A Data X

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

13
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Demand Paging
Virtual Memory Hard Drive
Page Table

of Process 1

99 Unallocated Invalid

100 Data 1 1

101 Data X A

Process 1 102 Data 2 4 A Data X

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2 Data X
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

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Demand Paging
Virtual Memory Hard Drive
Page Table

of Process 1

99 Unallocated Invalid

100 Data 1 1

101 Data X A
2

Process 1 102 Data 2 4 A Data X

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2 Data X
Virtual Memory 3
of Process 2
… 4 Data 2

99

100

101

Process 2 102

103

104

105

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Prevent Unwanted Sharing


Virtual Memory Page Table Hard Drive


of Process 1

of Process 1

99 Unallocated Invalid

100 Data 1 1

Process 1 101 … A
102 Data 2 4 A …

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2
Virtual Memory Page Table 3 Data 3
of Process 2
… …
of Process 2 4 Data 2

99 … O …
O
100 Unallocated P …
Unallocated
101 … P Q …

102 Data 3 3 R …

103 Data 2 4
Process 2
104 … Q
105 … R

… …
14
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Prevent Unwanted Sharing


Virtual Memory Page Table Hard Drive


of Process 1

of Process 1

99 Unallocated Invalid

100 Data 1 1

Process 1 101 … A
102 Data 2 4 A …

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2
Virtual Memory Page Table 3 Data 3
of Process 2
… …
of Process 2 4 Data 2

99 … O …
O
100 Unallocated P …
Unallocated
101 … P Q …

102 Data 3 3 R …

103 Data 2 4
Process 2
104 … Q
105 … R

… …
14
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Enable Benign Sharing


Virtual Memory Page Table Hard Drive


of Process 1

of Process 1

99 Unallocated Invalid

100 Data 1 1

101 … A

Process 1 102 Data 2 4 A …

103 … B B …
Physical/Main
104 … C C …
Memory
105 … D D …

… … 1 Data 1

2
Virtual Memory Page Table 3 Data 3
of Process 2
… …
of Process 2 4 Data 2

99 … O …
O
100 Unallocated P …
Unallocated
101 … P Q …

102 Data 3 3 R …

103 Data 2 4
Process 2
104 … Q
105 … R

… …
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Analogy for Virtual Memory: A Secure Hotel

16
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Analogy for Virtual Memory: A Secure Hotel


• Call a hotel looking for a guest; what happens?
• Front desk routes call to room, does not give out room number
• Guest’s name is a virtual address
• Room number is physical address
• Front desk is doing address translation!

16
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Analogy for Virtual Memory: A Secure Hotel


• Call a hotel looking for a guest; what happens?
• Front desk routes call to room, does not give out room number
• Guest’s name is a virtual address
• Room number is physical address
• Front desk is doing address translation!

• Benefits
• Ease of management: Guest could change rooms (physical
address). You can still find her without knowing it
• Protection: Guest could have block on calls, block on calls from
specific callers (permissions)
• Sharing: Multiple guests (virtual addresses) can share the same
room (physical address)

16
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A System Using Physical Memory Only


Main memory
0:
1:
Physical address 2:
(PA) 3:
CPU 4:
4 5:
6:
7:
8:
...

M-1:

Data word

• Used in “simple” systems like embedded microcontrollers in


devices like cars, elevators, and digital picture frames

17
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A System Using Virtual Memory


Main memory
0:
CPU Chip 1:
Virtual address Physical address
2:
(VA) (PA)
3:
CPU MMU 4:
4100 4 5:
6:
7:
8:
...

M-1:

Data word

• Used in all modern servers, laptops, and smart phones


• One of the great ideas in computer science (back in the 60s)
• MMU: Memory Management Unit; part of the OS 18
Carnegie Mellon

The Big Idea: Virtual Memory

19
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The Big Idea: Virtual Memory


• What Does a Programmer Want?
• Infinitely large, infinitely fast memory
• Strong isolation between processes to prevent unwanted sharing
• Enable wanted sharing

19
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The Big Idea: Virtual Memory


• What Does a Programmer Want?
• Infinitely large, infinitely fast memory
• Strong isolation between processes to prevent unwanted sharing
• Enable wanted sharing
• Virtual memory to the rescue
• Present a large, uniform memory to programmers
• Data in virtual memory by default stays in disk
• Data moves to physical memory (DRAM) “on demand”
• Disks (~TBs) are much larger than DRAM (~GBs), but 10,000x slower.
• Effectively, virtual memory system transparently share the physical
memory across different processes
• Manage the sharing automatically: hardware-software collaborative
strategy (too complex for hardware alone)

19
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Today
• VM basic concepts and operation
• Other critical benefits of VM
• Address translation

20
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VM Concepts
• Virtual memory is an array of N contiguous pages (each page has a certain amount
of continuous bytes).
• Physical memory is also divided into pages. Each physical page (sometimes called
frames) has the same size as a virtual page. Physical memory has way fewer pages.
• A page can either be on the (“uncached”) disk or in the physical memory (“cached”).

Virtual memory Physical memory


0
VP 0 Unallocated
0
VP 1 In-memory PP 0
On-disk PP 1
Unallocated Unoccupied PP 2
In-memory PP 3
15
On-disk
In-memory
VP7 On-disk
31

Physical pages (PPs)


Virtual pages (VPs)
cached in DRAM

21
Carnegie Mellon

VM Concepts
• Virtual memory is an array of N contiguous pages (each page has a certain amount
of continuous bytes).
• Physical memory is also divided into pages. Each physical page (sometimes called
frames) has the same size as a virtual page. Physical memory has way fewer pages.
• A page can either be on the (“uncached”) disk or in the physical memory (“cached”).
What programmers see
Virtual memory Physical memory
0
VP 0 Unallocated
0
VP 1 In-memory PP 0
On-disk PP 1
Unallocated Unoccupied PP 2
In-memory PP 3
15
On-disk
In-memory
VP7 On-disk
31

Physical pages (PPs)


Virtual pages (VPs)
cached in DRAM

21
Carnegie Mellon

VM Concepts
• Virtual memory is an array of N contiguous pages (each page has a certain amount
of continuous bytes).
• Physical memory is also divided into pages. Each physical page (sometimes called
frames) has the same size as a virtual page. Physical memory has way fewer pages.
• A page can either be on the (“uncached”) disk or in the physical memory (“cached”).
What programmers see Assuming page size is 4B
Virtual memory size is 32B
Virtual memory Physical memory Physical memory size is 16B
0
VP 0 Unallocated
0
VP 1 In-memory PP 0
On-disk PP 1
Unallocated Unoccupied PP 2
In-memory PP 3
15
On-disk
In-memory
VP7 On-disk
31

Physical pages (PPs)


Virtual pages (VPs)
cached in DRAM

21
Carnegie Mellon

VM Concepts
• Virtual memory is an array of N contiguous pages (each page has a certain amount
of continuous bytes).
• Physical memory is also divided into pages. Each physical page (sometimes called
frames) has the same size as a virtual page. Physical memory has way fewer pages.
• A page can either be on the (“uncached”) disk or in the physical memory (“cached”).
What programmers see Assuming page size is 4B
Virtual memory size is 32B
Virtual memory Physical memory Physical memory size is 16B
0
VP 0 Unallocated
0
VP 1 In-memory PP 0 3-bit 2-bit
On-disk PP 1
Unallocated Unoccupied PP 2 Virtual page number offset
In-memory PP 3
15
On-disk
In-memory
VP7 On-disk
31

Physical pages (PPs)


Virtual pages (VPs)
cached in DRAM

21
Carnegie Mellon

VM Concepts
• Virtual memory is an array of N contiguous pages (each page has a certain amount
of continuous bytes).
• Physical memory is also divided into pages. Each physical page (sometimes called
frames) has the same size as a virtual page. Physical memory has way fewer pages.
• A page can either be on the (“uncached”) disk or in the physical memory (“cached”).
What programmers see Assuming page size is 4B
Virtual memory size is 32B
Virtual memory Physical memory Physical memory size is 16B
0
VP 0 Unallocated
0
VP 1 In-memory PP 0 3-bit 2-bit
On-disk PP 1
Unallocated Unoccupied PP 2 Virtual page number offset
In-memory PP 3
15
On-disk
In-memory 2-bit 2-bit
VP7 On-disk
31 Physical page number offset
Physical pages (PPs)
Virtual pages (VPs)
cached in DRAM

21
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Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?

22
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Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?
• Use a table to track this. The table is called page table, in which
each virtual page has an entry

22
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Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?
• Use a table to track this. The table is called page table, in which
each virtual page has an entry
• Each entry records whether the corresponding virtual page is
mapped to the physical memory

22
Carnegie Mellon

Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?
• Use a table to track this. The table is called page table, in which
each virtual page has an entry
• Each entry records whether the corresponding virtual page is
mapped to the physical memory
• If mapped, where in the physical memory it is mapped to?

22
Carnegie Mellon

Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?
• Use a table to track this. The table is called page table, in which
each virtual page has an entry
• Each entry records whether the corresponding virtual page is
mapped to the physical memory
• If mapped, where in the physical memory it is mapped to?
• If not mapped, where on the disk is the virtual page?

22
Carnegie Mellon

Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?
• Use a table to track this. The table is called page table, in which
each virtual page has an entry
• Each entry records whether the corresponding virtual page is
mapped to the physical memory
• If mapped, where in the physical memory it is mapped to?
• If not mapped, where on the disk is the virtual page?

• Do you need a page table for each process?

22
Carnegie Mellon

Enabling Data Structure: Page Table


• How do we track which virtual pages are mapped to physical
pages, and where they are mapped?
• Use a table to track this. The table is called page table, in which
each virtual page has an entry
• Each entry records whether the corresponding virtual page is
mapped to the physical memory
• If mapped, where in the physical memory it is mapped to?
• If not mapped, where on the disk is the virtual page?

• Do you need a page table for each process?


• Per-process data structure; managed by the OS kernel

22
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Enabling Data Structure: Page Table


• A page table is an array of page table entries (PTEs) that maps every virtual
page to its physical page, i.e., virtual to physical address translation.
• One PTE for each virtual page.

23
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Enabling Data Structure: Page Table


• A page table is an array of page table entries (PTEs) that maps every virtual
page to its physical page, i.e., virtual to physical address translation.
• One PTE for each virtual page.

Disk

VP 1
VP 2
VP 3
VP 4
VP 6
VP 7 23
Carnegie Mellon

Enabling Data Structure: Page Table


• A page table is an array of page table entries (PTEs) that maps every virtual
page to its physical page, i.e., virtual to physical address translation.
• One PTE for each virtual page.

Valid

PTE 0 0 null
1
1
0
1
0 null
0
Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7 23
Carnegie Mellon

Enabling Data Structure: Page Table


• A page table is an array of page table entries (PTEs) that maps every virtual
page to its physical page, i.e., virtual to physical address translation.
• One PTE for each virtual page.
Physical page
Valid number (PPN) or
disk address
PTE 0 0 null
1
1
0
1
0 null
0
Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7 23
Carnegie Mellon

Enabling Data Structure: Page Table


• A page table is an array of page table entries (PTEs) that maps every virtual
page to its physical page, i.e., virtual to physical address translation.
• One PTE for each virtual page.
Physical memory
Physical page (DRAM)
Valid number (PPN) or
VP 1 PP 0
disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0
Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7 23
Carnegie Mellon

Enabling Data Structure: Page Table


• A page table is an array of page table entries (PTEs) that maps every virtual
page to its physical page, i.e., virtual to physical address translation.
• One PTE for each virtual page.
Physical memory
Physical page (DRAM)
Valid number (PPN) or
VP 1 PP 0
disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0
Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7 23
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Page Hit
•Page hit: reference to VM word that is in physical memory
Physical memory
Physical page (DRAM)
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
24
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Page Hit
•Page hit: reference to VM word that is in physical memory
Physical memory
Physical page (DRAM)
Virtual address
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
24
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Page Fault
•Page fault: reference to VM word that is not in physical memory
Physical memory
Physical page (DRAM)
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
25
Carnegie Mellon

Page Fault
•Page fault: reference to VM word that is not in physical memory
Physical memory
Physical page (DRAM)
Virtual address
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
25
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Handling Page Fault


• Page miss causes page fault (an exception)

Physical memory
Physical page (DRAM)
Virtual address number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
26
Carnegie Mellon

Handling Page Fault


• Page miss causes page fault (an exception)
• Page fault handler selects a victim to be evicted (here VP 4)
Physical memory
Physical page (DRAM)
Virtual address number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 4 PP 3
1
0
1
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
27
Carnegie Mellon

Handling Page Fault


• Page miss causes page fault (an exception)
• Page fault handler selects a victim to be evicted (here VP 4)
Physical memory
Physical page (DRAM)
Virtual address number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 3 PP 3
1
1
0
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 6
VP 7
28
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Handling Page Fault


• Page miss causes page fault (an exception)
• Page fault handler selects a victim to be evicted (here VP 4)
• Offending instruction is restarted: page hit! Physical memory
Physical page (DRAM)
Virtual address number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 3 PP 3
1
1
0
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
Key point: Waiting until the miss to copy the page to VP 6
DRAM is known as demand paging VP 7
29
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Allocating Pages
• Allocating a new page (VP 5) of virtual memory.
Physical memory
Physical page (DRAM)
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 3 PP 3
1
1
0
0 null
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 5
VP 6
VP 7
30
Carnegie Mellon

Allocating Pages
• Allocating a new page (VP 5) of virtual memory.
Physical memory
Physical page (DRAM)
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 3 PP 3
1
1
0
0
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 5
VP 6
VP 7
30
Carnegie Mellon

Allocating Pages
• Allocating a new page (VP 5) of virtual memory.
Physical memory
Physical page (DRAM)
number or
VP 1 PP 0
Valid disk address
VP 2
PTE 0 0 null
VP 7
1 VP 3 PP 3
1
1
0
0
0 Disk
PTE 7 1 VP 1
Memory resident VP 2
page table
VP 3
(DRAM)
VP 4
VP 5
VP 6
VP 7
30
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Virtual Memory Exploits Locality (Again!)


• Virtual memory seems terribly inefficient, but it works because
of locality.

• At any point in time, programs tend to access a set of active


virtual pages called the working set
• Programs with better temporal locality will have smaller working sets

• If ( working set size < main memory size )


• Good performance for one process after initial misses

• If ( SUM(working set sizes) > main memory size )


• Thrashing: Performance meltdown where pages are swapped (copied) in
and out continuously

31
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VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.
• Page size is the same for VM and PM

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.
• Page size is the same for VM and PM
• M << N

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.
• Page size is the same for VM and PM
• M << N
• On a 64-bit machine, virtual memory size = 264

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.
• Page size is the same for VM and PM
• M << N
• On a 64-bit machine, virtual memory size = 264
• Physical memory size is much much smaller:
• iPhone 8: 2 GB (231)
• 15-inch Macbook Pro 2017: 16 GB (234)

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.
• Page size is the same for VM and PM
• M << N
• On a 64-bit machine, virtual memory size = 264
• Physical memory size is much much smaller:
• iPhone 8: 2 GB (231)
• 15-inch Macbook Pro 2017: 16 GB (234)
• Store only the most frequently used pages in the physical memory

32
Carnegie Mellon

VM Concepts Summary
• Conceptually, virtual memory is an array of N pages
• Each virtual page is either in physical memory, or on disk, or
unallocated
• The physical memory (PM) is an array of M pages stored in DRAM.
• Page size is the same for VM and PM
• M << N
• On a 64-bit machine, virtual memory size = 264
• Physical memory size is much much smaller:
• iPhone 8: 2 GB (231)
• 15-inch Macbook Pro 2017: 16 GB (234)
• Store only the most frequently used pages in the physical memory
• If a page is not on the physical memory, have to first swap it from
the disk to the DRAM.

32
Carnegie Mellon

Calculate the Page Table Size


• Assume 4KB page, 4GB virtual memory, each PTE is 8 Bytes

33
Carnegie Mellon

Calculate the Page Table Size


• Assume 4KB page, 4GB virtual memory, each PTE is 8 Bytes
• 4GB/4KB = 1M virtual pages

33
Carnegie Mellon

Calculate the Page Table Size


• Assume 4KB page, 4GB virtual memory, each PTE is 8 Bytes
• 4GB/4KB = 1M virtual pages
• 1M PTEs in a page table

33
Carnegie Mellon

Calculate the Page Table Size


• Assume 4KB page, 4GB virtual memory, each PTE is 8 Bytes
• 4GB/4KB = 1M virtual pages
• 1M PTEs in a page table
• 8MB total size per page table

33
Carnegie Mellon

Calculate the Page Table Size


• Assume 4KB page, 4GB virtual memory, each PTE is 8 Bytes
• 4GB/4KB = 1M virtual pages
• 1M PTEs in a page table
• 8MB total size per page table

• Do you need a page table for each process?

33
Carnegie Mellon

Calculate the Page Table Size


• Assume 4KB page, 4GB virtual memory, each PTE is 8 Bytes
• 4GB/4KB = 1M virtual pages
• 1M PTEs in a page table
• 8MB total size per page table

• Do you need a page table for each process?


• Yes

33
Carnegie Mellon

Where Does Page Table Live?


• It needs to be at a specific location where we can find it
• Some special SRAM?
• In main memory?
• On disk?

34
Carnegie Mellon

Where Does Page Table Live?


• It needs to be at a specific location where we can find it
• Some special SRAM?
• In main memory?
• On disk?

• ~MBs of a page table per process


• Too big for on-chip SRAM (c.f., a L1 cache is ~32 KB)
• Too slow to access in disk
• Put the page table in DRAM, with its start address stored in a
special register (Page Table Base Register). More on this later.

34
Carnegie Mellon

Today
• VM basic concepts and operation
• Other critical benefits of VM
• Address translation

35
Carnegie Mellon

VM as a Tool for Memory Management


• Each process has its own virtual address space
• It can view memory as a simple linear array
• Mapping scatters addresses through physical memory
• Well-chosen mappings can improve locality

0 Address 0
Virtual Physical
translation
Address VP 1 Address
Space for VP 2 PP 2 Space
Process 1: ... (DRAM)
N-1
(e.g., read-only
PP 6
library code)
0
Virtual PP 8
Address VP 1
Space for VP 2
... ...
Process 2:
N-1 M-1
36
Carnegie Mellon

Virtual Memory Enables Sharing


• Simplifying memory allocation
• Each virtual page can be mapped to any physical page
• A virtual page can be stored in different physical pages at different times
• Sharing code and data among processes
• Map virtual pages to the same physical page (here: PP 6)
0 Address 0
Virtual Physical
translation
Address VP 1 Address
Space for VP 2 PP 2 Space
Process 1: ... (DRAM)
N-1
(e.g., read-only
PP 6
library code)
0
Virtual PP 8
Address VP 1
Space for VP 2
... ...
Process 2:
N-1 M-1
37
Carnegie Mellon

VM Provides Further Protection Opportunities


• Extend PTEs with permission bits
• MMU checks these bits on each access (read/write/executable/
accessible only in supervisor mode?)
• Remember buffer overflow attack? Physical
Address Space
Process i: SUP READ WRITE EXEC Address
VP 0: No Yes No Yes PP 6
VP 1: No Yes Yes Yes PP 4
PP 2
VP 2: Yes Yes Yes No PP 2
• PP 4


PP 6

Process j: SUP READ WRITE EXEC Address


PP 8
VP 0: No Yes No Yes PP 9 PP 9
VP 1: Yes Yes Yes Yes PP 6
VP 2: No Yes Yes Yes PP 11 PP 11

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