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Computer Archtecture - Big vs Little Endian

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Lecture5

Computer Archtecture - Big vs Little Endian

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CSC 252/452: Computer Organization

Fall 2024: Lecture 5

Instructor: Yanan Guo

Department of Computer Science

University of Rochester
Carnegie Mellon

Announcements
• Programming Assignment 1 is due on Monday!
• Details:
https://www.cs.rochester.edu/courses/252/spring2021/la
bs/assignment1.html
• Due on Sep. 16th, 11:59 PM
• You have 3 slip days

2
Carnegie Mellon

IEEE 754 Floating Point Standard

• Single precision: 32 bits
s exp frac

1 8-bit 23-bit

• Double precision: 64 bits

s exp frac

1 11-bit 52-bit

• In C language
•float single precision
•double double precision

3
Carnegie Mellon

Floating Point in C 32-bit Machine

Max Value
C Data Type Bits Max Value
(Decimal)

{
char 8 27 - 1 127
short 16 215 - 1 32767
Fixed point
int 32 231 - 1 2147483647
(implicit binary point)
long 64 263 - 1 ~9.2 × 1018

SP floating point float 32 (2 - 2-23) × 2127 ~3.4 × 1038

DP floating point double 64 (2 - 2-52) × 21023 ~1.8 × 10308

4
Carnegie Mellon

Floating Point in C 32-bit Machine

Max Value
C Data Type Bits Max Value
(Decimal)

{
char 8 27 - 1 127
short 16 215 - 1 32767
Fixed point
int 32 231 - 1 2147483647
(implicit binary point)
long 64 263 - 1 ~9.2 × 1018

SP floating point float 32 (2 - 2-23) × 2127 ~3.4 × 1038

DP floating point double 64 (2 - 2-52) × 21023 ~1.8 × 10308

• To represent 231 in fixed-point, you need at least 32 bits

• Because fixed-point is a weighted positional representation
• In floating-point, we directly encode the exponent
• Floating point is based on scientific notation
• Encoding 31 only needs 7 bits in the exp field
4
Carnegie Mellon

Floating Point Conversions/Casting in C

•double/float → int
• Truncates fractional part
• Like rounding toward zero
• Not defined when out of range or NaN

5
Carnegie Mellon

Floating Point Conversions/Casting in C

•double/float → int
• Truncates fractional part
• Like rounding toward zero
• Not defined when out of range or NaN

•int → float
•

s exp frac

1 8-bit 23-bit

5
Carnegie Mellon

Floating Point Conversions/Casting in C

•double/float → int
• Truncates fractional part
• Like rounding toward zero
• Not defined when out of range or NaN

•int → float
• Can’t guarantee exact casting. Will round according to rounding mode

s exp frac

1 8-bit 23-bit

5
Carnegie Mellon

Floating Point Conversions/Casting in C

•double/float → int
• Truncates fractional part
• Like rounding toward zero
• Not defined when out of range or NaN

•int → float
• Can’t guarantee exact casting. Will round according to rounding mode

s exp frac

1 8-bit 23-bit
• int → double
•

s exp frac

1 11-bit 52-bit
5
Carnegie Mellon

Floating Point Conversions/Casting in C

•double/float → int
• Truncates fractional part
• Like rounding toward zero
• Not defined when out of range or NaN

•int → float
• Can’t guarantee exact casting. Will round according to rounding mode

s exp frac

1 8-bit 23-bit
• int → double
• Exact conversion

s exp frac

1 11-bit 52-bit
5
Carnegie Mellon

So far in 252…
int, float
C Program if, else
+, -, >>

6
Carnegie Mellon

So far in 252…
int, float
C Program if, else
+, -, >>

00001111
Machine
01010101
Code 11110000

6
Carnegie Mellon

So far in 252…
int, float
C Program if, else
+, -, >>
Compiler
ret, call
Assembly fadd, add
Program jmp, jne

00001111
Machine
01010101
Code 11110000

6
Carnegie Mellon

So far in 252…
int, float
C Program if, else
+, -, >>
Semantically
Compiler Equivalent
ret, call
Assembly fadd, add
Program jmp, jne

00001111
Machine
01010101
Code 11110000

6
Carnegie Mellon

So far in 252…
int, float
C Program if, else
+, -, >>
Semantically
Compiler Equivalent
ret, call
Assembly fadd, add
Program jmp, jne
Assembler
00001111
Machine
01010101
Code 11110000

6
Carnegie Mellon

So far in 252…
int, float
C Program if, else
+, -, >>
Semantically
Compiler Equivalent
ret, call
Assembly fadd, add
Program jmp, jne
Semantically
Assembler Equivalent
00001111
Machine
01010101
Code 11110000

6
Carnegie Mellon

NAND Gate
Transistor
NOR Gate
6
Carnegie Mellon

So far in 252…
High-Level
C Program
Language

Assembly
Program

Machine
Code

Processor

Transistor
7
Carnegie Mellon

Processor

Transistor
7
Carnegie Mellon

So far in 252…
High-Level
C Program • ISA: Software programmers’
Language view of a computer
• Provide all info for someone wants
to write assembly/machine code
Assembly • “Contract” between
Instruction Set Program assembly/machine code and
processor
Architecture
(ISA)
• Processors execute machine
Machine code (binary). Assembly
Code program is merely a text
representation of machine
code
Processor

Transistor
7
Carnegie Mellon

This Module (4 Lectures)

High-Level
Language
C Program • Assembly Programming
• Explain how various C
constructs are implemented in
Assembly assembly code
Instruction Set Program • Effectively translating from C to
Architecture assembly program manually
(ISA) • Helps us understand how
Machine
compilers work
Code
• Helps us understand how
assemblers work
Microarchitecture Processor • Microarchitecture is the
topic of the next module

Circuit Transistor
8
Today: Assembly Programming I: Basics

• Different ISAs and history behind them

• C, assembly, machine code
• Move operations (and addressing modes)

9
Instruction Set Architecture
• There used to be many ISAs
• x86, ARM, Power/PowerPC, Sparc, MIPS, IA64, z
• Very consolidated today: ARM and x86

10
Instruction Set Architecture
• There used to be many ISAs
• x86, ARM, Power/PowerPC, Sparc, MIPS, IA64, z
• Very consolidated today: ARM and x86
• There are even more microarchitectures
• Apple/Samsung/Qualcomm have their own microarchitecture
(implementation) of the ARM ISA
• Intel and AMD have different microarchitectures for x86
• ISA is lucrative business: ARM’s Business Model
• Patent the ISA, and then license the ISA
• Every implementer pays a royalty to ARM
• Apple/Samsung pays ARM whenever they sell a smartphone

The ARM Diaries, Part 1: How ARM’s Business Model Works:

https://www.anandtech.com/show/7112/the-arm-diaries-part-1-how-arms-business-model-works
10
Intel x86 ISA
• Dominate laptop/desktop/cloud market

11
Intel x86 ISA
• Dominate laptop/desktop/cloud market

11
Intel x86 ISA Evolution (Milestones)
• Evolutionary design: Added more features as time goes on

12
Intel x86 ISA Evolution (Milestones)
• Evolutionary design: Added more features as time goes on
Notable
Date Feature
Implementation

1974 8-bit ISA 8080

1978 16-bit ISA (Basis for IBM PC & DOS) 8086
1980 Add Floating Point instructions 8087
1985 32-bit ISA (Refer to as IA32) 386
1997 Add Multi-Media eXtension (MMX) Pentium/MMX
1999 Add Streaming SIMD Extension (SSE) Pentium III
2001 Intel’s first attempt at 64-bit ISA (IA64, failed) Itanium
2004 Implement AMD’s 64-bit ISA (x86-64, AMD64) Pentium 4E
2008 Add Advanced Vector Extension (AVE) Core i7 Sandy Bridge
12
Backward Compatibility
• Binary executable generated for an older processor can
execute on a newer processor
• Allows legacy code to be executed on newer machines
• Buy new machines without changing the software
• x86 is backward compatible up until 8086 (16-bit ISA)
• i.e., an 8086 binary executable can be executed on any of today’s
x86 machines
• Great for users, nasty for processor implementers
• Every instruction you put into the ISA, you are stuck with it
FOREVER

13
x86 Clones: Advanced Micro Devices (AMD)

• Historically
• AMD build processors for x86 ISA
• A little bit slower, a lot cheaper

• Then
• Recruited top circuit designers from Digital Equipment Corp. and
other downward trending companies
• Developed x86-64, their own 64-bit x86 extension to IA32
• Built first 1 GHz CPU

• Intel felt hard to admit mistake or that AMD was better

• 2004: Intel Announces EM64T extension to IA32
• Almost identical to x86-64!
• Today’s 64-bit x86 ISA is basically AMD’s original proposal

14
x86 Clones: Advanced Micro Devices (AMD)

• Today: Holding up not too badly

15
x86 Clones: Advanced Micro Devices (AMD)

• Today: Holding up not too badly

15
Our Coverage
• IA32
• The traditional x86
• 2nd edition of the textbook

• x86-64
• The standard
• CSUG machine
• 3rd edition of the textbook
• Our focus

16
Moore’s Law
• More instructions typically require more transistors to
implement

17
Moore’s Law
• More instructions typically require more transistors to
implement

17
Moore’s Law
• More instructions require more transistors to implement

18
Moore’s Law
• More instructions require more transistors to implement
• Gordon Moore in 1965 predicted that the number of
transistors doubles every year

18
Moore’s Law
• More instructions require more transistors to implement
• Gordon Moore in 1965 predicted that the number of
transistors doubles every year
• In 1975 he revised the prediction to doubling every 2 years
• Today’s widely-known Moore’s Law: number of transistors
double about every 18 months
• Moore never used the number 18…

18
Moore’s Law
• Question: why is transistor count increasing but computers
are becoming smaller?

19
Moore’s Law
• Question: why is transistor count increasing but computers
are becoming smaller?
• Because transistors are becoming smaller

19
Moore’s Law
• Question: why is transistor count increasing but computers
are becoming smaller?
• Because transistors are becoming smaller
• ~1.4x smaller each dimension(1.42 ~ 2)

19
Moore’s Law
• Question: why is transistor count increasing but computers
are becoming smaller?
• Because transistors are becoming smaller
• ~1.4x smaller each dimension(1.42 ~ 2)
• Moore’s Law is:
• A law of physics?

19
Today: Assembly Programming I: Basics

• Different ISAs and history behind them

• Memory, C, assembly, machine code
• Move operations (and addressing modes)

20
Carnegie Mellon

Byte-Oriented Memory Organization

•0 •F
0•• F••
0 F
•••

• Programs refer to data by address

• Conceptually, envision it as a very large array of bytes: byte-addressable
• An address is like an index into that array
• and, a pointer variable stores an address

21
How Does Pointer Work in C???
char a = 4;
char b = 3;
char* c;
c = &a;
b += (*c);

22
How Does Pointer Work in C???
char a = 4; Memory Memory
char b = 3; Content Address
char* c; 0x10
c = &a; 0x11
b += (*c);
…

0x16

22
How Does Pointer Work in C???
char a = 4; Memory Memory
char b = 3; Content Address
char* c; 0x10
c = &a; 0x11
b += (*c);
…

0x16

22
How Does Pointer Work in C???
char a = 4; C Memory Memory
char b = 3; Variable Content Address
char* c; a 4 0x10
c = &a; 0x11
b += (*c);
…

0x16

22
How Does Pointer Work in C???
char a = 4; C Memory Memory
char b = 3; Variable Content Address
char* c; a 4 0x10
c = &a; 0x11
b += (*c);
…

0x16

22
How Does Pointer Work in C???
char a = 4; C Memory Memory
char b = 3; Variable Content Address
char* c; a 4 0x10
c = &a; b 3 0x11
b += (*c);
…

0x16

22
How Does Pointer Work in C???
char a = 4; C Memory Memory
char b = 3; Variable Content Address
char* c; a 4 0x10
c = &a; b 3 0x11
b += (*c);
…

0x16

c random 0x16

22
How Does Pointer Work in C???
char a = 4; C Memory Memory
char b = 3; Variable Content Address
char* c; a 4 0x10
c = &a; b 3 0x11
b += (*c);
• The content of a pointer …
variable is memory address.
• The ‘&’ operator (address-of
operator) returns the memory c random
0x10 0x16
address of a variable.
• The ‘*’ operator returns the
…
content stored at the memory
location pointed by the pointer
variable (dereferencing)
22
How Does Pointer Work in C???
char a = 4; C Memory Memory
char b = 3; Variable Content Address
char* c; a 4 0x10
c = &a; b 3
7 0x11
b += (*c);
• The content of a pointer …
variable is memory address.
• The ‘&’ operator (address-of
operator) returns the memory c random
0x10 0x16
address of a variable.
• The ‘*’ operator returns the
…
content stored at the memory
location pointed by the pointer
variable (dereferencing)
22
Assembly Code’s View of Computer

23
Assembly Code’s View of Computer
CPU Memory
Assembly
Programmer’s
Perspective
of a Computer

23
Assembly Code’s View of Computer
CPU Memory
Assembly
Programmer’s Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

• Code: instructions
• Data
• Stack to support function call

23
Assembly Code’s View of Computer
CPU Memory
Assembly
Programmer’s Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

• Code: instructions
• Data Data
• Stack to support function call

23
Assembly Code’s View of Computer
CPU Memory
Assembly
Programmer’s Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

• Code: instructions
• Data Data
• Stack to support function call

0x53
0x48
0x89
0xd3
23
Assembly Code’s View of Computer
CPU Memory
Assembly
Programmer’s Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

Code: instructions
•
Code
• Data Data
• Stack to support function call
(Instructions)

Instruction is the fundamental

unit of work. 0x78
All instructions are encoded as 0xfe
bits (just like data!) 0xe3
0x05
23
Assembly Code’s View of Computer
CPU Memory
Assembly
Programmer’s Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

Code: instructions
•
Code
• Data Data Stack
• Stack to support function call
(Instructions)

0x53
0x48
0x89
0xd3
23
Assembly Code’s View of Computer
CPU Memory
Assembly Register
Programmer’s File Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

• Code: instructions
• Data
• Stack to support function call
• Register file
• Faster memory (e.g., 0.5 ns vs. 15 ns)
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

23
x86-64 Integer Register File
8 Bytes
%rax %r8
%rbx %r9
%rcx %r10
%rdx %r11
%rsi %r12
%rdi %r13
%rsp %r14
%rbp %r15
24
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

26
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

%rax

8 Bytes

26
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

%rax %eax

8 Bytes
4 Bytes

26
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

%rax %eax %ax

8 Bytes
4 Bytes
2 Bytes

26
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

%rax %eax %ax %al

8 Bytes
4 Bytes
2 Bytes
1B

26
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

%rax %eax %ax %al

8 Bytes
4 Bytes
C Data Type Size (Bytes)
2 Bytes
char 1
1B
short 2
int 4
long 8

Pointer 8
26
x86-64 Integer Register File
• Lower-half of each register can be independently
addressed (until 1 bytes)

%rax %eax %ax %al

8 Bytes
4 Bytes
C Data Type Size (Bytes)
2 Bytes
char 1
1B
short 2
int 4
Floating point data is stored
long 8 in a separate set of register
Pointer 8 file
26
Assembly Code’s View of Computer
CPU Memory
Assembly Register
Programmer’s File Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory

• Code: instructions
• Data
• Stack to support function call
• Register file
• Faster memory (e.g., 0.5 ns vs. 15 ns)
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

27
Assembly Code’s View of Computer
CPU Memory
Assembly Register
Programmer’s PC File Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory • PC: Program counter

• Code: instructions • A special register containing address
• Data of next instruction
• Stack to support function call • Called “RIP” in x86-64

• Register file
• Faster memory (e.g., 0.5 ns vs. 15 ns)
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

27
Assembly Code’s View of Computer
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data
Perspective Stack
of a Computer

• (Byte Addressable) Memory • PC: Program counter

• Code: instructions • A special register containing address
• Data of next instruction
• Stack to support function call • Called “RIP” in x86-64

• Register file
• Faster memory (e.g., 0.5 ns vs. 15 ns)
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

27
Assembly Code’s View of Computer
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data
Perspective Stack
of a Computer Instructions

• (Byte Addressable) Memory • PC: Program counter

• Code: instructions • A special register containing address
• Data of next instruction
• Stack to support function call • Called “RIP” in x86-64

• Register file
• Faster memory (e.g., 0.5 ns vs. 15 ns)
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

27
Assembly Code’s View of Computer
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Stack
of a Computer Instructions

• (Byte Addressable) Memory • PC: Program counter

• Code: instructions • A special register containing address
• Data of next instruction
• Stack to support function call • Called “RIP” in x86-64

• Register file
• Faster memory (e.g., 0.5 ns vs. 15 ns)
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

27
Assembly Code’s View of Computer
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Stack
of a Computer ALU Instructions

• (Byte Addressable) Memory • PC: Program counter

• Code: instructions • A special register containing address
• Data of next instruction
• Stack to support function call • Called “RIP” in x86-64

• Register file • Arithmetic logic unit (ALU)

• Faster memory (e.g., 0.5 ns vs. 15 ns) • Where computation happens
• Small memory (e.g., 128 B vs. 16 GB)
• Heavily used program data

27
Assembly Code’s View of Computer
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

• (Byte Addressable) Memory • PC: Program counter

• Code: instructions • A special register containing address
• Data of next instruction
• Stack to support function call • Called “RIP” in x86-64

• Register file • Arithmetic logic unit (ALU)

• Faster memory (e.g., 0.5 ns vs. 15 ns) • Where computation happens
• Small memory (e.g., 128 B vs. 16 GB) • Condition codes
• Heavily used program data • Store status information about most
recent arithmetic or logical operation
• Used for conditional branch
27
Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

28
Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Compute Instruction: Perform arithmetics on register or memory data

• addq %rax, %rbx
• C constructs: +, -, >>, etc.

28
Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Compute Instruction: Perform arithmetics on register or memory data

• addq %rax, %rbx
• C constructs: +, -, >>, etc.
• Data Movement Instruction: Transfer data between memory and register
• movq %rax, (%rbx)

28
Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Compute Instruction: Perform arithmetics on register or memory data

• addq %rax, %rbx
• C constructs: +, -, >>, etc.
• Data Movement Instruction: Transfer data between memory and register
• movq %rax, (%rbx)
• Control Instruction: Alter the sequence of instructions (by changing PC)
• jmp, call
• C constructs: if-else, do-while, function call, etc.
28
Turning C into Object Code
C Code (sum.c)
long plus(long x, long y);

void sumstore(long x, long y,

long *dest)
{
long t = plus(x, y);
*dest = t;
}

29
Turning C into Object Code
C Code (sum.c) Generated x86-64 Assembly
long plus(long x, long y);
sumstore:
pushq %rbx
void sumstore(long x, long y,
movq %rdx, %rbx
long *dest)
call plus
{
movq %rax, (%rbx)
long t = plus(x, y);
popq %rbx
*dest = t;
ret
}

Obtain (on CSUG machine) with command

gcc –Og –S sum.c -o sum.s

29
Turning C into Object Code
Generated x86-64 Assembly Binary Code for sumstore
sumstore: Memory
pushq %rbx
movq %rdx, %rbx 0x53
call plus 0x48
movq %rax, (%rbx) 0x89
popq %rbx 0xd3
ret 0xe8
0xf2
0xff
0xff
0xff
0x48
0x89
0x03
0x5b
0xc3

30
Turning C into Object Code
Generated x86-64 Assembly Binary Code for sumstore
sumstore: Address Memory
pushq %rbx
movq %rdx, %rbx 0x0400595 0x53
call plus 0x48
movq %rax, (%rbx) 0x89
popq %rbx 0xd3
ret 0xe8
0xf2
Obtain (on CSUG machine) with command 0xff
gcc –c sum.s -o sum.o 0xff
0xff
• Total of 14 bytes 0x48
• Instructions have variable 0x89
0x03
lengths: e.g., 1, 3, or 5 bytes
0x5b
• Code starts at memory address 0xc3
0x0400595
30
Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction
(According to PC)