1

CSC 252/452: Computer Organization

Fall 2024: Lecture 6

Instructor: Yanan Guo

Department of Computer Science

University of Rochester
 Carnegie Mellon

Announcement
• Programming Assignment 1 is due today
• NetID is not your 8-digit URID
• If you submitted your assignment before Sep. 11th, please
submit one more time
• For using slip days, email the two TAs listed in the
assignment description
• Programming Assignment 2 is out today
• Details:
https://www.cs.rochester.edu/courses/252/fall2024/labs/
assignment2.html
• Due on Sep. 30th, 11:59 PM
• You (may still) have 3 slip days

2
 Carnegie Mellon

Announcement
• Programming assignment 2 is in x86 assembly language.
• Read the instructions before getting started!!!
• You get 1/4 point off for every wrong answer
• Maxed out at 10
• TAs are best positioned to answer your questions about
programming assignments!!!
• Programming assignments do NOT repeat the lecture
materials. They ask you to synthesize what you have
learned from the lectures and work out something new.

3
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction
(According to PC)

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction
(According to PC)

0x4801d8

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode

(According to PC) Instruction

addq %rax,(%rbx)

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode Fetch

(According to PC) Instruction Operands

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode Fetch Execute

(According to PC) Instruction Operands Instruction

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode Fetch Execute

(According to PC) Instruction Operands Instruction

Update
Condition
Codes

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode Fetch Execute Store

(According to PC) Instruction Operands Instruction Results

Update
Condition
Codes

4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode Fetch Execute Store

(According to PC) Instruction Operands Instruction Results

Update
Condition
Codes Adjust
PC
4
 Instruction Processing Sequence
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes

Fetch Instruction Decode Fetch Execute Store

(According to PC) Instruction Operands Instruction Results

Update
Condition
Codes Adjust
PC
4
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

5
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Compute Instruction: Perform arithmetics on register or memory data

• addq %eax, %ebx
• C constructs: +, -, >>, etc.

5
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Compute Instruction: Perform arithmetics on register or memory data

• addq %eax, %ebx
• C constructs: +, -, >>, etc.
• Data Movement Instruction: Transfer data between memory and register
• movq %eax, (%ebx)

5
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Compute Instruction: Perform arithmetics on register or memory data

• addq %eax, %ebx
• C constructs: +, -, >>, etc.
• Data Movement Instruction: Transfer data between memory and register
• movq %eax, (%ebx)
• Control Instruction: Alter the sequence of instructions (by changing PC)
• jmp, call
• C constructs: if-else, do-while, function call, etc.
5
 Carnegie Mellon

Today: Compute and Control Instructions

• Move operations (and addressing modes)
• Arithmetic & logical operations
• Condition Codes
• Control: Conditional branches (if… else…)
• Control: Loops (for, while)
• Control: Switch Statements (case… switch…)

6
Data Movement Instruction Example

movq %rdx, (%rdi)

• Semantics:
• Move (really, copy) data in register %rdx to memory location
whose address is the value stored in %rdi
• Pointer dereferencing

8
Data Movement Instruction Example

movq %rdx, (%rdi)

address
• Semantics:
• Move (really, copy) data in register %rdx to memory location
whose address is the value stored in %rdi
• Pointer dereferencing

8
Data Movement Instruction Example

data at the address

movq %rdx, (%rdi)

address
• Semantics:
• Move (really, copy) data in register %rdx to memory location
whose address is the value stored in %rdi
• Pointer dereferencing

8
Data Movement Instruction Example

data at the address

*p = a;
assuming:
p is in $rdi
movq %rdx, (%rdi) a is in $rdx

address
• Semantics:
• Move (really, copy) data in register %rdx to memory location
whose address is the value stored in %rdi
• Pointer dereferencing

8
Data Movement Instructions
movq Source, Dest

9
Data Movement Instructions
movq Source, Dest
Operator Operands

9
Data Movement Instructions
movq Source, Dest
Operator Operands
• Memory:
• Simplest example: (%rax)
• How to obtain the address is called “addressing mode”

9
Data Movement Instructions
movq Source, Dest
Operator Operands
• Memory:
• Simplest example: (%rax)
• How to obtain the address is called “addressing mode”
• Register:
• Example: %rax, %r13
• But %rsp reserved for special use

9
Data Movement Instructions
movq Source, Dest
Operator Operands
• Memory:
• Simplest example: (%rax)
• How to obtain the address is called “addressing mode”
• Register:
• Example: %rax, %r13
• But %rsp reserved for special use
• Immediate: Constant integer data
• Example: $0x400, $-533; like C constant, but prefixed with ‘$’
• Encoded with 1, 2, or 4 bytes; can only be source

9
movq Operand Combinations

Source Dest Example C Analog

Reg
Imm
Mem

movq Reg Reg

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax

Imm
Mem

movq Reg Reg

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem

movq Reg Reg

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax)

movq Reg Reg

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg movq %rax,%rdx

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg movq %rax,%rdx temp2 = temp1;

Mem

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg movq %rax,%rdx temp2 = temp1;

Mem movq %rax,(%rdx)

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg movq %rax,%rdx temp2 = temp1;

Mem movq %rax,(%rdx) *p = temp;

Mem Reg

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg movq %rax,%rdx temp2 = temp1;

Mem movq %rax,(%rdx) *p = temp;

Mem Reg movq (%rax),%rdx

Cannot do memory-memory transfer

with a single instruction in x86.
10
movq Operand Combinations

Source Dest Example C Analog

Reg movq $0x4,%rax temp = 0x4;

Imm
Mem movq $-147,(%rax) *p = -147;

movq Reg Reg movq %rax,%rdx temp2 = temp1;

Mem movq %rax,(%rdx) *p = temp;

Mem Reg movq (%rax),%rdx temp = *p;

Cannot do memory-memory transfer

with a single instruction in x86.
10
Example of Simple Addressing Modes
void swap
(long *xp, long *yp)
{
long t0 = *xp;
long t1 = *yp;
*xp = t1;
*yp = t0;
}

11
Example of Simple Addressing Modes
Registers Memory Addr
void swap
(long *xp, long *yp) %rdi xp *xp xp
{
long t0 = *xp; %rsi yp
long t1 = *yp;
%rax
*xp = t1;
*yp = t0; %rdx yp
} *yp

11
Example of Simple Addressing Modes
Registers Memory Addr
void swap
(long *xp, long *yp) %rdi xp *xp xp
{
long t0 = *xp; %rsi yp
long t1 = *yp;
%rax
*xp = t1;
*yp = t0; %rdx yp
} *yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
11
Understanding Swap()
Registers Memory Addr
123 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax
0x108
%rdx 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
123 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax
0x108
%rdx 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
123 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
123 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
123 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
123 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
456 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
456 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 456 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Understanding Swap()
Registers Memory Addr
456 0x120 xp
%rdi 0x120
0x118
%rsi 0x100
0x110
%rax 123
0x108
%rdx 456 123 0x100 yp

swap:
movq (%rdi), %rax # t0 = *xp
movq (%rsi), %rdx # t1 = *yp
movq %rdx, (%rdi) # *xp = t1
movq %rax, (%rsi) # *yp = t0
ret
12
Memory Addressing Modes
• An addressing mode specifies:
• how to calculate the effective memory address of an operand
• by using information held in registers and/or constants

13
Memory Addressing Modes
• An addressing mode specifies:
• how to calculate the effective memory address of an operand
• by using information held in registers and/or constants

• Normal: (R)
• Memory address: content of Register R (Reg[R])
• Pointer dereferencing in C

movq (%rcx),%rax; // address = %rcx

13
Memory Addressing Modes
• An addressing mode specifies:
• how to calculate the effective memory address of an operand
• by using information held in registers and/or constants

• Normal: (R)
• Memory address: content of Register R (Reg[R])
• Pointer dereferencing in C

movq (%rcx),%rax; // address = %rcx

• Displacement: D(R)
• Memory address: Reg[R]+D
• Register R specifies start of memory region
• Constant displacement D specifies offset

movq 8(%rbp),%rdx; // address = %rbp + 8

13
Complete Memory Addressing Modes
• The General Form: D(Rb,Ri,S)
• Memory address: Reg[Rb] + S * Reg[Ri] + D
• E.g., 8(%eax, %ebx, 4); // address = %eax + 4 * %ebx + 8
• D: Constant “displacement”
• Rb: Base register: Any of 16 integer registers
• Ri: Index register: Any, except for %rsp
• S: Scale: 1, 2, 4, or 8

14
Complete Memory Addressing Modes
• The General Form: D(Rb,Ri,S)
• Memory address: Reg[Rb] + S * Reg[Ri] + D
• E.g., 8(%eax, %ebx, 4); // address = %eax + 4 * %ebx + 8
• D: Constant “displacement”
• Rb: Base register: Any of 16 integer registers
• Ri: Index register: Any, except for %rsp
• S: Scale: 1, 2, 4, or 8
• What is 8(%eax, %ebx, 4)used for?

14
Complete Memory Addressing Modes
• The General Form: D(Rb,Ri,S)
• Memory address: Reg[Rb] + S * Reg[Ri] + D
• E.g., 8(%eax, %ebx, 4); // address = %eax + 4 * %ebx + 8
• D: Constant “displacement”
• Rb: Base register: Any of 16 integer registers
• Ri: Index register: Any, except for %rsp
• S: Scale: 1, 2, 4, or 8
• What is 8(%eax, %ebx, 4)used for?
• Special Cases
(Rb,Ri) address = Reg[Rb]+Reg[Ri]
D(Rb,Ri) address = Reg[Rb]+Reg[Ri]+D
(Rb,Ri,S) address = Reg[Rb]+S*Reg[Ri]

14
 Carnegie Mellon

Address Computation Examples

%rdx 0xf000

%rcx 0x0100

Expression Address Computation Address

0x8(%rdx)
(%rdx,%rcx)

(%rdx,%rcx,4)

0x80(,%rdx,2)

15
 Carnegie Mellon

Address Computation Examples

%rdx 0xf000

%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx)

(%rdx,%rcx,4)

0x80(,%rdx,2)

15
 Carnegie Mellon

Address Computation Examples

%rdx 0xf000

%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4)

0x80(,%rdx,2)

15
 Carnegie Mellon

Address Computation Examples

%rdx 0xf000

%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4) 0xf000 + 4*0x100 0xf400
0x80(,%rdx,2)

15
 Carnegie Mellon

Address Computation Examples

%rdx 0xf000

%rcx 0x0100

Expression Address Computation Address

0x8(%rdx) 0xf000 + 0x8 0xf008
(%rdx,%rcx) 0xf000 + 0x100 0xf100
(%rdx,%rcx,4) 0xf000 + 4*0x100 0xf400
0x80(,%rdx,2) 2*0xf000 + 0x80 0x1e080

15
 Carnegie Mellon

Address Computation Instruction

leaq 4(%rsi,%rdi,2), %rax

16
 Carnegie Mellon

Address Computation Instruction

leaq 4(%rsi,%rdi,2), %rax

%rax = %rsi + %rdi * 2 + 4

16
 Carnegie Mellon

Address Computation Instruction

leaq 4(%rsi,%rdi,2), %rax

%rax = %rsi + %rdi * 2 + 4

•leaq Src, Dst
• Src is address mode expression
• Set Dst to address denoted by expression
• No actual memory reference is made

16
 Carnegie Mellon

Address Computation Instruction

leaq 4(%rsi,%rdi,2), %rax

%rax = %rsi + %rdi * 2 + 4

•leaq Src, Dst
• Src is address mode expression
• Set Dst to address denoted by expression
• No actual memory reference is made

• Uses
• Computing addresses without a memory reference
• E.g., translation of p = &x[i];

16
 Carnegie Mellon

Address Computation Instruction

• Interesting Use
• Computing arithmetic expressions of the form x + k*y
• Faster arithmetic computation

17
 Carnegie Mellon

Address Computation Instruction

• Interesting Use
• Computing arithmetic expressions of the form x + k*y
• Faster arithmetic computation

long m12(long x)
{
return x*12;
}

17
 Carnegie Mellon

Address Computation Instruction

• Interesting Use
• Computing arithmetic expressions of the form x + k*y
• Faster arithmetic computation

long m12(long x)
{
return x*12;
}

Converted to
assembly by compiler:

leaq (%rdi,%rdi,2), %rax # t <- x+x*2

salq $2, %rax # return t<<2

17
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Data Movement Instruction: Transfer data between memory and register

• movq %eax, (%ebx)

18
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Data Movement Instruction: Transfer data between memory and register

• movq %eax, (%ebx)
• Compute Instruction: Perform arithmetics on register or memory data
• addq %eax, %ebx
• C constructs: +, -, >>, etc.

18
 Assembly Program Instructions
CPU Addresses Memory
Assembly Register
Programmer’s PC File Code
Data Data
Perspective Condition Stack
of a Computer ALU Instructions
Codes Heap

• Data Movement Instruction: Transfer data between memory and register

• movq %eax, (%ebx)
• Compute Instruction: Perform arithmetics on register or memory data
• addq %eax, %ebx
• C constructs: +, -, >>, etc.
• Control Instruction: Alter the sequence of instructions (by changing PC)
• jmp, call
• C constructs: if-else, do-while, function call, etc.
18
 Carnegie Mellon

Today: Compute and Control Instructions

• Move operations (and addressing modes)
• Arithmetic & logical operations
• Control: Condition branches (if… else…)
• Control: Loops (for, while)
• Control: Switch Statements (case… switch…)

19
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

Format Computation Notes
addq src, dest Dest = Dest + Src

20
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

Format Computation Notes
addq src, dest Dest = Dest + Src

addq %rax, %rbx

20
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

Format Computation Notes
addq src, dest Dest = Dest + Src

u •••

+ v •••

u+v •••

TAddw(u , v) •••

addq %rax, %rbx

20
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

Format Computation Notes
addq src, dest Dest = Dest + Src

u •••

+ v •••

u+v •••

TAddw(u , v) •••

%rbx = %rax + %rbx

addq %rax, %rbx Truncation if overflow,
set carry bit (more later…)
20
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

Format Computation Notes
addq src, dest Dest = Dest + Src
subq src, dest Dest = Dest - Src
imulq src, dest Dest = Dest * Src
salq src, dest Dest = Dest << Src Also called shlq
sarq src, dest Dest = Dest >> Src Arithmetic shift
shrq src, dest Dest = Dest >> Src Logical shift
xorq src, dest Dest = Dest ^ Src
andq src, dest Dest = Dest & Src
orq src, dest Dest = Dest | Src

21
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

• No distinction between signed and unsigned (why?)
• Bit level behaviors for signed and unsigned arithmetic are
exactly the same — assuming truncation

22
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

• No distinction between signed and unsigned (why?)
• Bit level behaviors for signed and unsigned arithmetic are
exactly the same — assuming truncation

long signed_add
(long x, long y)
{
long res = x + y;
return res;
}
#x in %rdx, y in %rax
addq %rdx, %rax
22
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

• No distinction between signed and unsigned (why?)
• Bit level behaviors for signed and unsigned arithmetic are
exactly the same — assuming truncation

long signed_add long unsigned_add

(long x, long y) (unsigned long x, unsigned long y)
{ {
long res = x + y; unsigned long res = x + y;
return res; return res;
} }
#x in %rdx, y in %rax #x in %rdx, y in %rax
addq %rdx, %rax addq %rdx, %rax
22
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

• No distinction between signed and unsigned (why?)
• Bit level behaviors for signed and unsigned arithmetic are
exactly the same — assuming truncation
Bit-level
010
+) 101
111
long signed_add long unsigned_add
(long x, long y) (unsigned long x, unsigned long y)
{ {
long res = x + y; unsigned long res = x + y;
return res; return res;
} }
#x in %rdx, y in %rax #x in %rdx, y in %rax
addq %rdx, %rax addq %rdx, %rax
22
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

• No distinction between signed and unsigned (why?)
• Bit level behaviors for signed and unsigned arithmetic are
exactly the same — assuming truncation
Bit-level Signed
010 2
+) 101 +) -3
111 -1
long signed_add long unsigned_add
(long x, long y) (unsigned long x, unsigned long y)
{ {
long res = x + y; unsigned long res = x + y;
return res; return res;
} }
#x in %rdx, y in %rax #x in %rdx, y in %rax
addq %rdx, %rax addq %rdx, %rax
22
 Carnegie Mellon

Some Arithmetic Operations (2 Operands)

• No distinction between signed and unsigned (why?)
• Bit level behaviors for signed and unsigned arithmetic are
exactly the same — assuming truncation
Bit-level Signed Unsigned
010 2 2
+) 101 +) -3 +) 5
111 -1 7
long signed_add long unsigned_add
(long x, long y) (unsigned long x, unsigned long y)
{ {
long res = x + y; unsigned long res = x + y;
return res; return res;
} }
#x in %rdx, y in %rax #x in %rdx, y in %rax
addq %rdx, %rax addq %rdx, %rax
22
 Carnegie Mellon

Some Arithmetic Operations (1 Operand)

• Unary Instructions (one operand)
Format Computation
incq dest Dest = Dest + 1
decq dest Dest = Dest - 1
negq dest Dest = -Dest
notq dest Dest = ~Dest

23
 Carnegie Mellon

Arithmetic Expression Example

arith:
leaq (%rdi,%rsi), %rax
long arith addq %rdx, %rax
(long x, long y, long z) leaq (%rsi,%rsi,2), %rdx
{ salq $4, %rdx
long t1 = x+y; leaq 4(%rdi,%rdx), %rcx
long t2 = z+t1; imulq %rcx, %rax
long t3 = x+4; ret
long t4 = y * 48;
long t5 = t3 + t4; Interesting Instructions
long rval = t2 * t5; • leaq: address computation
return rval; • salq: shift
}
• imulq: multiplication
• But, only used once

24
 Carnegie Mellon

Arithmetic Expression Example

long arith
(long x, long y, long z)
{
long t1 = x+y;
long t2 = z+t1;
long t3 = x+4;
long t4 = y * 48;
long t5 = t3 + t4;
long rval = t2 * t5;
return rval;
}

25
 Carnegie Mellon

Arithmetic Expression Example

long arith arith:
(long x, long y, long z) leaq (%rdi,%rsi), %rax # t1
{ addq %rdx, %rax # t2
long t1 = x+y; leaq (%rsi,%rsi,2), %rdx
long t2 = z+t1; salq $4, %rdx # t4
long t3 = x+4; leaq 4(%rdi,%rdx), %rcx # t5
long t4 = y * 48; imulq %rcx, %rax # rval
long t5 = t3 + t4; ret
long rval = t2 * t5;
return rval;
Register Use(s)
}
%rdi Argument x
%rsi Argument y
%rdx Argument z
%rax t1, t2, rval
%rdx t4
%rcx t5

25
 Carnegie Mellon

Today: Compute and Control Instructions

• Move operations (and addressing modes)
• Arithmetic & logical operations
• Condition Codes
• Control: Conditional branches (if… else…)
• Control: Loops (for, while)
• Control: Switch Statements (case… switch…)

26
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)

27
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)

27
CF set when

yxxxxxxxxxxxx...

+ yxxxxxxxxxxxx...

1 zxxxxxxxxxxxx...
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0

29
ZF set when

000000000000…00000000000
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0

31
SF set when

1xxxxxxxxxxx…xxxxxxxxxxx
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

33
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level
111
+) 010
1001
33
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed
111 -1
+) 010 +) 2
1001 1
33
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed Unsigned

111 -1 7 0 0 0 0
+) 010 +) 2 +) 2
CF ZF SF OF
1001 1 9
33
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed Unsigned

111 -1 7 10 0 0 0
+) 010 +) 2 +) 2
CF ZF SF OF
1001 1 9
33
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed Unsigned

111 -1 7 10 0 0 0
+) 010 +) 2 +) 2
CF ZF SF OF
1001 1 9
33
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34

 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level
011
+) 001
100
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed
011 3
+) 001 +) 1
100 -4
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed Unsigned

011 3 3 0 0 0 0
+) 001 +) 1 +) 1
CF ZF SF OF
100 -4 4
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed Unsigned

011 3 3 0 0 0 0
+) 001 +) 1 +) 1
CF ZF SF OF
100 -4 4
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

Bit-level Signed Unsigned

011 3 3 0 0 0 01
+) 001 +) 1 +) 1
CF ZF SF OF
100 -4 4
Bryant and O’Hallaron, Computer Systems: A Programmer’s Perspective, Third Edition 34
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

100
+) 111 0 0 0 0
c011 CF ZF SF OF

35
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

100
+) 111 10 0 0 0
c011 CF ZF SF OF

35
 Carnegie Mellon

Condition Codes
addq %rax, %rbx
Arithmetic instructions implicitly set condition codes (think of it as
side effect)
CF set if %rax + %rbx generates a carry (i.e., unsigned overflow)
ZF set if %rax + %rbx == 0
SF set if %rax + %rbx < 0
OF set if %rax + %rbx overflows when %rax and %rbx are treated as signed
numbers
%rax > 0, %rbx > 0, and (%rax + %rbx) < 0), or
%rax < 0, %rbx < 0, and (%rax + %rbx) >= 0)

100
+) 111 10 0 0 01
c011 CF ZF SF OF

35
Compare Instruction
cmpq a, b
▪ Computes 𝑏 − 𝑎 (just like sub)
▪ Sets condition codes based on result, but…
▪ Does not change 𝒃
▪ All it does is setting condition codes!
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi
cmpq 0xFF, 0x80

37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi
cmpq 0xFF, 0x80
10000000 -128
-) 11111111 -) -1
10000001 -127

37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 11111111 -) -1 0 0 0 0
10000001 -127 ZF SF OF CF

37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 11111111 -) -1 0 10 0 0
10000001 -127 ZF SF OF CF

37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 11111111 -) -1 0 10 0 10
10000001 -127 ZF SF OF CF

37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 11111111 -) -1 0 10 0 10
10000001 -127 ZF SF OF CF
• How to know if %rdi = %rsi?
• Check ZF

37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 11111111 -) -1 0 10 0 10
10000001 -127 ZF SF OF CF
• How to know if %rdi = %rsi?
• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
37
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi
cmpq 0xFF, 0x80

• How to know if %rdi = %rsi?

• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
38
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi
cmpq 0xFF, 0x80
10000000 -128
-) 01111111 -) 127
00000001 1

• How to know if %rdi = %rsi?

• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
38
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 01111111 -) 127 0 0 0 0
00000001 1 ZF SF OF CF
• How to know if %rdi = %rsi?
• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
38
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 01111111 -) 127 0 0 0 0
00000001 1 ZF SF OF CF
• How to know if %rdi = %rsi?
• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
38
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 01111111 -) 127 0 0 0 0
00000001 1 ZF SF OF CF
• How to know if %rdi = %rsi?
• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
38
 Carnegie Mellon

How Should cmpq Set Condition Codes?

cmpq %rsi, %rdi ZF Zero Flag (result is zero)
SF Sign Flag (result is negative)
cmpq 0xFF, 0x80
OF Overflow Flag (result overflow)
10000000 -128
-) 01111111 -) 127 0 0 10 0
00000001 1 ZF SF OF CF
• How to know if %rdi = %rsi?
• Check ZF
• How to know if %rdi < %rsi(signed)?
• Check SF ?
• %rdi < %rsi if and only if: %rdi - %rsi < 0 (is it correct??)
• %rdi - %rsi < 0 and the result doesn’t overflow, or
• %rdi - %rsi > 0 and the result does overflow
• or simply: (SF ^ OF)
38
Reading Condition Codes
SetX Instructions
▪ Set low-order byte of destination to 0 or 1 based on combinations
of condition codes
▪ Does not alter remaining 7 bytes
SetX Condition Description
sete ZF Equal / Zero
setne ~ZF Not Equal / Not Zero
sets SF Negative
setns ~SF Nonnegative
setg ~(SF^OF)&~ZF Greater (Signed)
setge ~(SF^OF) Greater or Equal (Signed)
setl (SF^OF) Less (Signed)
setle (SF^OF)|ZF Less or Equal (Signed)
seta ~CF&~ZF Above (unsigned)
setb CF Below (unsigned)
x86-64 Integer Registers
%rax %al %r8 %r8b

%rbx %bl %r9 %r9b

%rcx %cl %r10 %r10b

%rdx %dl %r11 %r11b

%rsi %sil %r12 %r12b

%rdi %dil %r13 %r13b

%rsp %spl %r14 %r14b

%rbp %bpl %r15 %r15b

▪ SetX argument is always a low byte (%al, %r8b, etc.)

Reading Condition Codes (Cont.)
SetX Instructions:
▪ Set single byte based on combination of condition codes
One of addressable byte registers
▪ Does not alter remaining bytes
▪ Typically use movzbl to finish job
▪ 32-bit instructions also set upper 32 bits to 0

Register Use(s)
int gt (long x, long y)
{ %rdi Argument x
return x > y; %rsi Argument y
}
%rax Return value

cmpq %rsi, %rdi # Compare x:y

setg %al # Set when >
movzbl %al, %eax # Zero rest of %rax
ret
Reading Condition Codes (Cont.)
SetX Instructions:
▪ Set single byte based on combination of condition codes
One of addressable byte registers
▪ Does not alter remaining bytes
▪ Typically use movzbl to finish job
▪ 32-bit instructions also set upper 32 bits to 0

Register Use(s)
int gt (long x, long y)
{ %rdi Argument x
return x > y; %rsi Argument y
}
%rax Return value

cmpq %rsi, %rdi # Compare x:y

setg %al # Set when >
movzbl %al, %eax # Zero rest of %rax
ret