K S R Institute for Engineering and Technology

Computer Architecture and Organization

UNIT 1
BASIC STRUCTURE OF A COMPUTER SYSTEM
Functional Units – Basic Operational Concepts – Performance – Instructions:
Language of the Computer – Operations, Operands – Instruction representation –
decision making – MIPS Addressing.
Introduction
Computer Architecture
It refers to the overall design of a computer system, including the hardware and software
components that make up the system and how they interact with each other.
Computer Organization refers to the way in which the hardware components of a computer
system are arranged and interconnected. It implements the provided computer architecture and
covers the "How to do?" part.
Difference between Computer Architecture and Computer Organization

S.No Computer Architecture Computer Organization

1. They explain what a computer does. They explain how a computer actually
does it.
2. They majorly focus on the They majorly focus on the structural
functional behavior of computer relationship and deep knowledge of
systems. the internal working of a system.
3. Computer architectures deal with high- They deal with low-level design matters.
level design matters.
4. It comes before computer organization. It comes after the architecture part.
5. It is also called instruction set It is also called microarchitecture.
architecture.
6. It covers logical functions, such as It covers physical units like peripherals,
registers, data types, instruction sets, and circuit designs, and adders.
addressing modes.
7. They coordinate between the hardware They manage the portion of the network in a
and software of the system. system.

FUNCTIONAL UNITS
A computer consists of five functionally independent main parts:
• Input unit
• Memory unit
• Arithmetic And Logic unit
 • Output unit And
• Control units.
The input unit accepts coded information from human operators using devices such as
keyboards or from other computers over digital communication lines. The information received
is stored in the computer’s memory, either for later use or to be processed immediately by the
arithmetic and logic unit. The processing steps are specified by a program that is also stored in
the memory. Finally, the results are sent back to the outside world through the output unit. All of
these actions are coordinated by the control unit. An interconnection network provides the means
for the functional units to exchange information and coordinate their actions.

We refer to the arithmetic and logic circuits, in conjunction with the main control circuits,
as the processor. Input and output equipment is often collectively referred to as the input-output
(I/O) unit. A program is a list of instructions which performs a task. Programs are stored in the
memory. The processor fetches the program instructions from the memory, one after another,
and performs the desired operations.
Data are numbers and characters that are used as operands by the instructions. Data are
also stored in the memory. The instructions and data handled by a computer must be encoded in
a suitable format. Each instruction, number, or character is encoded as a string of binary digits
called bits, each having one of two possible values, 0 or 1, represented by the two stable states.
Input Unit
Computers accept coded information through input units. The most common input device
is the keyboard. Whenever a key is pressed, the corresponding letter or digit is automatically
translated into its corresponding binary code and transmitted to the processor. Many other kinds
of input devices for human-computer interaction are available, including the touchpad, mouse,
joystick, and trackball.
Memory Unit
The function of the memory unit is to store programs and data. There are two classes of storage,
called primary and secondary.
Primary Memory
Primary memory, also called main memory, is a fast memory that operates at electronic
speeds. Programs must be stored in this memory while they are being executed. The memory
consists of a large number of semiconductor storage cells, each capable of storing one bit of
information. These cells are rarely read or written individually. Instead, they are handled in
groups of fixed size called words. The memory is organized so that one word can be stored or
retrieved in one basic operation. The number of bits in each word is referred to as the word
length of the computer, typically 16, 32, or 64 bits.
To provide easy access to any word in the memory, a distinct address is associated with
each word location. Addresses are consecutive numbers, starting from 0, that identify successive
locations.
A memory in which any location can be accessed in a short and fixed amount of time
after specifying its address is called a random-access memory (RAM). The time required to
access one word is called the memory access time.

Cache Memory
As an adjunct to the main memory, a smaller, faster RAM unit, called a cache, is used to hold
sections of a program that are currently being executed, along with any associated data. The
cache is tightly coupled with the processor and is usually contained on the same integrated-
circuit chip. At the start of program execution, the cache is empty. All program instructions and
any required data are stored in the main memory. As execution proceeds, instructions are fetched
into the processor chip, and a copy of each is placed in the cache. When the execution of an
instruction requires data located in the main memory, the data are fetched and copies are also
placed in the cache.
Now, suppose a number of instructions are executed repeatedly as happens in a program
loop. If these instructions are available in the cache, they can be fetched quickly during the
period of repeated use. Similarly, if the same data locations are accessed repeatedly while copies
of their contents are available in the cache, they can be fetched quickly.
Secondary Storage
Although primary memory is essential, it tends to be expensive and does not retain
information when power is turned off. Thus additional, less expensive, permanent secondary
storage is used when large amounts of data and many programs have to be stored, particularly
for information that is accessed infrequently. Access times for secondary storage are longer than
for primary memory. A wide selection of secondary storage devices is available, including
magnetic disks, optical disks (DVD and CD), and flash memory devices.
Arithmetic and Logic Unit
Most computer operations are executed in the arithmetic and logic unit (ALU) of the
processor. Any arithmetic or logic operation, such as addition, subtraction, multiplication,
division, or comparison of numbers, is initiated by bringing the required operands into the
processor, where the operation is performed by the ALU. For example, if two numbers located in
the memory are to be added, they are brought into the processor, and the addition is carried out
by the ALU. The sum may then be stored in the memory or retained in the processor for
immediate use.
Output Unit
The output unit is the counterpart of the input unit. Its function is to send processed
results to the outside world. Examples of output unit are monitor and printer.
Control Unit
The memory, arithmetic and logic, and I/O units store and process information and perform input
and output operations. The operation of these units must be coordinated in some way.
This is the responsibility of the control unit. The control unit is effectively the nerve center that
sends control signals to other units and senses their states.
 Control circuits are responsible for generating the timing signals that govern the transfers
and determine when a given action is to take place. Data transfers between the processor and the
memory are also managed by the control unit through timing signals.

BASIC OPERATIONAL CONCEPTS

To perform a given task, an appropriate program consisting of a list of instructions is stored in
the memory. Individual instructions are brought from the memory into the processor, which
executes the specified operations. Data to be used as instruction operands are also stored in the
memory. A typical instruction might be
Load R2, LOC
Execution of this instruction requires several steps. First, the instruction is fetched from the
memory into the processor. Next, the operation to be performed is determined by the control
unit. The operand at LOC is then fetched from the memory into the processor. Finally, the
operand is stored in register R2. The original contents of location LOC are preserved, whereas
those of register R2 are overwritten.
After operands have been loaded from memory into processor registers, arithmetic or
logic operations can be performed on them. For example, the instruction
Add R4, R2, R3
adds the contents of registers R2 and R3, then places their sum into register R4. The operands in
R2 and R3 are not altered, but the previous value in R4 is overwritten by the sum.
After completing the desired operations, the results are in processor registers. They can be
transferred to the memory using instructions such as
Store R4, LOC
This instruction copies the operand in register R4 to memory location LOC. The original
contents of location LOC are overwritten, but those of R4 are preserved.
For Load and Store instructions, transfers between the memory and the processor are
initiated by sending the address of the desired memory location to the memory unit and asserting
the appropriate control signals. The data are then transferred to or from the memory.
In addition to the ALU and the control circuitry, the processor contains a number of
registers used for several different purposes.
Instruction Register (IR)
The instruction register (IR) holds the instruction that is currently being executed.
Program Counter (PC)
The program counter (PC) is another specialized register. It contains the memory address of the
next instruction to be fetched and executed. During the execution of an instruction, the contents
of the PC are updated to correspond to the address of the next instruction to be executed.
In addition to the IR and PC, Figure 1.2 shows general-purpose registers R0 through Rn−1,
often called processor registers. They serve a variety of functions, including holding operands
that have been loaded from the memory for processing.
The processor-memory interface is a circuit which manages the transfer of data between
the main memory and the processor. If a word is to be read from the memory, the interface sends
the address of that word to the memory along with a Read control signal. The interface waits for
the word to be retrieved, then transfers it to the appropriate processor register. If a word is to be
written into memory, the interface transfers both the address and the word to the memory along
with a Write control signal.
Operating steps are
• A program must be in the main memory in order for it to be executed. It is often
transferred there from secondary storage through the input unit.
• Execution of the program begins when the PC is set to point to the first instruction of the
program.
• The contents of the PC are transferred to the memory along with a Read control signal.
• When the addressed word (in this case, the first instruction of the program) has been
fetched from the memory it is loaded into register IR. At this point, the instruction is
ready to be interpreted and executed.
• Instructions such as Load, Store, and Add perform data transfer and arithmetic
operations.
• If an operand that resides in the memory is required for an instruction, it is fetched by
sending its address to the memory and initiating a Read operation.
• When the operand has been fetched from the memory, it is transferred to a processor
register.
• After operands have been fetched in this way, the ALU can perform a desired arithmetic
operation, such as Add, on the values in processor registers.
• The result is sent to a processor register.
• If the result is to be written into the memory with a Store instruction, it is transferred
from the processor register to the memory, along with the address of the location where
the result is to be stored, and then a Write operation is initiated.
• At some point during the execution of each instruction, the contents of the PC are
incremented so that the PC points to the next instruction to be executed.
• Thus, as soon as the execution of the current instruction is completed, the processor is
ready to fetch a new instruction.
PERFORMANCE
The most important measure of the performance of a computer is how quickly it can execute
programs. The machine (or CPU) is said to be faster or has better performance running a
program if the total execution time is shorter. When trying to choose among different computers,
performance is an important attribute.
Response time
Response time also called as execution time is the total time required for the computer
to complete a task, including disk accesses, memory accesses, I/O activities, operating system
overhead, CPU execution time, and so on.
Throughput or bandwidth
Throughput or bandwidth is the total amount of work done in a given time. Decreasing
response time almost always improves throughput. Thus, we can relate performance and
execution time for a computer X:
Measuring Performance
CPU execution time or simply CPU time, which recognizes this distinction, is the time the CPU
spends computing for this task and does not include time spent waiting for I/O or running other
programs. CPU time can be further divided into the CPU time spent in the program, called user
CPU time, and the CPU time spent in the operating system performing tasks on behalf of the
program, called system CPU time.
Almost all computers are constructed using a clock that determines when events take
place in the hardware. These discrete time intervals are called clock cycles (or ticks, clock ticks,
clock periods, clocks, cycles). Clock period is the length of each clock cycle. Clock rate is the
inverse of the clock period.
CPU Performance and Its Factors
A simple formula relates the most basic metrics (clock cycles and clock cycle time) to
CPU time:
Instruction Performance
One way to think about execution time is that it equals the number of instructions executed
multiplied by the average time per instruction. Therefore, the number of clock cycles required for
a program can be written as

The term clock cycles per instruction, which is the average number of clock cycles each
instruction takes to execute, is often abbreviated as CPI.
INSTRUCTIONS: LANGUAGE OF THE COMPUTER
To command a computer’s hardware, you must speak its language. The words of a
computer’s language are called instructions, and its vocabulary is called an instruction set. We
will take a quick look at three popular instruction sets.
1. MIPS is an elegant example of the instruction sets designed since the 1980s.
 2. ARMv7 is an older instruction set also from ARM Holdings plc, but with 32-bit
addresses instead of ARMv8’s 64 bits. More than 14 billion chips with ARM processors
were manufactured in 2015, making them the most popular instruction sets in the world.
3. The final example is the Intel x86, which powers both the PC and the Cloud of the post-
PC era.
OPERATIONS OF THE COMPUTER HARDWARE
Every computer must be able to perform arithmetic. The MIPS assembly language notation
add a, b, c
instructs a computer to add the two variables b and c and to put their sum in a. This notation is
rigid in that each MIPS arithmetic instruction performs only one operation and must always have
exactly three variables. For example, suppose we want to place the sum of four variables b, c, d,
and e into variable a. The following sequence of instructions adds the four variables:
add a, b, c # The sum of b and c is placed in a
add a, a, d # The sum of b, c, and d is now in a
add a, a, e # The sum of b, c, d, and e is now in a
Thus, it takes three instructions to sum the four variables. The words to the right of the sharp
symbol (#) on each line above are comments for the human reader, so the computer ignores them.
Compiling Two C Assignment Statements into MIPS
Example: This segment of a C program contains the five variables a, b, c, d, and e. Since Java
evolved from C, this example and the next few work for either high-level programming language:
 a = b + c;
d = a – e;
The translation from C to MIPS assembly language instructions is performed by the compiler.
Show the MIPS code produced by a compiler.
Answer: A MIPS instruction operates on two source operands and places the result in one
destination operand. Hence, the two simple statements above compile directly into these two
MIPS assembly language instructions:
add a, b, c
sub d, a, e
Compiling a Complex C Assignment into MIPS
Example: A somewhat complex statement contains the five variables f, g, h, i, and j:
f = (g + h) – (i + j);
What might a C compiler produce?
Answer: The above two statements are converted into following MIPS assembly language
add t0,g,h # temporary variable t0 contains g + h
add t1,i,j # temporary variable t1 contains i + j
sub f,t0,t1 # f gets t0 – t1, which is (g + h) – (i + j)

OPERANDS OF THE COMPUTER HARDWARE

The operands of arithmetic instructions must come from a limited number of special
locations built directly in hardware called registers. The size of a register in the MIPS
architecture is 32 bits; groups of 32 bits occur so frequently that they are given the name word in
the MIPS architecture. Typically there are 32 registers in the computer. The types of operands in
computer hardware are
• Memory operands
• Constant or immediate operands
Compiling a C Assignment Using Registers
EXAMPLE: It is the compiler’s job to associate program variables with registers. Take, for
instance, the assignment statement from our earlier example:
f = (g + h) – (i + j);
The variables f, g, h, i, and j are assigned to the registers $s0, $s1, $s2, $s3, and $s4,
respectively. What is the compiled MIPS code?
ANSWER: The compiled program is very similar to the prior example, except we replace the
variables with the register names mentioned above plus two temporary registers, $t0 and $t1,
which correspond to the temporary variables above:
add $t0,$s1,$s2 # register $t0 contains g + h
add $t1,$s3,$s4 # register $t1 contains i + j
sub $s0,$t0,$t1 # f gets $t0 – $t1, which is (g + h)–(i + j)
Memory Operands:
The processor can keep only a small amount of data in registers, but computer memory
contains billions of data elements. Hence, data structures (arrays and structures) are kept in
memory. The arithmetic operations occur only on registers in MIPS instructions; thus, MIPS
must include instructions that transfer data between memory and registers. Such instructions are
called data transfer instructions.
To access a word in memory, the instruction must supply the memory address. Memory
is just a large, single-dimensional array, with the address acting as the index to that array,
starting at 0. For example, in diagram , the address of the third data element is 2, and the value of
Memory [2] is 10.

Memory addresses and contents of memory at those locations.

The data transfer instruction that copies data from memory to a register is traditionally
called load. The format of the load instruction is the name of the operation followed by the
register to be loaded, then a constant and register used to access memory. The sum of the
constant portion of the instruction and the contents of the second register forms the memory
address.
 The actual MIPS name for this instruction is lw, standing for load word. Since 8-bit bytes
are useful in many programs, virtually all architectures today address individual bytes.
Therefore, the address of a word matches the address of one of the 4 bytes within the word, and
addresses of sequential words differ by 4.
In MIPS, words must start at addresses that are multiples of 4. This requirement is called
an alignment restriction, and many architectures have it. Computers divide into those that use the
address of the left most or “big end” byte as the word address versus those that use the rightmost
or “little end” byte.
MIPS is in the big-endian camp. Since the order matters only if you access the identical
data both as a word and as four bytes, few need to be aware of the endianess.
The instruction complementary to load is traditionally called store; it copies data from a
register to memory. The format of a store is similar to that of a load: the name of the operation,
followed by the register to be stored, then off set to select the array element, and finally the base
register. The actual MIPS name is sw, standing for store word.

Actual MIPS memory addresses and contents of memory for those words.
Compiling Using Load and Store
Example: Assume variable h is associated with register $s2 and the base address of the
array A is in $s3. What is the MIPS assembly code for the C assignment statement below?
A[12] = h + A[8];
Answer: We use the proper offset for byte addressing in the load word instruction to select A[8],
and the add instruction places the sum in $t0:
lw $t0,32($s3) # Temporary reg $t0 gets A[8]
add $t0,$s2,$t0 # Temporary reg $t0 gets h + A[8]
The final instruction stores the sum into A[12], using 48 (4*12) as the offset and register $s3 as
the base register.
sw $t0,48($s3) # Stores h + A[8] back into A[12]
Constant or Immediate Operands
Constant variables are used as one of the operand for many arithmetic operations in
MIPS. The constants would have been placed in memory when the program was loaded.
For example, to add the constant 4 to register $s3, we could use the code
lw $t0, AddrConstant4($s1) # $t0 = constant 4
add $s3,$s3,$t0 # $s3 = $s3 + $t0 ($t0 == 4)
assuming that $s1 + AddrConstant4 is the memory address of the constant 4.
An alternative that avoids the load instruction is to offer versions of the arithmetic
instructions in which one operand is a constant. This quick add instruction with one constant
operand is called add immediate or addi. To add 4 to register $s3, we just write
addi $s3,$s3,4 # $s3 = $s3 + 4
Constant operands occur frequently, and by including constants inside arithmetic instructions,
operations are much faster and use less energy than if constants were loaded from memory.

REPRESENTING INSTRUCTIONS IN THE COMPUTER

In MIPS assembly language, registers $s0 to $s7 map onto registers 16 to 23, and
registers $t0 to $t7 map onto registers 8 to 15. Hence, $s0 means register 16, $s1 means register
17, $s2 means register 18, . . . , $t0 means register 8, $t1 means register 9, and so on.
Instruction Format: A form of representation of an instruction composed of fields of binary
numbers. Machine Language is the binary representation used for communication within a
computer system.
Format Types:
1. R-Format
2. I-Format
3. J-Format
R-TYPE (FOR REGISTER) OR R-FORMAT
MIPS fields are given names to make them easier to discuss:

Here is the meaning of each name of the fields in MIPS instructions:

op: Basic operation of the instruction, traditionally called the opcode.
rs: The first register source operand.
rt: The second register source operand.
rd: The register destination operand. It gets the result of the operation.
shamt: Shift amount. (It is used in shift instructions; it will not be used until then, and hence the
field contains zero in this section.)
funct: Function. This field, oft en called the function code, selects the specific variant of the
operation in the op field.
Exapmle: add $t0, $s1,$s2
The decimal representation of the instruction is
0 17 18 8 0 32

Each of these segments of an instruction is called a field. The first and last fields (containing 0
and 32 in this case) in combination tell the MIPS computer that this instruction performs
addition. The second field gives the number of the register that is the first source operand of the
addition operation (17 = $s1), and the third field gives the other source operand for the addition
(18 = $s2). The fourth field contains the number of the register that is to receive the sum
(8 = $t0). The fifth field is unused in this instruction, so it is set to 0. Thus, this instruction adds
register $s1 to register $s2 and places the sum in register $t0. This instruction can also be
represented as fields of binary numbers as opposed to decimal:

I-FORMAT
I-type (for immediate) or I-format and is used by the immediate and data transfer
instructions. The fields of I-format are
The 16-bit address means a load word instruction can load any word within a region of
+215 or 32,768 bytes (+213 or 8192 words) of the address in the base register rs.
Example: lw $t0, 32($s3) # Temporary reg $t0 gets A[8]

Here, 19 (for $s3) is placed in the rs field, 8 (for $t0) is placed in the rt field, and
32 is placed in the address field. Note that the meaning of the rt field has changed for this
instruction: in a load word instruction, the rt field specifies the destination register, which
receives the result of the load.
J-FORMAT
J format or J-type is short for "jump type". The format of a J-type instruction looks like:
Opcode Address
6 bits 26 bits
Example: j 10000

Where 2 is the opcode for jump.

LOGICAL OPERATIONS
The packing and unpacking of bits into words are called as logical operations.
The first class of such operations is called shifts. They move all the bits in a word to the left or
right, filling the emptied bits with 0s. For example, if register $s0 contained
0000 0000 0000 0000 0000 0000 0000 0011two = 3ten
and the instruction to shift left by 2 was executed, the new value would be:
0000 0000 0000 0000 0000 0000 0000 1100two = 12ten
The dual of a shift left is a shift right. The actual name of the two MIPS shift instructions
are called shift left logical (sll) and shift right logical (srl). The following instruction performs
the operation above, assuming that the original value was in register $s0 and the result should go
in register $t2:
sll $t2,$s0,2 # reg $t2 = reg $s0 << 2 bits
We delayed explaining the shamt fi eld in the R-format. Used in shift instructions, it
stands for shift amount. Hence, the machine language version of the instruction above is

op rs rt rd shamt funct
0 0 16 10 2 0

The encoding of sll is 0 in both the op and funct fields, rd contains 10 (register $t2), rt
contains 16 (register $s0), and shamt contains 4. The rs field is unused and thus is set to 0. The
above sll shifts by 2, which gives the same result as multiplying by 22 or 4. The first bit pattern
above represents 3, and 3*22=3*4=12, the value of the second bit pattern.
AND: A logical bit by- bit operation with two operands that calculates a 1 only if there is a 1 in
both operands.
OR: A logical bit-by bit operation with two operands that calculates a 1 if there is a 1 in either
operand.
NOT: A logical bit-by bit operation with one operand that inverts the bits; that is, it replaces
every 1 with a 0, and every 0 with a 1.
NOR: A logical bit-by bit operation with two operands that calculates the NOT of the OR of
the two operands. That is, it calculates a 1 only if there is a 0 in both operands.
INSTRUCTIONS FOR MAKING DECISIONS
MIPS assembly language includes two decision-making instructions, similar to an if
statement with a go to. The first instruction is
beq register1, register2, L1
This instruction means go to the statement labeled L1 if the value in register1 equals the value in
register2. The mnemonic beq stands for branch if equal. The second instruction is
bne register1, register2, L1
It means go to the statement labeled L1 if the value in register1 does not equal the value in
register2. The mnemonic bne stands for branch if not equal. These two instructions are
traditionally called conditional branches.
Compiling if-then-else into Conditional Branches
In the following code segment, f, g, h, i, and j are variables. If the five variables f through
j correspond to the five registers $s0 through $s4, what is the compiled MIPS code for this C if
statement?
if (i == j)
f = g + h;
else
f = g – h;
The above figure shows a flowchart of what the MIPS code should do. The first expression
compares for equality, so it would seem that we would want the branch if registers are equal
instruction (beq). In general, the code will be more efficient if we test for the opposite condition
to branch over the code that performs the subsequent then part of the if (the label Else is defined
below) and so we use the branch if registers are not equal instruction (bne):

bne $s3,$s4,Else # go to Else if i ≠ j

add $s0,$s1,$s2 # f = g + h (skipped if i ≠ j)
j Exit # go to Exit
Else: sub $s0,$s1,$s2 # f = g – h (skipped if i = j)
Exit:

Conditional branch: An instruction that requires the comparison of two values and that allows
for a subsequent transfer of control to a new address in the program based on the outcome of the
comparison.
This example introduces another kind of branch, oft en called an unconditional branch.
This instruction says that the processor always follows the branch. To distinguish between
conditional and unconditional branches, the MIPS name for this type of instruction is jump,
abbreviated as j (the label Exit is defined at the last).
Loops
Decisions are important both for choosing between two alternatives—found in if statements—
and for iterating a computation—found in loops. The same assembly instructions are the building
blocks for both cases.
Compiling a while Loop in C
Here is a traditional loop in C:
while (save[i] == k)
i += 1;
Assume that i and k correspond to registers $s3 and $s5 and the base of the
array save is in $s6. What is the MIPS assembly code corresponding to this C segment?
The first step is to load save[i] into a temporary register. Before we can load save[i] into a
temporary register, we need to have its address. Before we can add i to the base of array save to
form the address, we must multiply the index i by 4 due to the byte addressing problem.
Fortunately, we can use shift left logical, since shifting left by 2 bits multiplies by 22 or 4.
We need to add the label Loop to it so that we can branch back to that instruction at the end of
the loop:
Loop: sll $t1,$s3,2 # Temp reg $t1 = i * 4
To get the address of save[i], we need to add $t1 and the base of save in $s6:
add $t1,$t1,$s6 # $t1 = address of save[i]
Now we can use that address to load save[i] into a temporary register:
lw $t0,0($t1) # Temp reg $t0 = save[i]
Th e next instruction performs the loop test, exiting if save[i] ≠ k:
bne $t0,$s5, Exit # go to Exit if save[i] ≠ k
The next instruction adds 1 to i:
addi $s3,$s3,1 #i=i+1
The end of the loop branches back to the while test at the top of the loop. We just add the Exit
label after it, and we’re done:
j Loop # go to Loop
Exit:
Case/Switch Statement
Most programming languages have a case or switch statement that allows the
programmer to select one of many alternatives depending on a single value. The simplest way to
implement switch is via a sequence of conditional tests, turning the switch statement into a chain
of if-then-else statements. Sometimes the alternatives may be more efficiently encoded as a table
of addresses of alternative instruction sequences, called a jump address table or jump table, and
the program needs only to index into the table and then jump to the appropriate sequence. The
jump table is then just an array of words containing addresses that correspond to labels in the
code. Th e program loads the appropriate entry from the jump table into a register. It then needs
to jump using the address in the register. To support such situations, computers like MIPS
include a jump register instruction (jr), meaning an unconditional jump to the address specified
in a register. Then it jumps to the proper address using this instruction.

MIPS ADDRESSING MODE

Multiple forms of addressing are generically called addressing modes. The different ways
in which the location of an operand is specified in an instruction are referred to as addressing
Mode. The MIPS addressing modes are the following:
• Immediate addressing
• Register addressing
• Base or displacement addressing
• PC-relative addressing
• Pseudodirect addressing
1. Immediate addressing, where the operand is a constant within the instruction itself

Example: addi $S1, $S2, 20

2. Register addressing, where the operand is a register

Example: add $S1,$S2,$S3

3. Base or displacement addressing, where the operand is at the memory location whose address
is the sum of a register and a constant in the instruction

Example: lw $S1, 20($S2)

4. PC-relative addressing, where the branch address is the sum of the PC and a constant in the
instruction

Example: bne $S1, $S2,25

5. Pseudodirect addressing, where the jump address is the 26 bits of the instruction concatenated
with the upper bits of the PC

Example: j 10000