902 PRACTICAL ELECTRONICS FOR INVENTORS

FIGURE 14.4 The Elbert 2–Spartan 3A FPGA development board.

• Stereo jack
• Micro SD card adapter
• Three seven-segment displays
• 39 IOs for user-defined purposes
• On-board voltage regulators

14.4.1 Installing the Elbert Software

The Elbert board has a software utility for programming the board. This handles just
the final step of copying the binary file generated by ISE onto the Elbert V2’s flash
memory. There is also a USB driver to install for Windows users. To set up your com-
puter to use the Elbert, visit the product page for the Elbert V2 at numato.com and
click on the Downloads tab.
You will need to download:

• Configuration tool: This is used to program the board

• Numato Lab USB CDC driver
• User manual

To install the USB driver on Windows, plug the Elbert V2 board into your
computer and the New Hardware Wizard should start. Point the wizard at the
extracted “numatocdc” folder and the driver should install and the new hardware
be recognized.
After this, the Elbert V2 will be connected to one of the virtual COM ports of your
PC. To find out which port, open the Windows Device Manager and you should find
it listed in the Ports section as shown in Fig. 14.5.
 Chapter 14: Programmable Logic 903

FIGURE 14.5 Finding the Elbert V2 port.

14.5 Downloads
All the code examples used in this book can be found in the GitHub repository
(https://github.com/simonmonk/pefi4).
To install the examples on your PC, click on the “Download ZIP” button in the
bottom right of the GitHub page and then extract the file. You will find the examples
in the folder “fpga.”
It is worth working through the examples below to build-up the projects and get
used to using ISE, but if you get stuck and need to compare what you have done with
the final working design, then these files will come in handy.

14.6 Drawing Your FPGA Logic Design

The ISE design tool gives you two ways of programming your FPGA. One is to draw
a familiar logic diagram and the second is to use the Verilog hardware description
language (HDL). We will start with the schematic approach, although seasoned
FPGA designers nearly always use Verilog or its rival VHDL.
For this first example, we will go into quite a lot of detail on using the ISE tool to
get you up and running.

14.6.1 Example 1: A Data Selector

The first example that we will make is the data selector that you first met in Chap. 12
(Fig. 12.32). The schematic for this is repeated in Fig. 14.6.
The three inputs (A, B, and “data select”) for this circuit will be hooked up to three
of the push buttons on the Elbert V2 and the output will be connected to one of the
LEDs so that we can see the circuit actually in use.

Step 1: Create a New Project

The first step is to fire up ISE and then select File->New Project from the menu. This
will open the New Project Wizard shown in Fig. 14.7.
904 PRACTICAL ELECTRONICS FOR INVENTORS

Simple 1-of-2 data selector

out
B

Data select input:

data LOW(0) = selects A
select HIGH(1) = selects B

Switch analogy

A
out
B
data select

FIGURE 14.6 A simple data selector.

FIGURE 14.7 The New Project Wizard in ISE.

Enter “data_selector” in the Name field. In the Location field navigate to the folder
where you want to keep your ISE designs. The Working Directory field will auto-
matically update to match this directory, so you don’t need to change the Working
Directory field.
Change the “Top-level source type” drop-down to “Schematic” and then click
“Next.”
This will take you to the Project Settings shown in Fig. 14.8.
Change the settings so that they match Fig. 14.8 and then click “Next” again. The
Wizard will then show you a summary of the new project and you can then click
“Finish.”
This will create for you the new, but empty project shown in Fig. 14.9.
The screen is divided into four main areas:
In the top left you have the Project View. This is where you can find the various
files that go to make up a project. It is organized as a tree structure. Initially there are
 Chapter 14: Programmable Logic 905

FIGURE 14.8 The New Project Wizard—Project Settings.

FIGURE 14.9 A new project.

two entries in this area. There is the entry that says “data_selector” and the second
entry that has a seemingly random name (xc3s50a-4tq144). The latter will eventually
contain two files, the schematic drawing that we are about to create and an imple-
mentation constraints file that defines how the inputs and outputs in the schematic
connect to the actual switches and LEDs on the Elbert V2.
906 PRACTICAL ELECTRONICS FOR INVENTORS

You can also double-click on “xc3s50a-4tq144” to open the project properties. So,
if you made a mistake setting the project properties using the New Project Wizard,
you can always correct it by double-clicking on this entry.
To the left, beneath the Project View is the Design View. This will eventually list
useful actions that we can apply to our design including generating the binary file for
programming the Elbert V2.
The wide area at the bottom of the window is the console. This is where error
messages will appear.
The large area to the right of the window is the editor area. When it comes to
drawing the schematic, this is where you will do it.

Step 2: Create a New Schematic Source

To create a new schematic, right click on data_selector in the Project View and select
the option “New Source.” This will open the New Source Wizard (Fig. 14.10).

FIGURE 14.10 The New Source Wizard.

Select a Source Type of “Schematic” and enter “data_selector” in the File name
field and then click “Next.” A summary screen will appear, to which you can respond
by clicking “Finish.” This will result in a blank canvas being prepared for us in which
we can draw the schematic.
This is shown in Fig. 14.11, labelling the parts that you are going to need.
The icon menu bar running vertically to the left of the editor area controls the
mode of the window and also what appears on the left-hand side of the window:

• The top icon (an arrow) puts the window into select mode. You will need to click
on this before you can drag circuit symbols about or change their properties.
• Click on the “Add wire” mode when you are connecting the gates and other circuit
symbols together.
• IO markers are used to indicate the boundary between the schematic you are
designing and the actual pins of the FPGA IC. This mode lets you add these symbols.
• Add logic symbols. This is the mode selected in Fig. 14.11. The left hand panel then
divides into a top half that shows categories of circuit symbol and a bottom half
that has a list of the component symbols in that category.
 Chapter 14: Programmable Logic 907

FIGURE 14.11 The schematic editor.

Step 3: Add the Logic Symbols

Put the screen into “Add logic symbols” mode. You are going to need to add two
two-input AND gates, a two-input OR gate and two invertors.
Click on the category “Logic” the select “and2” (2 input AND). Then click twice
in the editor area to drop the two and gates. Then select “or2” and drop an OR gate
in roughly the right location to the right of the AND gates, and final add in the two
invertors (“inv”) below and to the left of the AND gates.
Zoom in a bit (Toolbar at the top of the window) and the editor area should look
something like Fig. 14.12.

Step 4: Connect the Gates

Click on the “Add wire” icon and then connect the gates together in the arrangement
of Fig. 14.6. To make a connection, click the mouse on one of the square connection
points and drag out to the connection point or line that you want to connect to. The
software will automatically put bends in the line for you. If you need to more things
to tidy the diagram up then you can change to “Select” mode and drag the symbols
and wires about.
The end result should be Fig. 14.13.

Step 5: Add the IO Markers

Click on the “Add IO Markers” icon and then add markers to all the inputs and the
output by dragging the mouse out from the wire in question. Notice how the soft-
ware figures out that the output is an output.
908 PRACTICAL ELECTRONICS FOR INVENTORS

FIGURE 14.12 The logic gates in position.

FIGURE 14.13 Connecting the symbols with wires.

Initially, the connections are all given names like XLXN_1, etc. To change these
names to more meaningful names, change to “Select” mode, right-click on an IO
connector and chose the menu option “Rename Port.” Change the port names so that
they agree with Fig. 14.14.
 Chapter 14: Programmable Logic 909

FIGURE 14.14 The completed schematic.

Notice that we have called the output Q. This is because the word “OUT” is
reserved for use by ISE, so you cannot call any of your connections “OUT” or you
will get an error when you try and build the project.
The schematic is now complete, and now would be a good time to do “File->Save”
to save the schematic design to file.

Step 6: Create an Implementation Constrains File

Now you need to get back to the original Project View to be able to create a new
source file. Click on the little “Xs” in the top right corners of the various views that
will have become layered on top of the Project View. You may also have to click the
“Design” tab at the bottom of the Design View.
Right-click on “data_selector” and again select “New Source” to open the New
Source Wizard. This time, select “Implementation Constraints File” and enter the
file name “data_selector_elbert” as shown in Fig. 14.15. Click “Next” and finish the
wizard.
This will open an empty text editor window where you need to type the following
text:

# User Constraint File for data selector

# implementation on Elbert V2

# Push buttons
NET “A” LOC = P80; # SW1
NET “B” LOC = P79; # SW2
NET “SEL” LOC = P78; # SW3
910 PRACTICAL ELECTRONICS FOR INVENTORS

FIGURE 14.15 Creating an Implementation Constraints File.

# Internal pull-ups need to be enabled

NET “A” PULLUP;
NET “B” PULLUP;
NET “SEL” PULLUP;

# LED
NET “Q” LOC = P46; # LED8

The lines that begin with a # are comment lines. That is, like the lines of program
code starting with // in Arduino C take no part in the functioning of the program,
the lines starting with # are not part of the configuration information, they are just to
make it easier to see what is going on.
In the section that starts with “# Push Buttons” you can see the link between the
IO Connector names on the schematic and the FPGA GPIO pins that are connected to
the switches. So, SW1 is connected to P80, etc.

FIGURE 14.16 The switch and LED pin allocations for the Elbert V2.
 Chapter 14: Programmable Logic 911

The connections from FPGA GPIO pins to the hardware

provided on the Elbert V2 are all detailed in the Elbert user
manual. Figure 14.16 taken from the manual with kind permission
of Numata shows the pin allocations associated with the switches
and LEDs.
The GPIO pins of the FPGA have configurable pull-up
resistors and these are enabled in the implementation constraints
file. The final line of the constraints file associates the output Q
with pin P46.

Step 7: Generate the Programming File

You are now ready to generate the programming file to be down-
loaded onto the Elbert V2. So, select the data_selector entry in the
hierarchy and a number of options for things to do will appear
below it in the Processes section. One of those processes will be
“Generate Programming File” (see Fig. 14.17). Right click on this
option and select “Run.”
If all is well, there will be lots of text appearing in the Console
as the programming file is generated. If there are any errors this is
where they will appear, so read the error message carefully and it
should point to where the problem is.

Step 8: Program the Elbert V2

The end result of all this activity will be a file within the working
directory of the project called data_selector.bit. It is this file
FIGURE 14.17 Generating the program- that we need to transfer onto the Elbert V2 using the Elbert V2
ming file. Configuration Tool that you downloaded earlier.
Start up the program and then click on Open File. Navigate
to the working directory for the project and select the file data_
selector.bit. Change the COM port in the drop-down list to match
the COM port allocated to the Elbert that you discovered
earlier (see Fig. 14.5) and then press the Program button.
After a while, you should see a reassuring message appear
(Fig. 14.18).
The FPGA on the Elbert V2 is now configured to be the
data selector.

Testing the Result

Initially, you should see the D8 LED on the Elbert V2 lit.
If you press SW2 the LED will turn off. Release the button
and LED 8 will turn on again. Pressing SW1 will have no
effect. Now hold SW3 down and you will notice that SW2
no longer has any effect but SW1 does alter the LEDs state.
This is the data selector working how it should. The logic
is a little confusing, because the inputs are effectively inverted
FIGURE 14.18 Programming the Elbert V2. as they are pulled to GND when you press the button.