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Pulse Width Modulation

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10 views

Pulse Width Modulation

Uploaded by

tekiyagaming
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Pulse Width

Modulation

Thareendhra Keerthi Wijayasiriwardhane


Department of Industrial Management
Faculty of Science
University of Kelaniya
[email protected]
Learning Outcomes
 On completion of this session, you should be able to
 Explain the need of PWM
 Compute duty cycle and frequency for PWM outputs
 Describe how Timers generate PWM outputs
 Explain the functionality of Timer/Counter registers
used for PWM
 Construct a microcontroller-based system and program it
to generate a PWM output with a varying duty cycle

2
Pulse Width Modulation
 A technique for getting an analog like output by means
of digital
 Toggles a digital output fast enough, making any
attached device to react not to the individual pulses, but
to the % of time that the output is high in one cycle

 How fast?

3
Duty Cycle
 Percentage of time that output is high in one cycle

4
Average Voltage

5
PWM
 Using 8-bit Timer

6
Waveform Generation

7
PWM Frequency
 In Non-Inverted mode, while
Timer counts, if a compare match
occurs, Waveform Generator
clears OCnX pin and sets it when
Timer comes to Bottom
 Waveform Generator generates a
one PWM cycle

8
Timer / Counter Registers
 TCCRnB (Timer/Counter Control Register n B)

 CSn2 (Clock Select), CSn1 and CSn0 bits select prescale


CSn2 CSn1 CSn0 Clock Source
0 0 0 Disconnect clock source
0 0 1 F_CPU
0 1 0 F_CPU/8
0 1 1 F_CPU/64
1 0 0 F_CPU/256
1 0 1 F_CPU/1024

9
Timer / Counter Registers
 TCCRnA (Timer/Counter Control Register n A)

 WGMn1 (Waveform Generation Mode) and WGMn0


bits with WGMn2 bit of TCCRnB specify waveform
generation mode
WGMn2 WGMn1 WGMn0 Mode
0 0 0 Normal
0 0 1 Phase Correct PWM
0 1 0 Clear Timer on Compare (CTC)
0 1 1 Fast PWM

10
Timer / Counter Registers
 TCCRnA (Timer/Counter Control Register n A)

 COMnA1 (Compare Output Mode), COMnA0,


COMnB1 and COMnB0 bits specify compare output
mode
COMnX1 COMnX0 Mode Description
Clears OCnX on compare
1 0 Non-Inverted
match & sets it at Bottom
Sets OCnX on compare
1 1 Inverted
match & clears it at Bottom

11
Timer / Counter Registers
 OCRnA (Output Compare Register n A) and OCRnB
 hold values to be compared against TCNTn register
 If 8-bit, can hold a value between 0 and 28 – 1
 If 16-bit, can hold a value between 0 and 216 – 1

12
Timer / Counter Registers
 TIFRn (Timer Interrupt Flag Register n)

 When a compare match occurs between OCRnX and


TCNTn registers, OCFnX (Output Compare match Flag
n X) flag bit is set
 Set OCFnX flag bit to clear it

13
Timer / Counter Registers
 TIMSKn (Timer Interrupt MaSK Register n)

 OCIEnA (Output Compare match Interrupt Enable n A)


and OCIEnB bits enable (or disables) Timer/Counter
compare match A and B interrupts, respectively

14
System 15
fader - Gradually fades the light of an
LED again and again

15
ATmega328P PWM Pinout

16
Hardware
 Schematic
Diagram

17
Hardware
 Wiring Diagram

18
Firmware
 Algorithm

19
C Program

20
Using Hexadecimal Constants

21
Using Labeled Constants

22
Firmware
 Algorithm for Arduino

23
Firmware
 Source Code (using Arduino Wrapper Functions)

24
True Analog Output
 Three options
 Switch to a microcontroller
with built-in DAC
 Add a DAC breakout
 Use a RC filter

25
Questions

26

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