MODULE 1 - Edited
MODULE 1 - Edited
MODULE I
Wave shaping circuits: First order RC differentiating and integrating circuits, First order RC low pass
and high pass filters. Diode Clipping circuits - Positive, negative and biased clipper. Diode Clamping
circuits -Positive, negative and biased clamper.
Transistor biasing: Need, operating point, concept of DC load line, fixed bias, self bias, voltage divider
bias, bias stabilization.
Electronic circuits used to create or modify specified time-varying electrical voltage or current waveforms
using combinations of active electronic devices, such as transistors or analog or digital integrated circuits,
and resistors, capacitors, and inductors.
Wave shaping is a part of signal processing where the signal waveform has to be properly shaped before
amplification. It may be defined as a process of generating new waveforms from older waveforms by
employing some network.
In non-linear wave shaping, the shape of the signal is altered by transmitting it through a non- linear
network-a network consisting of circuit elements having non- linear transfer characteristics such as diode,
transistor etc in conjunction with other linear circuit elements Such circuits find application in amplitude
limiting, clipping, clamping etc.
RC CIRCUITS
➢ High Pass RC Circuit
➢ Low Pass RC Circuit
1 1
The reactance of a capacitor,𝑋𝑐 = 2𝜋𝑓𝐶 or 𝑋𝑐 𝛼 i.e.,
𝑓
reactance Xc of the circuit capacitor decreases with the
increase in frequency.
At very high frequencies, the capacitor acts almost as a short circuit and virtually all the input appears at
the output. The output voltage is developed across resistor R. At zero frequency, the capacitor has infinite
reactance and behaves as an open circuit. Any constant (dc) input voltage is blocked and cannot reach the
output. Capacitor blocks dc and permits ac to pass through. Since, it blocks and attenuates low frequency,
but allow high frequency signals to pass through it, the circuit is called High Pass RC Circuit. This circuit
is widely employed as a coupling circuit that provides isolation between input and output.
From the above equation, it is obvious that for a given circuit, the gain A depends upon the frequency of
the input signal. The frequency response curve for the circuit is given below:-
𝑓
phase angle, θ=t𝑎𝑛−1 ( 𝑓𝐶 )
𝑓𝐶 1
As f → ∞; = 0 and A =1 When f =𝑓𝐶 , A = = 0.707
𝑓
2
𝑓𝐶 is also known as low 3dB frequency. The maximum possible value of gain (unity) is approached
asymptotically at high frequencies.
u(t ) = 1 for t 0
The unit step function is defined by the equation,
= 0 for t 0
A step voltage is zero for all times when t < 0 and maintains a voltage level, say V, for all times when
t 0 .The transition from voltage level 0 to V occurs at t = 0 and is instantaneous.
At t 0 ,
input is zero, output is also zero.
t = 0, input suddenly becomes V. Since, there is a sharp change in a short instant, the capacitor
acts as short circuit, and the entire input is coupled to output and the output voltage remains
at V.
t > 0, input remains unchanged at V, the capacitor starts charging exponentially with time constant
RC. As the capacitor C charges exponentially to V, the output voltage Vout falls
exponentially to zero.
Design Equations:
𝑉2 = 𝑉1𝑒 −𝑇1/𝑅𝐶
𝑉4 = 𝑉3𝑒 −𝑇2/𝑅𝐶
Also V=V2-V3 = V1-V4
If the square input is symmetrical T1=T2=T/2 ; V1=-V3 ; V2 =-V4
Then the percentage tilt is given by
𝑉1 − 𝑉2 𝑉1 − 𝑉1𝑒 −𝑇1/𝑅𝐶 𝑉1(1 − 𝑒 −𝑇1/𝑅𝐶 )
𝑇𝑝 = = =
𝑉/2 𝑉 𝑉/2
2
𝑥 𝑥2
We have 𝑒 −𝑥 = 1 − 1! + −⋯
2!
Then using significant first terms
𝑇1 𝑇1 𝑇/2
𝑉1(1−1+ ) 𝑉1( ) 𝑉( )
𝑅𝐶 𝑅𝐶 𝑅𝐶
𝑇𝑝 = = = 𝑠𝑖𝑛𝑐𝑒 𝑉1 = 𝑉/2
𝑉/2 𝑉/2 𝑉/2
𝑇
Then 𝑇𝑝 = 2𝑅𝐶 ∗ 100%
Case 1 : RC << T
The charging and discharging gets completed before the time period of the input.
Case 2: RC >> T
The capacitor requires more time for charging and discharging than
the time period of the input signal.
High pass filter in which the output will be the derivative of the input is called differentiator.
From circuit 𝑖𝐶 = 𝑖𝑅
𝑑𝑉𝑖𝑛
Then 𝑉𝑜𝑢𝑡 = 𝑖𝐶 𝑅 = 𝑅𝐶 𝑑𝑡
RC is known as time constant. For RC circuit to be differentiator; the following two conditions should be
satisfied.
a) The time constant RC of the circuit should be much smaller than the time period of the input signal
ie., RC << T (for perfect differentiator, RC << 0.0016 T)
b) The value of XC should be greater than 10 times of R. ie., XC 10 R
Proof of RC ≤ 0.0016T :
For high pass filter
𝑉𝑜𝑢𝑡 1
=
𝑉𝑖𝑛 𝑗
1−
2𝜋𝑅𝐶𝑓
Phase angle between input and output is given by
𝑉𝑜𝑢𝑡 0 −1
∠ = 𝑡𝑎𝑛−1 ( ) − 𝑡𝑎𝑛−1 ( )
𝑉𝑖𝑛 1 2𝜋𝑅𝐶𝑓
−1 1
= −𝑡𝑎𝑛−1 ( ) = 𝑡𝑎𝑛−1 ( )
2𝜋𝑅𝐶𝑓 2𝜋𝑅𝐶𝑓
For differentiator angle should be 90°
1
Then 90° = 𝑡𝑎𝑛−1 (2𝜋𝑅𝐶𝑓)
1
∴ = ∞ → 𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙𝑙𝑦 𝑛𝑜𝑡 𝑝𝑜𝑠𝑠𝑖𝑏𝑙𝑒.
2𝜋𝑅𝐶𝑓
1
So take 2𝜋𝑅𝐶𝑓 as large as possible.
1
If 2𝜋𝑅𝐶𝑓 ≥ 100 → 𝑡𝑎𝑛−1 (100) = 89.42°
1
∴ RC ≤
2𝜋𝑓 ∗ 100
𝑇
→ RC ≤ 2𝜋∗100
∴ RC ≤ 0.0016T
2) RC circuit with RC << T is employed to generate spikes for triggering electronic circuits such as
multivibrators, flip flops etc.
FIRST ORDER LOW PASS RC CIRCUIT
𝑉𝑜𝑢𝑡
𝐺=
𝑉𝑖𝑛
Current through the circuit is given as,
Therefore
From the above equation, it is obvious that for a given circuit, the gain A depends upon the frequency of
the input signal. The frequency response curve for the circuit is given below:-
From the frequency response curve, it is obvious that all frequencies below cut off frequency fC are passed,
while those above are attenuated. The cut- off frequency is given as,
1
𝑓𝐶 = -----(4)
2𝜋𝑅𝐶
1
Sub eq (4) in eq (3), Gain A =
j f
1+
fH
𝑓
𝜃 = 𝑇𝑎𝑛−1 (𝑓 )
𝐻
f 1
As f → ∞; = ∞; and A = 0 When f = fH , A = =0.707 fH is also known as high 3dB
fH 2
1 1
frequency. f = fH also implies that f = or R =
2 R C 2 f C
The output is taken across capacitor, where the voltage across capacitor is given by
𝑡
𝑉𝑐 = 𝑉(1 − 𝑒 −𝑅𝐶 )
At t < 0, Vin = 0 and output is zero. At t = 0, the input suddenly changes from 0 to V. Since there is a
sharp change in a short instant, the capacitor acts as short circuit and the input is grounded. At t > 0, the
input voltage remains unchanged at V, the capacitor starts charging exponentially to V and the output is
same as the capacitor voltage.
Rise Time
Rise time is the time taken by the capacitor to charge from 10 % of its maximum value to 90 % of its
maximum value.
At t = t1 ; Vc = 0.1V
−𝑡1⁄
→ 0.1𝑉 = 𝑉 (1 − 𝑒 𝑅𝐶 ) ---(1)
At t = t2 ; Vc = 0.9V
−𝑡2⁄
→ 0.9𝑉 = 𝑉 (1 − 𝑒 𝑅𝐶 ) ---(2)
−𝑡1⁄
From (1): 𝑒 𝑅𝐶 = 1 − 0.1 = 0.9
−𝑡2⁄
From (2) : 𝑒 𝑅𝐶 = 1 − 0.9 = 0.1
Taking natural logarithm on both sides : −𝑡2⁄𝑅𝐶 = ln(0.1) = −2.3 →𝑡2 = 2.3𝑅𝐶
A square wave may be defined as a waveform which maintains itself at one constant level V1 for a time
duration of T1 and another constant level V2 for a time duration of T2 and which repeats itself at time T =
T1 + T2.
At t < 0, Vin = 0 and hence output is zero. At t = 0, input is changing sharply from –V to V.Capacitor
charges towards +V. But at t=T1 input changes from +V to -V; capacitor discharges towards -V. Since,
charging and discharging is not completed within the time period; the output will be triangular wave form.
−𝑡
Vo = VF- (VF- Vin)𝑒 𝑅𝐶
A circuit which gives the integral of input as the output is called an integrator.
i.e Vout = Vc
1
where 𝑉𝐶 = 𝐶 ∫ 𝑖𝐶 𝑑𝑡
From circuit 𝑖𝐶 = 𝑖𝑅
𝑉𝑖𝑛
𝑖𝑅 =
𝑅
1
Therefore 𝑉𝑜𝑢𝑡 = 𝑅𝐶 ∫ 𝑉𝑖𝑛 𝑑𝑡
ii) R > 10 XC
𝑉𝑜𝑢𝑡 1
=
𝑉𝑖𝑛 1 + 𝑗2𝜋𝑅𝐶𝑓
Phase angle between input and output is given by
𝑉𝑜𝑢𝑡 0
∠ = 𝑡𝑎𝑛−1 ( ) − 𝑡𝑎𝑛−1 (2𝜋𝑅𝐶𝑓)
𝑉𝑖𝑛 1
For integrator angle should be 90°
Then 90° = −𝑡𝑎𝑛−1 (2𝜋𝑅𝐶𝑓)
∴ −2𝜋𝑅𝐶𝑓 = ∞ → 𝑝𝑟𝑎𝑐𝑡𝑖𝑐𝑎𝑙𝑙𝑦 𝑛𝑜𝑡 𝑝𝑜𝑠𝑠𝑖𝑏𝑙𝑒.
So take 2𝜋𝑅𝐶𝑓 as large as possible.
If 2𝜋𝑅𝐶𝑓 ≥ 100 → 𝑡𝑎𝑛−1 (100) = 89.42°
100
∴ RC ≥
2𝜋𝑓
100∗𝑇
→ RC ≥ →→ RC ≥ 15.92T
2𝜋
∴ RC ≥ 16T
When square wave input is applied, since RC>>16T, the capacitor charges slowly in a linear manner
through resistor R to peak input voltage. So the output starts increasing. When the input becomes negative
the capacitor discharges in the same manner. The charging and discharging depends on RC time constant.
For larger value of RC the circuit produces triangular output.
2) Low pass filters are also employed in generation of triangular and ramp waveforms.
a) Since the gain of an integrator falls with the increase in frequency, whereas the gain of
the differentiator increases nominally linearly with frequency, it is easier to stabilize
the former than the latter w.r.t spurious oscillations.
c) The amplitude of a differentiator may get overloaded in case the input waveform
changes very rapidly.
Classification of clippers
2) According to biasing
1. Unbiased clippers
2. Biased clippers.
Sometimes it is desired to remove a small portion of positive or negative half cycle of the signal
voltage. Biased clippers are employed for this purpose.
Positive clippers is a clipper which removes the positive half cycles of the input voltage, while the
negative clipper the clipper which removes the negative half cycle of the input voltage. Sometimes it is
desired to remove to remove a small portion of positive or negative half cycles of the signal voltage.
Biased clippers are employed for this purpose.
The graph of output variable against input variable of the circuit is called transfer characteristics of the
circuit. The working of the circuit can be easily understood if a graph of output against input is available.
This circuit passes only negative going half waves of the input to the output. The entire positive half
cycles are bypassed through the diode to ground terminal because the diode gets forward biased when
the input voltage becomes positive. Due to the voltage drop across the diode, the clipping occurs at
+0.6 V.
This circuit is the combination of positive and negative clippers. During the positive half cycle of the
input, one branch is effective and the other remains open and vice versa during the negative half cycle.
Actual clipping levels are +3.6V and -3.6V due to the diode drops.
8) Slicer
A slicer circuit is nothing but a two level clipper which has both clipping levels either in the positive or
in negative part of the input signal.
Consider the two level slicer with slicing levels at +3V and +5V. This circuit allows the input signal pass
to the output only between +3V and +5V.
During the negative half cycle of th input, diode D1 conducts and the diode D2 get reverse biased. The
output voltage remains at +3Vbecause the diode D1 conducts when input is less than +3V.
During the positive half cycle of the input when input exceeds +3V ,D1 is reverse biased and input appears
at the output.If the input exceeds +5V,D2conducts and the output remains at +5 V.When the diode drop
is considered, actual clipping occurs at +2.4V and +5.6V.
Series Clippers:
The shunt clippers are used to clip the peaks of the waveforms. The series clippers keep the peaks of the
waveforms intact. They clip off the signal at the base level. Since the diodes are connected in series with
the input signals source, input passes to output when the diode is ON. When the diode is OFF, input gets
blocked from reaching the output. During that period output will be zero.
This circuit passes only negative going half waves of the input to the output. During the positive going
half cycle of the input, diode turns off. Since 0.6V gets dropped across the diode during conduction,
amplitude of the output peak is reduced by 0.6V.
This circuit passes only positive going half waves of the input to the output. During the negative going
half cycle of the input, diode turns off. Amplitude of the output peak is reduced by 0.6V
Biased clippers
Diodes in the positive and negative clippers are either forward biased or reverse biased in these
circuits. Thus four combinations of diode and DC source create four different clipping circuits namely
forward biased positive clipper, reverse biased positive clipper, forward biased negative clipper and
reverse biased negative clipper.
When the dc source is connected such a way that it reverse biases the diode, peak value of the output
voltage is smaller than the input peak value by the amount of dc voltage applied. Diode conducts only
when the input voltage is sufficiently high to forward bias the diode. When the dc source is connected
such a way that it forward biases the diode, peak value of the output voltage is larger than the input peak
by the amount of the dc voltage applied.
Figure shows two general types of clamping. They are positive and negative clamping
• Positive clamping occurs when negative peaks raised or clamped to ground or on the zero level. In
other words, it pushes the signal upwards so that negative peaks fall on the zero level.
• Negative clamping occurs when positive peaks raised or clamped to ground or on the zero level. In
other words, it pushes the signal downloads so that the positive peaks fall on the zero level. In both
cases the shape of the original signal has not changed, only there is vertical shift in the signal.
Suppose the input voltage is represented by the expression Vm = sin ωt. During one negative half cycle
of the input sine wave, the diode conducts and capacitor charges to Vm with positive polarity at right side
of the capacitor. During the positive half cycle of the input sinewaves, the capacitor cannot discharge
since the diode conduct. Thus capacitor acts as a dc source of Vm volts connected in series with input
signal source. The output voltages then can be expressed as
Vc = Vm –VD
From these values we can draw the output wave form and transfer characteristics as shown above.
During one positive half cycle of the input sine wave, the diode conducts and capacitor charges to Vm with
negative polarity at right side of the capacitor. During the negative half cycle of the input sine wave, the
capacitor cannot discharge since the diode doesnot conduct. Thus capacitor acts as a dc source of Vm volts
connected in series with input signal source. The output voltage then can be expressed as
Vc = - Vm + 0.6
During one negative half cycle of the input sine wave, capacitor charges through the dc source and
diode with positive polarity of the capacitor at its right side. The output is then expressed as Vo = Vin+
capacitor voltage
Vc = Vm -0.6+3
During one negative half cycle of the input sine wave, capacitor charges through the dc source
and diode with positive polarity of the capacitor at its right side. The output is then expressed as Vo =
Vin+ capacitor voltage
Vc =+ Vm -0.6-3
Vc = -Vm +0.6+3
Vc = -Vm+0.6-3
TRANSISTOR BIASING
Biasing ensures that the device operates in the required region of operation and also stabilize the circuit
against any external variations.
Region of operation of transistor:
• Active region(linear region) : EB junction forward biased and CB junction reverse biased –
Eg: amplifier
• Cut off region : Both EB and CB junctions reverse biased
• Saturation Region : Both EB and CB junction forward biased.
• Inverse mode: EB junction reverse biased and CB junction forward biased.
The load line is drawn by joining the saturation and cut off points. The region that lies between these two
is the linear region. A transistor acts as a good amplifier in this linear region.
If this load line is drawn only when DC biasing is given to the transistor, but no input signal is applied,
then such a load line is called as DC load line. Whereas the load line drawn under the conditions when
an input signal along with the DC voltages are applied, such a line is called as an AC load line.
DC Load Line
When the transistor is given the bias and no signal is applied at its input, the load line drawn under such
conditions, can be understood as DC condition. Here there will be no amplification as the signal is
absent.
In the circuit, Vcc is the supply voltage, RC is the collector resistance (or load resistance) and VCE is the
collector-to-emitter voltage.
Applying Kirchoff’s second law (KVL) to the output or collector circuit, we have,
VCC = VCE + I C RC
VCC − VCE
IC =
RC
− VCE VCC
IC = +
RC RC
It is a point on the dc load line which represents dc collector – emitter voltage VCE and collector current
IC in the absence of ac signal. It is also called the operating point because the variations in VCE and IC take
place about this point, when signal is applied. Q-point is selected in such a way that irrespective of AC
signal swing, the transistor remains in the active region.
1
The best portion for this point is midway between cut – off and saturation points, where VCE = VCC .
2
Transistor Biasing
Transistor biasing Definition: - The proper flow of zero signal collector current and the maintenance of
proper collector-emitter voltage during the passage of signal is called the transistor biasing. If it is not biased
properly, it would work inefficiently and produce distortion in the output. The circuit used for biasing is called
biasing circuit.
Variation of IC and VCE for operating point
Consider the point Q at the centre of the load line. When signal
is applied in addition to the bias level, IC and VCE varies around
the quiescent point symmetrically, allowing the device to react
and amplify both the + ve and –ve parts of input signal.
At point B
Near the cut-off region, output current IC and voltage VCE would be allowed to vary, but clipped at the
negative peaks for a sinusoidally varying input signal. So, this is not a suitable operating point.
At point A
Near the saturation region, the output signal would be clipped at the positive peaks for a sinusoidally
varying input signal. Thus, this is not a suitable operating point.
Thus, point Q located at the centre of the load line seems to be the best operating point in terms of linear
gain or largest possible voltage and current swing.
Q point at the middle of active region Q point near saturation point
Bias Stabilization
Only fixing of operating point is not sufficient. But it should also remain stable. It does not shift due to
change in temperature or due to variation in transistor parameters (due to replacement of transistor).
The process of making the operating point independent of temperature changes or variations in transistor
parameters is known as Stabilization.
Stabilization of the operating point has to be achieved due to the following reasons.
1. Temperature dependence of IC
IC=βIB+ICEO =βIB+(β+1)ICBO
(a) Reverse saturation current ICBO , which doubles for every 100 rise in temperature.
2. Individual variations
Value of β and VBE are not same for any 2 transistors even of same type. Eg:- For Si –BC 147
transistor β varies from 100 to 600.
Reason:- Due to poor manufacturing techniques, the base width of transistor may vary from one
to another causing variations in β , VBE etc.
3. Thermal Runaway
The maximum temperature that can withstand for Si = 1500C – 2250C and for Ge = 600C -1000C
beyond which it may burn out.
IC increases with increase in temperature. This leads to increase in I CO and power dissipation, with
further increase in temperature. Being a cumulative process, it can lead to thermal run away,
resulting in burn out of transistor. This self-destruction of unstabilized transistor is called thermal
runaway.
However, if by some modification, IB made to fall with increase in temperature, then decrease in
the term I B can be made to neutralize the increase in the term (1 + ) I CO , thereby keeping IC
almost constant. This will achieve thermal stability resulting in bias stability.
1) By stabilization technique :-
This technique make use of resistive biasing circuit that permits such a variation of IB as to maintain IC
almost constant inspite of variations in ICO , VBE and β.
2) Compensation technique:-
Make use of temperature sensitive devices such as diodes, transistors, thermistors etc. Such devices
produce compensating voltages and currents so as to make operating point stable.
The degree of success achieved in stabilizing IC against variations in ICO is expressed in terms of stability
factor, S.
S is defined as the rate of change of collector current w.r.to ICO keeping β and VBE constant.
𝑑𝐼
𝑆 = 𝑑𝐼 𝐶 at constant β and VBE (or IB)
𝐶𝑂
Smaller the value of S, higher the stability. Lowest value possible is unity.
If β and VBE vary with temperature, then there are 2 other stability factors , SV and Sβ
𝑑𝐼
𝑆𝑉 = 𝑑𝑉 𝐶 at constant ICO and β .
𝐵𝐸
𝑑𝐼𝐶
𝑆𝛽 = at constant ICO and VBE .
𝑑𝛽
I C = I E + I CO Since , I E = I B + I C
I C = (I B + I C ) + I CO
I C = I B + I C + I CO
I C − I C = I B + I CO
I C (1 − ) = I B + I CO
1 1 1 1
IC = IB + I CO = ; = ; = ; =1+
1− 1− 1− 1− 1− 1−
1+
I C = I B + (1 + ) I CO → (1)
𝑑𝐼𝐵 𝑑𝐼𝐶𝑂
1 = 𝛽 + (𝛽 + 1)
𝑑𝐼𝐶 𝑑𝐼𝐶
𝑑𝐼𝐵 1
1 = 𝛽 + (𝛽 + 1)
𝑑𝐼𝐶 𝑆
𝑑𝐼𝐵 𝛽+1
(1 − 𝛽 )=
𝑑𝐼𝐶 𝑆
1+𝛽 𝑑𝐼𝐵
𝑆 = 𝑇ℎ𝑒 𝑣𝑎𝑙𝑢𝑒𝑜𝑓 𝑑𝑒𝑝𝑒𝑛𝑑𝑠 𝑜𝑛 𝑏𝑖𝑎𝑠𝑖𝑛𝑔 𝑎𝑟𝑟𝑎𝑛𝑔𝑒𝑚𝑒𝑛𝑡 𝑢𝑠𝑒𝑑.
𝑑𝐼𝐵 𝑑𝐼𝐶
1 −𝛽
𝑑𝐼𝐶
𝑑𝐼𝐵 𝑑𝛽 𝑑𝛽
1 = 𝛽 + 𝐼𝐵 + 𝐼𝐶𝑂
𝑑𝐼𝐶 𝑑𝐼𝐶 𝑑𝐼𝐶
𝑑𝐼𝐵 𝑑𝛽
1 −𝛽 = (𝐼 + 𝐼𝐶𝑂 )
𝑑𝐼𝐶 𝑑𝐼𝐶 𝐵
𝑑𝐼𝐵 1
1 −𝛽 = (𝐼 + 𝐼𝐶𝑂 )
𝑑𝐼𝐶 𝑆𝛽 𝐵
𝐼𝐵 + 𝐼𝐶𝑂
∴ 𝑆𝛽 =
𝑑𝐼
1 −𝛽 𝐵
𝑑𝐼𝐶
➢ Establish the Q point in the middle of the active region of the characteristics, so that on applying
the input signal, the instantaneous Q point does not move to either the cut-off region or to the
saturation region, even at the extreme values of the signal.
➢ Make Q point independent of transistor parameters so that, replacement of the same type in the
circuit does not shift the Q point.
Biasing can be done using single power supply, dual power supply and current source.
Therefore, IB = (VCC - VBE)/RB .Since VBE is very small (0.7V for Si and 0.3 for Ge), it can be neglected.
So IB = VCC / RB
Here VCC is fixed known quantity and once RB is fixed, IB is also fixed. Hence the name fixed bias.
Also for given circuit, VCC = ICRC + VCE (Collector – Emitter section)
1+𝛽
𝑆= 𝛽𝑑𝐼
1 − 𝑑𝐼 𝐵
𝐶
VCC
In fixed biasing, IB is independent of IC . i.e., IB = VCC / RB & RB are constants, IB is also constant.
dIB /dIC = 0 and the stability factor is given by the equation reduces to
S = 1+β
If β = 150, then S = 151 which means that IC 151 times as much as ICO. Such a large value of S makes
thermal runaway, a definite possibility with this circuit. Since β is a large quantity, this is very poor biasing
circuit. Therefore in practice the circuit is not used for biasing.
Merits:
➢ It is simple to shift the operating point anywhere in the active region by merely changing the
base resistor (RB).
➢ No loading of the source by the biasing circuit as no resistor is used across BE junction.
Demerits:
➢ The collector current does not remain constant with variation in temperature or power supply
voltage. Therefore the operating point is unstable.
➢ When the transistor is replaced with another one, considerable change in the value of β can be
expected. Due to this change the operating point will shift.
Collector to Base
The collector to base bias circuit is same as base bias circuit except that the base resistor R B is returned
to collector, rather than to VCC supply as shown in the figure below. This circuit is called self-bias because
the base current and voltage are provided from collector.
Or IB(RL+RB)+ICRL+VBE=VCC
Therefore,
We know that
Therefore
This value is smaller than (1+β) which is obtained for fixed bias circuit. Thus there is an improvement in
the stability. This circuit provides a negative feedback which reduces the gain of the amplifier. So the
increased stability of the collector to base bias circuit is obtained.
The voltage divider as shown in the figure is formed using external resistors R1 and R2. The voltage across
R2 forward biases the emitter junction. By proper selection of resistors R1 and R2, the operating point of
the transistor can be made independent of β. In this circuit, the voltage divider holds the base voltage
fixed independent of base current provided the divider current is
large compared to the base current. However, even with a fixed
base voltage, collector current varies with temperature so an
emitter resistor is added to stabilize the Q-point.
Circuit Analysis:
Let the current in resistor R1 is I1 and this is divided into two parts
– current through base and resistor R2. Since the base current is
very small so for all practical purpose it is assumed that I1 also
flows through R2, so we have
VCC
I1 =
R1 + R2
VCC R2
Voltage across R2 VB = (Voltage divider rule)
R1 + R2
Applying KVL to the base, VB =VBE +VRE = VBE + I E RE
VB − VBE
I E IC (1)
RE
Let temperature of transistor junction rise when it is loaded. This causes increase in leakage current and
so increase in β. Hence, IC tends to increase. When IC increases, drop across RE increases. Then VBE
decreases and so, IB , IC and IE. Thus increase in IC has immediately down due to negative feedback, so
as to correct the situation.
Stability factor
R1 R2
Rth = R1 R2 =
R1 + R2
d IB d IB
0= Rth + RE + RE
d IC d IC
0 = RE +
d IB
(Rth + RE )
d IC
d IB − RE 1+
= → ( 2) S= (3)
d I C Rth + RE d IB
1−
d IC
(1 + ) RE 1 + Rth
1+ (1 + )(Rth + RE ) = RE
S = = Take RE outside
1+
RE Rth + RE + RE R
RE 1 + + th
Rth + RE RE
Rth
The above equation shows that S varies between 1 for small values of and (1+β) for larger values of
RE
Rth
. Typical practical value of S = 10 for this type of biasing circuit.
RE
Merits:
Demerits:
➢ If RE is of large value, high VCC is necessary. This increases cost as well as precautions necessary
while handling.
➢ AC as well as DC feedback is caused by RE, which reduces the AC voltage gain of the amplifier.
Usage: The circuit's stability and merits as above make it widely used for linear circuits.
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