SEQUENTIAL CIRCUITS

• NAND Latch
• NOR Latch
• SR, D, JK, T flip flop
Sequential circuits:
■ Outputs are dependent on current inputs and previous outputs.

■ Storage elements : Devices capable of storing binary information

■ Clock Signal: Is a periodic rectangular pulse train or a square wave.
■ Two types of sequential circuits:
– Asynchronous sequential circuits: The output of the logic
circuits can change state at any time when one or more of the
inputs change.
– Synchronous sequential circuits: The exact times at which any
output can change states are determined by a signal called the
clock.
■ Flip Flop:
– Is a binary storage element capable of storing one bit of
information
■ Latch:
– Basic type of flip flop is referred as Latch
 NAND Latch (Active Low latch)
SET RESET Q(t) Q(t+1) Q’(t+1)
SET
0 0 0 1 1
0 0 1 1 1
0 1 0 1 0
0 1 1 1 0
1 0 0 0 1
RESET
1 0 1 0 1
1 1 0 0 1
1 1 1 1 0

SET Function table

NAND
Latch SET RESET Output
RESET
0 0 Indeterminate
0 1 Set
1 0 Reset
1 1 No Change
 NOR Latch (Active high Latch)
SET RESET Q(t) Q(t+1) Q’(t+1)
SET
0 0 0 0 1
0 0 1 1 0
0 1 0 0 1
0 1 1 0 1
1 0 0 1 0
RESET
1 0 1 1 0
1 1 0 0 0
1 1 1 0 0
SET
NOR
Function table
RESET Latch
SET RESET Output
0 0 No Change
0 1 Reset
1 0 Set
1 1 Indeterminate
SR Flip Flop using NAND latch
Function Table Excitation Table
Clk S R Q(t) Q(t+1) SET RESET
Clk S R Output
0 0 0 0 0 1 X
0 X X No Change
0 0 0 1 1 X 1
1 0 0 No Change
0 0 1 0 0 1 X
1 0 1 Reset
0 0 1 1 1 X 1
1 1 0 Set 0 1 0 0 0
1 1 1 Indeterminate 0 1 0 1 1
Equation for SET and RESET 0 1 1 0 0
0 1 1 1 1
1 0 0 0 0 1 X
1 0 0 1 1 X 1
1 0 1 0 0 1 X
1 0 1 1 1 1 0
1 1 0 0 0 0 1
1 1 0 1 1 X 1
1 1 1 0 0 X X
1 1 1 1 1 X X
Circuit:

Clk
SR Flip Flop using NOR latch
Excitation Table
Equation for SET and RESET Clk S R Q(t) Q(t+1) SET RESET
0 0 0 0 0
0 0 0 1 1
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 0
0 1 1 1 1
1 0 0 0 0
1 0 0 1 1
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1
Circuit and Block Diagram
 Characteristic Table Characteristic equation:
S R Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 X
1 1 1 X
D Flip Flop using NAND latch
Excitation Table
Function Table
Clk D Output Clk D Q(t) Q(t+1) SET RESET
0 X No change
0 0 0 0
1 0 0
1 1 1 0 0 1 1

0 1 0 0
Equation for SET and RESET
0 1 1 1

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 1
Circuit and block diagram of D Flip Flop
D Flip Flop using NOR Latch
Excitation Table
Equation for SET and RESET
Clk D Q(t) Q(t+1) SET RESET

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 1
Circuit and block diagram of D Flip Flop
Characteristic equation: Characteristic Table
D Q(t) Q(t+1)
0 0
0 1
1 0
1 1
JK Flip Flop using NAND latch
Function Table Excitation Table
Clk J K Q(t) Q(t+1) SET RESET
Clk J K Output
0 0 0 0
0 X X No Change
0 0 0 1
1 0 0 No Change
0 0 1 0
1 0 1 Reset
0 0 1 1
1 1 0 Set 0 1 0 0
1 1 1 Toggle 0 1 0 1
Equation for SET and RESET 0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Circuit and block diagram of JK flip flop:
JK Flip Flop using NOR latch
Excitation Table
Equation for SET and RESET Clk J K Q(t) Q(t+1) SET RESET
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
Circuit and Block Diagram
 Characteristic Table Characteristic equation:
J K Q(t) Q(t+1)
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
T Flip Flop using NAND latch
Excitation Table
Function Table
Clk T Output Clk T Q(t) Q(t+1) SET RESET
0 X No change
0 0 0
1 0 No Change
1 1 Toggle 0 0 1

0 1 0
Equation for SET and RESET
0 1 1

1 0 0

1 0 1

1 1 0

1 1 1
Circuit and block diagram of T Flip Flop
T Flip Flop using NOR Latch
Excitation Table
Equation for SET and RESET
Clk T Q(t) Q(t+1) SET RESET

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1
Circuit and block diagram of T Flip Flop
Characteristic equation: Characteristic Table
T Q(t) Q(t+1)
0 0
0 1
1 0
1 1