UNIVERSITY OF GONDAR

INSTITUTE OF TECHNOLOGY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

APPLIED ELECRONICS II LABORATORY MANUAL

(Electrical Engineering III ECEg 2242)

PREPARED BY: ASMAMAW MALEDE

MESFIN TEGEGNE
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Table of Contents

Introduction ................................................................................................................................................. 2

1) Electrical Safety Rules and workflow.............................................................................................. 3

2) Electronics material ........................................................................................................................ 6

Experiment 1: differential Operational amplifier .................................................................................. 17

Experiment 2: Inverting and feedback Differential Amplifier ............................................................. 34

Experiment 3:Application op amp ........................................................................................................ 60

Experiment 4:Precision rectifiers (wave shaping) ................................................................................ 81

Experiment 5:Oscillators (OTL) amplifiers ........................................................................................ 146

Experiment 6: Class (switching) amplifier.......................................................................................... 169

References ........................................................................................................................................... 188

Appendix ......................................................................................................................................... 189

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Introduction
1) Electrical Safety and Rules and workflow
 Course objectives and Contents
2) Electronics material
 Master Unit
 Transistor Amplified Experiment Pane/l9
 Function generator
 Oscilloscope
 Digital Multimeter
 Transistor amplifier exp.panel No.9

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1) Electrical Safety Rules and workflow

Electrical Safety

1. Electricity is different from other forms of hazardous energy, because it is both undetectable by human
senses and potentially immediately fatal upon contact.
2. All electrical equipment must be installed and used in accordance with instructions.
3. Equipment shall be approved for use and shall not be modified or used outside of its approval intent.
4. The most fundamental aspect of training is the ability to Test before Touch.
5. Use approved tools, equipment’s and protective device.
6. Do not work under poor light or when you are tired .
7. Do not work a dump area and wet shoes or clothes.
8. Keeps tools equipment’s clean and good working condition.
9. Read all instruction carefully before using appliance .
10. To prevent electrical hazard. Do not immerse appliance water or liquid.
11. Always unplug appliance before cleaning whatever it is not in use.
12. Do not operate any appliance with the a damaged cord or plug.
13. Always use appliance on a dry level surface.
14. Check electrical power supplies from switches position .
15. Approve an Electrically Safe Work Condition and so on.
16. Probably Electrical hazard is will happened on anybody When to give first help care, go to clinical
campus and announce to responsible position.
 Address of clinical campus---058
 Address of electrical & computer engineering department---058
 Address of IOT director ---058
 Address of campus police---058

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Rules

1. Carry our ID card at all times.

2. Set properly you in lab class.
3. Don’t move table, desk , stool or chair.
4. Don’t use without teaching material.
5. Do not eat, drink ,chewing gum or smoke any lab area .
6. Don’t present disruptive behavior or play game.
7. Any one will respect to common lab dripline.
Workflow
1. All allowed experiment material take from shelves and put on the specific place of table.
2. Check functionality use material (apparatus) on lab table in order to safety.
3. In this lab have the materials(apparatus) includes :
 Construction lab board(breadboard)
 Semiconductor module
 Amplifier & Electronics Circuit Application Trainer
 Master Unit
 Transistor amplifier experiment panel (kit)/p9
 Power supply (DC,AC or Function Generator)
 Oscilloscope
 Digital Multimeter(type & in range)
 Resistor (type & in value)
 Capacitor(type & in value)
 Inductor (type & in value)
 Probe, tester & connector cable(types & in size)
4. Design Circuit on breadboard order by flow of figure circuit or assemble with trainer kit without power
sources on.
5. Check design circuit and correct when support by instructor or Academic Assistance.
6. When circuit design (install) are correct then power source on and test (measure) when keeping in safety
principle.
7. We will can record in notebook discuss result and reach to conclusion.
8. When any work finished, we can any power sources off. We can have used apparatus (material) put in or
replace properly & cover it.
9. Finally write lab report and summit.

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Subject code : ECEg 2242

Name :Electrical Engineering Lab III

Course Objectives To conduct experiments on Op-amps, oscillators& timing

& Competences to circuits
be Acquired

Course amplifier; Differential amplifier; Operational amplifier;

Description/Course Oscillators; Basic digital circuits Schmitt trigger,
Contents multivibrators, timers, switching circuits.

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2) Electronics material

Master unit

Master unit is a common base structure of the equipment ordered basically for the subject matter
being experimented upon it has deferent equipment in one board its connect power 230V/240V AC
source back side and switch on when light indicates master unit active in theirs each component
more write on hard show bellow.

fixed analog meter potentiometer speaker

Voltage

Variable ac power o/p

dc power Variable
dc

Mode &range selection BCD to 7

Logic
segment
indicator
display

switc Range
h selector
BNC
adapter Function
generator

Kit p/9

Output:

Fixed power : +5V@1A , ±12V@1mA.

Variable power: 0-15V@100mA, 0-30V@100mA ,15-120v @100mA ,12-0-12V AC @150mA .

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Digital Multimeter

The Ohmmeter: The ohmmeter is a device that when connected across a circuit element, can measure
the resistance of the element. One important rule needs to be remembered: The resistance of an
element can be measured only when the element is disconnected from any other circuit.

The Ammeter: The ammeter is a device that when connected in series with a circuit element, can
measure the current flowing through the element. From two requirements are evident for obtaining a
correct measurement of current: consider the number of electrons passing by a point in a circuit every
second with a steady electric current of 1 amp:

1 amp = 6,250,000,000,000,000,000 electrons per second( 1 amp = 6.25 x 10^ 18 electrons per
second).

1. The ammeter must be placed in series with the element whose current is to be measured.

2. The ammeter should not restrict the flow of current (i.e., cause a voltage drop), or else it will not
be measuring the true current flowing in the circuit. An ideal ammeter has zero internal resistance

The Voltmeter: The voltmeter is a device that can measure the voltage across a circuit element. Since
voltage is the difference in potential between two points in a circuit, the voltmeter needs to be
connected across the element whose voltage we wish to measure. A voltmeter must also fulfill two
requirements:

1. The voltmeter must be placed in parallel with the element whose voltage it is measuring.

2. The voltmeter should draw no current away from the element whose voltage it is measuring, or
else it will not be measuring the true voltage across that element. Thus, an ideal voltmeter has infinite
internal resistance.

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Multimeter frontal panel

1. digital reading
2. Light continuity.
3. off multimeter position
4. Ohmmeter range 0_200Ω, 2kΩ,
20kΩ, 200kΩ, 2MΩ&20MΩ.
5. move arrow switch to select position.
6. Continuity & diode test point.
7. Farad meter range 200µ, 2µ,
200n&20n F
8. Dc current range 2m, 20m,
200m&20A
9. hole to connect 20Ammeter.
10. hole to connect milli ammeter &
capacitor
11. Hole connect common (ground)
&ampere;
12. hole to connect ohm, voltage, diode &
continuity.
13. ac current range 20m,
200m&20A
14. Ac voltage range 2, 20,
200&750v
15. Dc voltage range 0-200m, 2,
20,200&1000v.
16. HFE test .
17. NPN transistor test.
18. PNP transistor test.
19. Multi meter.

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Function generator

A function generator is usually a piece of electronic test equipment or software used to generate
different types of electrical waveforms over a wide range of frequencies. Some of the most common
waveforms produced by the function generator are the sine wave , square wave, triangular wave and
saw tooth shapes when generating power signal it has in to frequency ,amplitude &phase selecting
range at standard. show bellow in figure.

Back
Image

Plug Power

VGA 230V/240V AC
connector
Power switch
ON/OFF
BCN
connecto
r
Front
Frequency
Image
&
amplitude
display range

Power
output

Power output
standing

Adjustments
&range selector

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Oscilloscope Features

DC-40/60MHz, Dual channels/dual traces, X-Y mode 6-inch display, high brightness oscilloscope
tube .High sensitivity of triggering, up to1mV/division CH1channel incremental magnification
function for clearer observation than oscilloscope

TV synchronous separation circuit for displaying stable TV signal

Triggering mode: AUTO/NORM/TV-V/TV-H

Vertical:CH1/CH2/ALT/CHOP/ADD

Fig. 1. 1: Oscilloscope Features

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Table 1. 1 Oscilloscope Features

Specification 17006 17010

6 inch rectangular screen with internal

CRT graticule,8×10div.(1div=1cm)
Vertical deflection
Display mode CH1,CH2,ADD,ALT,CHOP
Deflection factor 5mV/div to 5V/div ±3%,1mV/div ±5%(×5),10steps
Rise time ≤8.8ns ≤5.9ns
Max. Input voltage 250V(DC+AC peak)≤1KHz
Input coupling AC,DC,GND
Polarity selection + or – (CH2 only)
Horizontal deflection
Display mode 1,10,X-Y
Time base 0.2µs/div to 0.2s/div,9 ranges
Sweep magnification ×10
CH1ALTMagnification ×10
Accuracy ±3%
Trigger System
Trigger mode NORM,AUTO,TV-V,TV-H
Trigger source CH1,CH2,VERT,LINE,EXT
Sensitivity and 20Hz~60MHz 20Hz-60MHz
AUTO,
Frequency NORM 1.5div(INT),0.8Vp-p
TV-V,TV-
H At least 1div or 1Vp-p
Input impedance 1Mhz
X-Y Operation
X-Y Phase difference ≤30, DC-50KHz
Others
Calibration waveform Frequency:1KHz±20%,Voltage:0.5±10%
Power supply 220V/110V ±10%,50/60Hz
Dimensions 310(W)×130(H)×370(D)mm
Weight 9Kg

Detail expressing in index

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Operational Amplifiers trainer and Amplifier &Electronics Circuit Application Trainer

model.17155

There are many different types of oscillators that can be created with op amps and Amplifier &Electronics
Circuit Application Trainer has been designed specifically for the study Electronic Components. It
contains a wide selection of amplifier and electronics components and A.C. & D.C. Power Supplies.
Experiments have been described yet other circuits as per group requirements can also be designed using
the available components and power supplies.
Features:
1. It has Fixed and variable Power Supply
2. 1Hz-1 kHz Sine wave source with variable output level.
3. LEDs for visual indication of Input & Output status.
4. Diodes,IC’insertboard,logicswitch,FET,UJT,Transistors,resistors,capacitors,potentiometer.

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Fig. Operational Amplifiers trainer and Amplifier &Electronics Circuit Application Trainer
model.17155

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Operation amplifier Circuit Test Panel / 16 (Kit p.16)

The Operation Circuit experiment Panel /16 is connect to the master unit .maximum power
requirement Power supplies has ±12v fixed, 500mA ,common ground, internally connected to the op
amp means op amp(741) pin-7 is connected from kit /16 pin_1 with +12 volts (+ vcc), pin-4 is
connected from Kit / 16 pin_3 or 88 with-12v volt power (-vcc) and input (pin_2 and_3) variable
power range will gets 0-12v.

Fig. Amplifier kit (panel /16) circuit diagram

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IC 741 op amp

(a) (b)

Fig. 1. 2: symbol and integrate circuit 741 op amp

It comprises of eight pins where the function of each pin is discussed below.

Pin-1 is offset null.

Pin-2 is Inverting (-) i/p terminal.

Pin-3 is a non-inverting (+) i/p terminal.

Pin-4 is -12V voltage supply (-VCC)

Pin-5 is offset null.

Pin-6 is the o/p voltage.

Pin-7 is +12v voltage supply (+VCC)

Pin-8 is not connected.

Fig. (c) integrate circuit Pin

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Transistor amplifier exp.panel No.9

The Operation Circuit experiment Panel /9 is connect to the master unit .maximum power requirement
Power supplies has ±12v fixed, 500mA ,common ground, internally connected to the op amp means op
amp(741) pin-7 is connected from kit /9 pin_1 with +12 volts (+ vcc), pin-4 is connected from Kit / 9
pin_3 or 88 with-12v volt power (-vcc) and input (pin_2 and_3) variable power range will gets 0-12v.

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Experiment 1: differential Operational amplifier

1.1 differential Operational amplifier (op amp) circuit & its Characteristics

Theory: The output of the op amp will do whatever is necessary to make the input differential
between the two input terminals exactly zero, and that the input terminals draw no current. But In
practice, available Op-Amps have some of near characteristic as mentioned above. It is necessary to
know the practical Op-Amplifier characteristics
vo  AVi  A(V 2  V1) .

Objective: To construct the differential operational Amplifier .

Material and equipment Quantity

1. Master unit panel ………………………………………….1

2. kit P/16 …………………………………………………...1
3. Variable voltage source 0-15v …………………………….2
4. wiring cable …………………………………………needed
5. Multimeter ………………………………………………...1
6. Dual Constant Power supply ±12V(or on master unit) ......1
7. Function Generator (on master unit)……………………....1
8. Cathode Ray Oscilloscope(CRO) Dual T……………….....1

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Procedure:

1. Construct the circuit as shown below.

Fig. 741 op amp pin connection (wiring)

2. Master unit output voltage (-5v) connect in to kit/16 pin8, master unit output voltage (+5v) connect
in to kit/16 pin19, master unit output voltage (-12v) connect in to kit/16 pin1, master unit output
voltage (+12v) connect in to kit/16 pin3, output voltage(vout) connect in to kit/16 pin48 and any ground
connect in to kit/16 pin2.
3. Repeat input voltage v1 varies from 0v-15v and measure out voltage .
4. Repeat (2) remove variable voltage and kit/16 pin8 shunt in to pin48 and show voltage gain.
Result:
Calculate open loop Gain (A).
Measure output voltage.
Voltage gain ratio output/input voltage.
Compare in put & output voltage in ideal op amp.

Conclusion :………...…………………………………………….?

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1.2 Voltage Gain infinite (Open loop)

Theory: open loop gain is used to for the purposes of negative feedback. Negative feedback is when
the output signal is feed back to the input terminals and the gain of the op amp can be controlled.
Negative feedback also creates a more customizable frequency response for the desired amplifier. In
turn there is also an increase in the input impedance of the amplifier is negative feedback is used.

Objective: To construct the open loop Voltage Gain is infinite.

Procedure:

1. Construct the circuit as shown below.

Fig.1.2. 1 Open loop gain

2. master unit output voltage (-12v) connect in to kit/16 pin1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2 ,FG(Sine/Triang O/P) connect in to kit/16
pin17, kit/16 pin4 connect in to pin 65, kit/16 pin42 connect in to pin 66, CRO(L/P)connect in to pin
48, FG(GND)_CRO(GND) connect in to pin 67,34 connect in to pin 36,35 connect in to pin
38,37connect in to pin 68 .

3. Connect CRO at the output)p. Amp to observe output. Apply input signal (1KHZ ). Such that output
voltage Using should be ±10 (total 20V pk to pk without distortion) for I/p in mV.
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4. Vary the frequency from 100Hz to 10KHz and note the effect of the i/p frequency on the open loop
gain.(As i/p frequency increases open loop gain reduces)

Table 1. 2 Open loop gain Observations

NO. Frequency V in (mVpp) V out(mVpp) Gain(Av)

1 100Hz

2 274Hz

3 500Hz

4 1K

5 1.5K

6 5K

7 7K

8 10K

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Calculate Voltage gain Av  Vout

Vin

Conclusion:

Output is leaning toward either supply, (i.e. Showing’ then reduce the input voltage.

By using offset null pot of 10k, remove the saturation of op similarly since i/p is very low and it is
open loop gain some time o/p is superimposed on the 50 Hz signal. In this case, measure the i/p signals
not the 50hz. Ideally, open loop gain is infinite but practically Open circuit voltage gain of op amp is
high not infinite.

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1.3 Voltage Gain (close loop)

Theory: In a closed loop op-amp circuit the output pin of the op-amp is connected with the either of
the input pin to provide a feedback. This feedback is called as the closed loop connection. During
closed loop an Op-amp works as an amplifier, it is during this mode an op-amp finds many useful
applications like buffer, voltage follower, Inverting Amplifier, Non-Inverting amplifier, Summing
amplifier, Differential amplifier, Voltage sub tractor etc.

Closed loop gain is the gain that results when we apply negative feedback to "time" the open loop
gain when the closed-loop gain of op-amp is calculated by the ratio of Vout/Vin.

Objective: Measure the closed-loop voltage gain and compare with the calculated value.

Procedure:

1. Construct the circuit as shown below.

Fig.1.3. 1 Close loop gain

2. master unit output voltage (-12v) connect in to kit/16 pin1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG(Sine /Triang. O/P) connect in to pin 18,
pin4 connect in to pin 65, pin 8 connect in to pin 43,pin 48 connect in to pin28,pin 29 connect in to

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pin 66, CRO CHI (I/P) connect in to pin 15.CRO(GND) connect in to pin67,CROCG2(I/P) connect
in to pin 17,CRO(GND) connect in to pin 67.
RF
Result: Vo = (1 + )*Vin . (Whatever I/P (E.g. 1Khz-1Vpp) you will give o/p the twice i/p)
R

1k
Vo= (1 + 1K)*1V==2V.

Gain =Vo/Vin=2.

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1.3 Input & output Impedance (by half deflection method)

Theory: Potentiometer useful to measure voltages in the micro-volt and milli-volt range. Equivalent
to a balance scale, it balances an unknown input voltage against a known internal voltage. A simple
potentiometer circuit is derived from the voltage divider circuit.

Objective: to determine the Voltage Gain (close loop) input &output resistance of a potentiometer
by half deflection method.

Procedure:

a) Input Impedance (by half deflection method)

1. Construct to the circuit as shown below.

Fig.1.3. 2 an input Impedance

Pi=1MΩ(use from Laboratory, stock)

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, EXT Potentiometer(VAR)_FG(Sine /Triang
O/P), FG(GND) connect in to kit/16 pin65, EXT Potentiometer (FIX connect in to kit/16 pin)19, pin
8 connect in to kit/16 pin 48, VM(-1-) connect in to kit/16 pin 48 ,VM(-)connect in to kit/16 pin 67.

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3. Apply input sine wave with a 1KHz, 10Vpp frequency and amplitude, directly to the non-inverting
input of op amp and measure the output voltage.

4. add potentiometer, Pi, in series with the input as shown, Adjust the potentiometer such that the output
voltage is reduced to half.

5. Remove the potentiometer from the circuit and measure it. This is a input impedance.

Result: Measurement Input impedance.

I/P voltage, =…....v

O/P voltage when 1MΩ resistance shorted, Vo(SC) ............V.

I/P impedance measured by half deflection method, Rin =...Ω

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b) Output Impedance (by half deflection method)

1. Construct the circuit as shown below.

Fig.1.3. 3 b Output Impedance

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,FG(Sine /Triang o/p) ) connect in to kit/16 pin
l9, FG(GND)connect in to kit/16 pin 65, 42 connect in to kit/16 pin _8, 48connect in to kit/16 pin 36,
38 connect in to kit/16 pin _66, VM(+) connect in to kit/16 pin 51,VM(-)connect in to kit/16 pin 67,
37connect in to kit/16 pin 38.

3. Apply 1 KHz, l0Vpp sine wave signal an measure the output voltage.

4. Connect the 10K potentiometer, and adjust it so that the output drops to half of its previous value.

5. Disconnect the potentiometer from the circuit and measure it.

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Result:

Measurement Input impedance.

Output impedance measurement.

Open circuit output voltage Vo= …V.

Output impedance measure by half deflection method Ro= ….Ω.

Conclusion:

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1.4 Input Offset Voltage and current

a) Input Offset voltage:

1. Construct the circuit as shown below.

Fig.1.4. 1 Input Offset Voltage

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,15V(V) connect in to kit/16 pin4,
outV(V)connect in to kit/16 pin 17,15V(COM) connect in to kit/16 pin -30V(COM) connect in to
kit/16 pin -65, VM(+)-4 connect in to kit/16 pin 8, VM(-)connect in to kit/16 pin -66, pin 8 connect
in to kit/16 pin -42.

3. Input offset voltage is the voltage required between two input terminals of Op-Amp. To get zero
output voltage.

4. Switch on the power supply. Apply voltages to both the input terminals as shown in diagram above.

5. Adjust voltages such that output on voltmeter should read zero. Note down the input voltages when
output is zero.

6. Find out the difference between two input voltages. This voltage difference is the input offset voltage
of Op-Amp.

7. Write lab report.

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b) Input bias current & offset current

Vn Vo
Iin = Rn = l 1 *Rn. When Rn = 1K, Vn = voltage across Rn (when A- B short)

In = -- (measured)

In & If, input bias current Iin can be calculated as

(in + If)
Iinb = (Input Bias current) (By definition)
2

Vf
If = Rf Where Rf = I K, Vf = voltage across Rr (when C — D short)

Input offset current can be found from above circuit, by removing both the shorting across Rf & Rn.
Output voltage equals to

Vout= [(In-If)*Rn] xl1

As offset current = Iio = In - If

Vout
Iio = *Rn (Input Bias current)
1l

Where Rn = 1K, Vout is measured at OP In & If calculated as above,

Iio = In-If (By definition)

Vout
Iio = (measured)
Rn

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1. Input Bias Current can be measured using the circuit as shown in fig.

Fig.1.4. 2 Input bias current

2. Connect master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v)
connect in to kit/16 pin3, any ground connect in to kit/16 pin2,pin 30connect in to kit/16 pin 51, pin
29 connect in to kit/16 pin 36, pin 38 connect in to kit/16 pin 32, 18- connect in to kit/16 pin 66, VM
(+)-connect in to kit/16 pin 32, VM (-)connect in to kit/16 pin -65, 11connect in to kit/16 pin 5, pin
18 connect in to kit/16 pin 22, pin 28 connect in to kit/16 pin 67, pin 4 connect in to kit/16 pin 32.

3. Adjust the O/P of Op amp to zero by Offset null adjustment procedure by referring procedure of
experiment.

4. Determine Short the terminals A-B & C-D measure the voltage at o/p.

5. Remove shorting of the terminals C-D, this removes shorting across Rn voltage across Rn equals to
the product of In & Rn.

6. If Rn high enough (100K - 1MΩ), voltage can be easily measured with it meter. Since op amp panel
has no 1M Ω resistance, let us use other op amplify the voltage by gain of 11 Always measure at the
O/p of 2nd op amp, divide by 11 to arrive O/p 1st’ of op amp.

Conclusion: Input off set voltage is very low

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1.5 Open Loop Bandwidth (Frequency response)

Theory: Real Op-amp does not have constant open loop gain over all the frequencies, but it varies as
the frequency of operation changes. Amplifier response is mainly governed by the rate of change of
input signal applied to it. Bandwidth of the op-amp is usually specified in-terms of gain bandwidth
product or unity gain small signal bandwidth.

Objective: check Open Loop Bandwidth.

Procedure:

1. Construct the circuit as shown below.

Fig.1.5. 1 Open Loop Bandwidth

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG (Sine-wave) connect in to kit/16 pin 9, FG
(GND) connect in to kit/16 pin 66,pin 4 connect in to kit/16 pin 6,pin 4 connect in to kit/16 pin 65,pin
25 connect in to kit/16 pin 22, pin 17 connect in to kit/16 pin 20, pin 17connect in to kit/16 pin 65,pin
23 connect in to kit/16 pin 37, pin 36 connect in to kit/16 pin 1,pin 38 connect in to kit/16 pin 68,
CRO (IP) connect in to kit/16 pin 48, CRO (GND) connect in to kit/16 pin 67.

3. The 100K resistor is Connected to Non-inverting terminal of IC 741 is not available on Panel. Hence,
there is a need to redesign this panel by replacing R6 resistor of I K between socket no. 24 and 25 by
a 100K resistor.

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4. Rotate the 10K POT Smoothly for better observation of output waveform to its actual Sine wave, If
in case Output will saturate then rotate the POT in opposite direction slightly.

5. Please be very careful while rotating the POT, because this pot is useful for DC balancing (i.e. for
offset correction) of observed voltage and this offset correction is applied (Non inverting terminal of
IC 741,

Result:

Table 1. 3 Open Loop Bandwidth Observations

Sr. Freq.(hz) I/p vp-p(v) O/p vpp(v) Gain= Gain*201 Gain(db)

no. vo
vi
1 50 100m
2 70 100m
3 100 100m
4 150 100m
5 200 0.4
6 500 0.4
7 1k 0.4
8 5k 0.4
9 10k 0.4
10 50k 0.4
11 100k 0.4
12 1m 1
13 2m 1
The input at pin-2 of op-amp (Vin2) (Vin) * (5002)/ (l00K2) + (500Ω)

Vin2 = (Vin) * (4.974 mV) ,Vin/vin2=20l.

calculating the gain of only op-amp we have to multiply 201 to each gain of circuit at every frequency
calculations as shown in above table?

Conclusion: The frequency response of Op-amp is showing high voltage gain at low frequency but
when frequency increasing slowly to some MHz range, the gain decreasing to unity in dB range.

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1.6 Common Mode Rejection Ratio (CMRR)

1. Theory: CMRR is generally a ratio of differential voltage gain to the common mode voltage gain.
Differential voltage gain is same as calculated voltage gain (procedure part 1 at open loop). Now,
how to find common mode voltage gain, for this construct the circuit as shown below. A = V out
/Vin. Hence, Calculate Av, CMRR =Av/A (Av Calculated in experiment open loop 1)

Objective: check Common Mode Rejection Ratio

Procedure:

2. Construct the circuit as shown below.

Fig.1.6. 1 Common Mode Rejection Ratio

3. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,8-19, 15V(V)- connect in to kit/16 pin 22,
15V(COM)connect in to kit/16 pin 65, VM(+)connect in to kit/16 pin 48, VM(-)connect in to kit/16
pin 66.

4. Apply input voltage of +10V and observe output voltage on voltmeter. Record output voltage.
Calculate common mode voltage gain,

Result :

1) CMRR is also high.

2) Open circuit voltage gain of Op-Amp is high.
3) I/P offset voltage is very low.
4) The frequency response of Op-amp is showing high voltage gain at low frequency but when frequency
increasing slowly to some MHz range, the gain decreasing to unity in dB range.

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Experiment 2: Inverting and feedback Differential Amplifier

Theory: An operational amplifier is an integrated circuit that can amplify weak electric signals.
An operational amplifier has two input pins and one output pin. Its basic role is to amplify and output
the voltage difference between the two input pins.

Objective:
 To identify various op-amp circuit .
 To describe the performance of op-amp common circuit .
 Op-amp used as an instrumentation amplifier.

2.1 Inverting Amplifier

Theory: Negative Feedback is the process of “feeding back” a fraction of the output signal back to
the input, but to make the feedback negative, we must feed it back to the negative or “inverting input”
terminal of the op-amp using an external Feedback Resistor called Rf.

An inverting amplifier circuit, the operational amplifier inverting input receives feedback from the
output of the amplifier ,the voltage at the inverting terminal is equal to non-inverting terminal. The
non-inverting input of the operational amplifier is connected to ground. As the gain of the op amp
itself is very high and the output from the amplifier is a matter of only a few volts, this means that the
difference between the two input terminals is exceedingly small and can be ignored..

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a) Inverting DC Amplifier

Objective: to construct circuit and show inverting amplifier .

Material And Equipment Quantity

1. Master unit panel 1

2. kit P/16 1
3. Variable voltage source 0-15v 1
4. wiring cable needed
5. CRO(cathode ray oscilloscope 17010) 1
6. Multi meter 1
7. Feedback resistor Rf=4.7k Ω and 1kΩ 2
8. Constant Power supply ±12V(or on master unit) 1
9. Function generator(or on master unit ) 1
Procedure:
1. construct to the following circuit diagram below.

Fig.2.1. 1 a Inverting Amplifier (DC)

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 15V (+)connect in to kit/16 pin -6,15V (COM)

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connect in to kit/16 pin 18, 8 connect in to 42, (or 8-44), 48 connect in to VM (+) VM (-)connect in
to 67, 17 connect in to 65.
3. Connect dual out supply to panel (±12v).
4. Switch on power supply and adjust input voltage.
5. Observe the output on multimeter the polarities of input and output voltage carefully.
6. Repeat the above procedure with feedback resistance of 4.7 K in place of J K.
7. Connect function generator output to the input of amplifier (lVpp Sine wave/1KJ) and observe both
inputs, Output waveform on dual trace CRO.
8. Draw the waveforms.

Table 2.1. 1 Inverting Amplifier (DC) Observations

I/P VOLT O/P VOLT ,RF=1KΩ O/PVOLT,RF=4.7KΩ
0
+0.5
+1.0
+1.5
+2.0
+2.5
+3.0

Calculate Gain =Vout/Vin and Verify, Gain =-Rf/Ri

Conclusion:

1) Input voltage (AC or DC) is inverted at the output.

2) Gain of the amplifier depends on feedback resistance divided by input resistance in series with signal.

3) Can be used as multiplication / Division by Constant and constant can be manipulated by ratio of
RF/Rj.

4) Inverting Amplifier changes sign of I/P quantity and its amplitude can be controlled by feedback
resistance.

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b) Inverting AC Amplifier

Objective: to construct circuit & test AC coupled Inverting amplifier circuit.

Material And Equipment Quantity

1. Master unit panel 1

2. kit P/16 1
3. Variable voltage source 0-15v 1
4. wiring cable needed
5. CRO(cathode ray oscilloscope 17010) 1
6. Multimeter 1
7. Feedback resistor 100kΩ 1
8. Constant Power supply ±12V(or on master unit) 1
9. Function generator (or on master unit) 1

Procedure:

1. Study the circuit diagram shown below

Fig.2.1. 2 Inverting Amplify (AC)

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,FG(O/P)connect in to 26, 25 connect in to 6,

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49 connect in to 11, 47 connect in to 67,CRO(I/P) connect in to 56, CRO (GND) connect in to

66,FG(GND) connect in to 65, 19 connect in to 67.

3. For an AC-coupled inverting amplifier, the lower -3 dB point set by the combination of R2 & input
capacitor Cl.

4. Capacitor C5 is used to provide AC coup1ing at the output.

5. C1 and C3 are coupling capacitor locking and dc component like offsetting in FG etc if present. Vo=-
AVin sign indicates that o/p voltage is out of phase write input by 180 degree or it of opposite polarity.

6. Connect a sine signal of l00mVpp 1KHz at the I/P of amplifier from function generator.

7. Observe i/P & o/p (Amplitude) Vary the I/P frequency keeping Constant amplitude l00m Vpp) &
note down the corresponding o/P voltage in table to determine the bandwidth of circuit.

Result: Table 2.1. 2 Inverting Amplifier (AC) Observations

I/P-100mVPP frequency O/P (Vp-p)

10Hz

100Hz

500Hz

1KHz

3KHz

5KHz

7KHz

9KHz

10KHz

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Frequency is set by the equation.

F= 1000000/2πR2C3 . F is the lower -3 dB point in hertz (Hz) .

Conclusion :

1) Due to AC coupling, DC component of any I/P signal and O/P has no effect.

2) Write lab report conclusion.

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2.2 Non-Inverting Amplifier

Theory: A non-inverting amplifier is one in which the output is in phase with respect to the input.
The feedback is applied at the inverting input. However, the input is now applied at the non-inverting
input. The output is a non-Inverted (in terms of phase) amplified version of input. The gain of the
non-inverting amplifier circuit for the operational amplifier is easy to determine. The calculation
hinges around the fact that the voltage at both inputs is the same. This arises from the fact that the
gain of the amplifier is exceedingly high. If the output of the circuit remains within the supply rails
of the amplifier, then the output voltage divided by the gain means that there is virtually no difference
between the two inputs.

a) DC-Inverting Amplifier

Objective: To construct and test non-inverting amplifier circuit.

Material and equipment quantity

1. Kit P/16 1
2. Master unit panel 1
3. Variable voltage source 0-15v 1
4. Wiring cable needed
5. CRO(cathode ray oscilloscope 17010) 1
6. Multimeter 1
7. Feedback resistor Rf=4.7k Ω and 1kΩ 2
8. Constant Power supply ±12V(or on master unit) 1

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Procedure:

1. Study the circuit diagram of DC Non-Inverting amplifier shown below

Fig.2.2. 1 a non-Inverter Amplifier (DC)

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,15V(COM)-6,15V(V) connect in to 17, 8
connect in to 42 or (8-44), 48connect in to VM(+), VM(-)connect in to 66, 7connect in to 65

3. The power supply +/- 12V connections are internally wired needing no external connection at Socket
1, 2, 3.

4. Connect the set up as shown in the circuit diagram. Connect dual power supply (±12V) to Panel.
Switch it on.

5. Adjust input voltage as shown in table below and observe the output on voltmeter.

6. Observe the polarities of input and output voltage.

7. Repeat the above procedure with feedback resistance of 4.7 K in place of 1 K.

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Table 2.2. 1 a non-Inverting Amplifier (DC) Observations

I/P VOLT O/P VOLT O/P VOLT
RF=1KΩ RF=4.7KΩ
0
+0.5
+1.0
+1.5
+2.0
+2.5
+3.0
Vout
Calculate Gain A  . Connect function generator output to the input of amplifier (lVpp Sine
Vin
wave/1KJ) and observe both inputs, Output waveform on dual trace CRO.

Conclusion:

1) Draw the waveforms.

2) Input voltage (AC or DC) is no inverted at the output.

3) Gain of the amplifier depends on feedback resistance divided by input resistance in series with signal.

4) Can be used as multiplication / Division by Constant and constant can be manipulated by ratio of
RF/Rin

5) Feedback resistance can control inverting Amplifier changes sign of I /P quantity and its amplitude.

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b) Non-inverting AC Amplifier

Objective: to construct AC coupled non-Inverting amplifier circuit.

Material and equipment quantity

1. Master unit panel 1

2. kit P/16 1
3. Variable voltage source 0-15v 1
4. wiring cable needed
5. CRO(cathode ray oscilloscope 17010) 1
6. Multimeter 1
7. Feedback resistor 100kΩ 1
8. Constant Power supply ±12V(or on master unit) 1
9. Function generator(or on master unit ) 1

procedure :

1. Study the circuit diagram shown below.

Fig.2.2. 2 b non-Inverter Amplifier (AC)

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2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG(Õ/P)connect in to 26, 25 connect in to 22,
4connect in to 65,49 connect in to 8,(GND) connect in to 67,CRO(i/P) connect in to 48, 20 connect
in to 66, CRO (GND) connect in to 65.

3. The power supply +/-12V connections are internally wired needing normal connection at socket 1,
2, 3.

4. For an AC-coupled inverting amplifier, the lower -3 dB point set by the combination of R2 & input
capacitor Cl.

5. Capacitor C5 is used to provide AC coup1ing at the output.

6. C1 and C3 are coupling capacitor locking and dc component like offsetting in FG etc. if present. V0=
- AVin sign indicates that O/p voltage is out of phase write input by 180 degree or it of opposite
polarity.

7. Connect a sine signal of l00mVpp 1KHz at the I/P of amplifier from function generator.

8. Observe i/P & o/p (Amplitude) Vary the I/P frequency keeping Constant amplitude l00m Vpp) &
note down the corresponding O/P voltage in table to determine the bandwidth of circuit.

9. By connecting Capacitor C3 at the 1/P (in series), the same circuit can be tested as AC coupled
amplifier. When the variable gain is set to unity (Rf= R13=100kΩ) it works as an AC voltage
follower.

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Result: Table 2.2. 2 b none inverting Amplifier (AC) Observations

I/P- O/P
100mVPP (Vp-p)
frequency

10Hz

100Hz

500Hz

1KHz

2KHz

3KHz

4KHz

5KHz

6KHz

7KHz

8KHz

9KHz

10KHz

1
F .
2 R 2C 3

Frequency is set by the equation.

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F= 1,000,000/2πR2C3. F is the lower -3 dB point in hertz (Hz).

Conclusion

1) Due to AC coupling, DC component of any I/P signal and O/P has no effect .

2) Write lab report.

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2.3 current &voltage feedback Amplifier

a) Current series feedback amplifier

Theory : Circuit employs resistance in the emitter. When collector current flows, voltage develops
across resistance RE (as IE =Ic). Thus, voltage across RE due to collector current of—ve feedback to
the input side. As collector current increases, more will be the voltage across.

This feedback will be equally effective for DC as well as AC currents. If this RE is connected across
by a capacitor (by pass capacitor), capacitor of low resistance to AC signals or current but remains
unaffected for DC.

1. Gain =V out (pp) / V in (pp)

2. Vrms= Vopp/2sqr2, Where Vopp=peak-to-peak voltage across RL as seen on CRO.

3. Vou= (G*Vin Zin)/ (Zin+RG), Where Zin is input impedance Zin + Rg ,Rg input impedance

4. Vout = (RL * Vg)/(Zout +RL), where Zout is output impedance, Vg is Voltage at no load.

Objective: To test and observe working of Current series feedback amplifier on complete this unit
you able to express the effect of series feedback on input impedances output impedance and the
bandwidth of an amplifier. The most Requites class A amplifier is nothing but current series negative
Feedback amplifier.

Procedure:

1. Identify current feedback amplifier circuit on Panel No. P9.ake all connections as shown below.

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Fig.2.3. 1 a Current series feedback amplifier.

2. 15v (+) connect in to 10,15V (COM)connect in to 11, FG(I/P)connect in to 12, FG(GND)connect in
to 13, CRO (I/P) connect in to 16, CRO (GND) connect in to 15,19connect in to 17.

3. Connect input signal of 1KHz. 25mVpp and adjust level to get maximum output without clipping.

4. Measure and record input and output voltage observe and draw input and output waveform on dual
trace CRO simultaneously observe phase difference.

Table 2.3. 1 an Observation table

In put impendence
NO. Vout connected O/P voltage 47Ω
series
1 ……………………. ,…………..
OUT put impendence
NO. O/P at no load O/P at 1kΩ load
2 ……………………….. ………….

5. Frequency Vs Output voltage ,Keeping amplitude of FG constant at 2.5Vpp vary its frequency in
audio range and note down Vopp in another table and determine 3db bandwidth Definition of 3 db
BW =Difference in two frequencies where o/P drops to 0.707 of Vopp (Max).

Result: Table 2.3. 2 current series feedback amplifier

Frequency Vout(V)
(Hz)

1k

10k

40k

45k

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80k

100k

120k

Conclusion : From the graph find out following 3 db Bandwidth F2-F

1) Bandwidth improves with—ve current feedback as compared to without feedback.

2) Negative feedback amplifier improves input impedance and reduces output impedance. However,
Feedback reduces.

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b) Voltage Series feedback amplifier (Darlington transistor amplifier)

Theory: Series feedback connect ion lend to increase the input impedance of the amplifier and
to decrease output impedance both of these are provided by using series voltage feedback Connection

The Output of amplifier is available across the load resistance Rl. The Output is feedback to input so
the effective input voltage is therefore reduced It reduces the gain but reduces distortion and noise.
V out (pp)
1. Gain = V in (pp)

2. Vrms= Vopp/2sqr2, Where Vopp=peak-to-peak voltage across RL as seen on CRO.

3. Vou= (G*Vin Zin)/ (Zin+RG), Where Zin is input impedance Zin + Rg Rg input impedance

4. Vout = (RL * Vg)/ (Zout +RL), where Zout is output impedance, Vg is Voltage at no load.

Objective : To test and observe working of Voltage series feedback amplifier

To express the effect of series feedback on input impedance output impedance and
the bandwidth of an amplifier.

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Procedure:

1. Identify current feedback amplifier circuit on Panel No, P9.Make connections as shown

Fig.2.3. 2 b Voltage Series feedback amplifier.

2. l5V(+)connect in to 10,15V(Com) connect in to 11, FG(I/P)connect in to 12, FG(GND)connect in to
13,CRO(O/P)connect in to 14,CRO(GND)connect in to 15. 19 connect in to 17.

3. Apply 8volts as Vcc. Connect input signal of 1KHz. 50mVpp and adjust level to get maximum output
without clipping.

4. Measure and record input and output voltage observe and draw input and output waveform on dua l
trace CRO simultaneously observe phase difference.

5. Applies DC variable supply maximum @15V and resistor RE is open switch S1 or OUTPUT
voltage is half wave .

6. DC variable supply minimum @0V or resistor RE is closed switch S1 and increase value of RE,
OUTPUT voltage is series or lined .

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Result:

Table 2.3. 3 b Observation table

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i/p impendence
No. o/p voltage i/p direct o/p voltage 47Ω
connected series connected
within put
1 ………………….. ………………..
O/p impendence
No. O/P at no load O/P at 1KΩ load
2 ………………. ……………….
Frequency Vs Output voltage, Keeping amplitude of FG constant at 2.5Vpp vary its frequency in
audio range and note down Vopp in another table and determine 3db bandwidth Definition of 3 db
BW= Difference in two frequencies where o/P drops to 0.707 of Vopp (Max).
Table 2.3. 4 Table Voltage series feedback amplifier

Frequency(Hz) Vout(V)

1k

10k

40k

45k

80k

100k

120k

From the graph find out following 3db Bandwidth = F2-F1

Conclusion:

1) Bandwidth improves with negative voltage feedback as compared to without feedback.

2) Negative feedback amplifier improves input impedance and reduces output impedance. But feedback
reduces gain.

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c) Current Shunt feedback amplifier

Theory: The circuit of Current shunt feedback amplifier shows two transistors in cascade (DC
coupled) with feedback from the second emitter to the first base through the 10K resister. This
connection produces negative feedback. The voltage Vi2 is much larger than Vu because of the
voltage gain Vi2 is 180̊ out of phase with Vi1. Because of emitter follower action, V2 is only slightly
smaller than Vi2, and these voltages are ¡n phase. Hence Vi2 is larger in magnitude than Vii and is
1800 out of phase with V. if the input signal increases so that Is’ increases, If also increases, and Ii=Is-
If is smaller than it would be if there were no feedback. To test and observe working of current shunt
feedback amplifier. On completion of this unit, you able to express the effect of shunt feedback on
input impedance, output impedance and the bandwidth of an amplifier

Procedure:

1. Identify current feedback amplifier circuit on Panel No. P9. Make all connections as Shown below.

2. Observe two positions of patch cords; Dark represents current shunt type feedback.

Fig.2.3. 3 c current Shunt feedback amplifier

3. 15v(+)connect in to1,15V(COM) connect in to 2, FO(VP) connect in to 3, FG(GND) connect in to
4,6 connect in to 7,CRO(I/p)connect in to 5, CRO(GND) connect in to 4.
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4. Apply 8volts as Vcc. Connect in put signal of 1KHz, 50mVpp and adjust level to get maximum output
without clipping.

5. Measure and record input and output voltage observe and draw input and output waveform on dual
trace CRO simultaneously observe phase difference. Take the reading as shown in the table given
below & Calculate Zi, Zo & gain.

Result:

Table 2.3. 5 current shunt Observation

i/p impendence
No. o/p voltage i/p direct o/p voltage 47Ω series
connected connected within put
1 …………………. ……………..
O/p impendence
No. O/P at no load O/P at 1KΩ load
2 ………………………. …………………

Frequency Vs Output voltage, Keeping amplitude of FG constant at 2.5Vpp its frequency in audio
range and note down Vopp in another table and determine 3db bandwidth Definition of 3 db BW
=Difference in two frequencies where o/P drops to 0.707 of Vopp (Max)

Table 2.3. 6 c current shunt feedback amplifier

Frequency (Hz) Vout (V)
1k
10k
40k
45k
80k
100k
120k

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Conclusion:

1) Bandwidth improves with current series feedback amplifier and output Impedance output impedance
decrease as compare with current series feedback amplifier.

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d) Voltage shunt feedback amplifier

Theory: The circuit of Voltage shunt feedback amplifier shows two transistors in cascade
with feedback from collector to base through the 10 K resister .The feedback current is proportional
to the O/P Voltage; this circuit is an example of voltage shunt feedback amplifier. First, we show that
this configuration confirms to voltage shunt topology, and then obtain approximate expression for
Tran’s resistance and the voltage gain without feedback. In the circuit, the O/p voltage Vo is much
greater than input voltage Vi. If (Vi-Vo)/R= - Vo/P. Where, B= -1/R.

Since the feedback current is proportional to the output voltage. This circuit is an example of a voltage
shunt feedback amplifier.

Objective: To test and observe working of voltage shunt feedback amplifier able to express
the effect of shunt feedback on input impedance, output impedance and the bandwidth of an amplifier.

Procedure:

1. Identify voltage feedback amplifier circuit on Panel No. P9. Make all connections as shown below,
Observe two positions of patch cords; Dark represents voltage shunt type feedback.

Fig.2.3. 4 d Voltage shunt feedback amplifier

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2. 15v(+)connect in to 1, 15V(COM)connect in to 2 , FG (I/P)connect in to 3, FG(GND)connect in to 4,

7connect in to 8 , CRO(I/P) connect in to 5 , CRO(GND) connect in to 4.

3. Apply 8 volts as Vcc. Connect input signal of 1 KHz, 25mVpp and adjust level to get maximum
output without clipping.

4. Measure and record input and output voltage observe and draw input and output waveform on dual
trace CRO simultaneously observe phase difference. Take the reading as shown in the table given
below & Calculate Zi, Zo & Gain.

Result: Table 2.3. 7 d Observation

I/p impendence
No. o/p voltage i/p direct connected o/p voltage 47Ω series connected within put

1 …………………. ………………….
O/p impendence
No. O/P at no load O/P at 1KΩ load
2 …………….. ………………………..
5. Frequency Vs Output voltage, Keeping amplitude of FG constant at 25mVpp vary its frequency in
audio range and note down Vopp in another table and determine 3db bandwidth Definition of 3 db
BW =Difference ¡n two frequencies who O/P drops to 0.707 of Vopp (Max).

Table 2.3. 8 voltage shunt feedback amplifier

Frequency(Hz) Vou(V)
1k
10k
40k
45k
80k
100k
120k

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From the graph find out following 3 db Bandwidth =F2-Fl.

1) Bandwidth improves in voltage shunt feedback amplifier and output impedance decreases and input
impedance increases.

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Experiment 3:Application op amp

3.1 Summing/ summer Amplifier

Theory: Summing amplifier is basically an op amp circuit that can combine numbers of input signal
to a single output that is the weighted sum of the applied inputs ,n numbers of input terminal are
connected in parallel. Here, in the circuit, the non-inverting terminal of the op amp is grounded, hence
potential at that terminal is zero when all resistances are the same quantity values.

Objective: To construct and test summing amplifier circuit.

Material and equipment quantity

1. Master unit panel 1

2. kit P/16 1
3. Variable voltage source 0-15v 2
4. wiring cable needed
5. Multimeter 1
6. Feedback resistor 1kΩ 1
7. Constant Power supply ±12V(or on master unit) 1

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Procedure:

1. Study a summing amplifier circuit shown below.

2. Observe identify input and output terminals on Panel.

Fig.3.1. 1 Summing Amplifier/Summer

3. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,,15V(V)- connect in to 6, 15V(COM)- connect
in to 17,5V(+)-connect in to 4, 8- connect in to 42, VM(+)connect in to -48, VM(-)-connect in to 66,
5V(GND)- connect in to 65, 18-connect in to 66.

4. connect dual power supply to the Panel and switch on. Apply 5V from power supply to I/P1 and
connect variable power supply I/P2to vary the voltages as in table below.

5. Measure and record output on voltmeter. Observe the polarities of input and output carefully.

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Result:

Table 3.1. 1 summing Amplifier /summer Observations

I/P Volt I/P Volt O/P Volt Rf=1kΩ

5V 0V 2.5
5V 1V 3
5V 2V 3.5
5V 3V 4
5V 4V 4.5
5V 5V 5

Conclusion

Show that output is the sum input voltage at I/P1 & I/P2?

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3.2 Difference or Subtract Amplifier

a) Difference Amplifier
Theory: The differential amplifier amplifies the voltage difference present on its inverting and non-
inverting inputs. A differential amplifier basically takes in two voltage values, finds the difference
between these two values and amplifies it. The resulting voltage can be obtained from the output pin.
two numbers of input terminal are connected. Here, in the circuit, the non-inverting terminal of the
op amp is grounded, hence potential at that terminal is zero when all resistances are the same quantity
values.

Objective: To study and test a difference input amplifier circuit.

Procedure:

1. Study a difference amplifier circuit shown below and Observe input, output terminals on Panel.

Fig.3.2. 1 a. Difference Amplifier

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 5V (+)-connect in to 4, GND- connect in to
65, 15V (+)-connect in to 17, 15V (COM)- connect in to 66, 8 connect in to -42, 48- connect in to
VM (+), VM (-)connect in to -67, 21 connect in to -67.
3. Make connection as shown ¡n the circuit diagram. Connect 2V supply to Panel with proper polarities.

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4. Connect 5V supply to I/P1 and apply voltage to 1/P2 from variable Power Supply as in table below,
observe the output voltage with its polarity carefully. Note down inputs and outputs VO = -RF [V1-
V2] /R1

Result:

Table 3.2. 1 a Difference Amplifier Observations

I/P 1 I/P2 O/P
Volt Volt Volt

5v 0v -5
5v 1v -4v
5v 2v -3v
5v 3v -2v
5v 4v -1v
5v 5v 0v
5v 6v +1v
5. By connecting capacitors (0.1 µC) at both inputs above configuration may be used as AC difference
(differential) amplifier.

Conclusion:

From the Observation it is clear that the output voltage is a difference figure of I/Pl and I/P2 & hence
can be used as subtract.

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b) Constant Amplitude Lead & Lag.

Theory: The difference amplifier configuration may use to construct a constant amplitude (approx.)
lead / lag amplifier. Using RC at no inverting input we can create phase difference write inverting
input. For an Op amp, as the operating frequency increases, two effects becomes more evident .The
gain of the Op amp decreases. The phase shift between I/P & O/P signal increases.

The manner in which the gain & phase angle changes w.r.t. the freq. variation is known as magnitude
plot & phase angle plot respectively. For Op amp like 741 the phase shift is less than or equal to the
90.

The rate of change of gain & phase shift can be change by using specific components, like resistors,
capacitors with the op amp. The network formed using these two components are called as
compensating network. The phase lag & lead are the most commonly used compensating networks
in op amp.

Objective: to construct and test a difference amplifier constant amplitude lead & lag amplifier
circuit.

Equipment’s required

1. Dual output power supply ± 12V.

2. Variable Power supply 0-15V.

3. Function Generator.

4. CRO.

5. Panel No. P16

6. Wiring cable.

7. Power Supply +5V.

8. Voltmeter 20V.

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Procedure:

1. To construct constant amplitude Lead Lag amplifier circuit shown below.

Fig.3.2. 2 circuit diagram of constant amplitude Lead Lag.

1. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 4- connect in to 27, 8- connect in to 42,
FG(O/P)- connect in to 26, FG(GND) connect in to -65, 25 connect in to -22, 20- connect in to 66,
CRO(1/P)CHI- connect in to 5, CRO(I/P)CHII- connect in to 48,CRO(GND)- connect in to 67.

2. Give I/P signal of 0.5Vpp sine &vary the freq. from 100Hz to 1 KHz. Observe the I/P & O/P
waveforms on the CRO. Note down the amplitude & phase angle of I/P & o/P signals.

3. Amplitude of the O/P signal remains constant. However, the phase angle will be different as frequency
of I/P varies.

4. give below & observe the phase angle at the O/P write I/P wave form.

5. Lag circuit repeat this step only exchange capacitor C3 and resistance R5.

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Result:

Table 3.2. 2 b constant amplitude Lag & Lead Observations

I/P 1 Vo(Vp-p) Phase
frequencies angle
100Hz
300Hz
500Hz
700Hz
900Hz
1kHZ

6. Phase Angle Calculation: Make the connections as shown in fig.4.2 observe I/P & O/P waveforms on
CRO. Now press X-Y push button on CRO. You will observe the pattern as shown below.

Formula, Sin (ϕ) = B/A.

Conclusion:

1) Calculate the Phase angle for I/P frequencies where, ϕ =Phase angle.

2) O/P amp gives the constant amplitude but change in phase at I/P & o/P signal with respect to change
in I/P frequency.

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3.3 Integrator and differentiation Circuit

a) Integrator circuit

Theory: The integrator Op-amp produces an output voltage that is both proportional to the amplitude
and duration of the input signal where to change the purely resistive ( Rƒ ) feedback element of an
inverting amplifier with a frequency dependent complex element that has a reactance, ( X ), such as
a Capacitor, C. Op-amp Integrator is an operational amplifier circuit that performs the mathematical
operation of Integration, that is we can cause the output to respond to changes in the input voltage
over time as the op-amp integrator produces an output voltage which is proportional to the integral of
the input voltage.

Objective: to study and test an Integrator circuit.

Material and equipment Quantity

1. Master unit panel ………………………………….……….....1

2. kit P/16 …................................................................................1
3. Variable voltage source 0-15v …………………………. .…. 2
4. wiring cable ………………………………………………….needed
5. Multimeter ……………………………………..…………….1
6. Feedback capacitor =0.01µF&0.1µF …………………..….2
7. Dual Constant Power supply ±12V(or on master unit) ….. ..1
8. Function Generator……………………………………….… .1
9. CRO Dual Trace. ………………………………………… ....1

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Procedure:

1. Study the circuit diagram of Integrator shown below.

2. Identify the required input, output terminals on Panel.

Fig.3.3. 1 an Integrator Circuit

3. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG(Square wave O/P) connect in to 4, 53-
connect in to 8, (or FG(Square wave O/P)- connect in to 9, 8- connect in to 55), FG(GND)- connect
in to 65,CRO(I/P)- connect in to 48, CRO(GND) connect in to -66 ,19- connect in to 67.

4. Apply a signal of 1 KHz, 1V square wave from function generator to the input of integrator.(At the
input side, two resistances are shown and two capacitors in the feedback path are shown. Select any
combination feedback capacitor and input resistance).Observe input and put waveforms
simultaneously on CRO.

5. Repeat the procedure for other combinations of input resistance and feedback capacitor.

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6. Draw the waveforms. Vary the frequency to observe triangle/saw tooth wave as it ends on R, C values.
Result:

Conclusion: Draw wave shape Output is a saw tooth or triangular shape for square wave input. Output
wave shape depends on the values of R & C.

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b) Differentiator Circuit

Theory: The basic operational amplifier differentiator circuit produces an output signal which is the
first derivative of the input signal. This operational amplifier circuit performs the mathematical
operation of Differentiation, that is it “produces a voltage output which is directly proportional to the
input voltage’s rate-of-change with respect to time“.or larger the change to the input voltage signal,
the greater the input current, the greater will be the output voltage change in response, becoming more
of a “spike” in shape. The capacitor only allows AC type input voltage changes to pass through and
whose frequency is dependent on the rate of change of the input signal.

Objective: To construct circuit and test differentiator .

Material and equipment Quantity

1. Master unit panel …………………………………………… 1

2. kit P/16 …………………………………………………...…1
3. Variable voltage source 0-15v ………………………………2
4. wiring cable ………………………………………………...needed
5. Multimeter ………………………………………………….1
6. Feedback resistor=100kΩ&10kΩ………………………..…2
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. ……………………………………………1

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Procedure

1. Circuit of a differentiator is shown below. Study it fully. Identify input, output terminals on Panel.

Fig.3.3. 2 b Differentiator Circuit

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,:,FG(Square wave O/P)- connect in to 15, 8-
connect in to 46, (or FG(Square wave O/P)- connect in to 12, 8- connect in to 49),FG(GND)- connect
in to 63, CRO(I/P)- connect in to 48 ,CRO(GND) connect in to -66,19- connect in to 65.

3. Connect the set up as shown in the circuit diagram. Connect dual power SUPPLY to the Panel.

4. Apply a signal (1 kHz 1V square wave) to the input of differentiator (two capacitor at input and two
resistance in feedback are shown in diagram, any combination may be Used).

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5. Observe the input and output on CRO simultaneously.

6. Repeat the procedure for other combinations of capacitor and feedback resistance.

Result:

fig: model graph

Conclusion:

For a square wave input, output is pulse type wave. The pulse shape depends on the values of input
capacitor and feedback resistance.

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1) Non-inverting differentiator can be constructed. Using the following circuit which will give you pulse
type wave at the O/P Using square wave as I/P of the circuit.

2) Draw the waveforms Non-inverting differentiator.

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3.4 Logarithm and antilogarithm (exponential)

a) Logarithm:

Theory: Log amplifier is a linear circuit in which the output voltage will be a constant times the
natural logarithm of the input. The basic output equation of a log amplifier is Voltage output(vout)
where Vref is the constant of normalization, and K is the scale factor. Log amplifier finds a lot of
application in electronic fields like multiplication or division (they can be performed by the addition
and subtraction of the logs of the operand), signal processing, computerized process control,
compression, decompression, RMS value detection etc. Basically there are two log amp
configurations: Op-amp diode log amplifier and Op amp-transistor log. A transistor or a diode can be
used as the input element and feedback amplifier.

 VD   VD   VD 
 nVT   VT  Vin  
ID  IS  e -1 , ID  IS  e ,  ID  IS  e nVT 
    R  
     
VIN - VD - VOUT  0, 0 - VD - VOUT  0, VD  -VOUT

-VOUT 
 
 
Vin  
 I e nVT
S  
R  
 
 
 

 Vin 
Vout  -nRIS ln  
 VT 

Where n is typing device Si or Ge ,Is is the If the operational amplifier is considered ideal, the
inverting input pin is virtually grounded, so the current flowing into the resistor from the source (and
thus through the diode to the output, since the op-amp inputs draw no current) .

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Objective :construct logarithm application circuit.

Material and equipment Quantity

1. Master unit panel …………………………………………....1

2. kit P/16 ……………………………………………………..1
3. Variable voltage source 0-15v ……………………….……..1
4. wiring cable ………………………………………………...needed
5. Multimeter ……………………………………………….....1
6. Feedback resistor, capacitor &diode………………………. .shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator………………………………………......1
9. CRO Dual Trace. …………………… ………………….......1

Procedure

1. Construct the circuit diagram logarithm shown below.

2. Identify the required input, output terminals on Panel.

Fig.3.4. 1a logarithm Circuit

3. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,FG(Square wave O/P)- connect in to 4, 59
connect in to -8, (or FG(Square wave) O/P)- connect in to 9, 8- connect in to 58), FG(GND)- connect
in to 65,CRO(I/P)- connect in to 48, CRO(GND)- connect in to 66 ,19- connect in to 67.

4. Make connection of the test set up as shown. Connect ±12V supply to the Panel. Switch it on.

5. Apply a signal of 1 KHz, 1V square wave from function generator to the input of logarism.

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6. Repeat the procedure for other combinations of input resistance and feedback diode.

7. Draw the waveforms. Vary the frequency to observe triangle/saw tooth wave as it ends on R, values.

Result:

Conclusion: Draw wave shape Output is shape for wave input. Output wave shape depends on the
values of R

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b) Antilog (exponential) Amplifier

Theory: An op-amp based anti-logarithmic amplifier produces a voltage at the output, which is
proportional to the anti-logarithm of the voltage that is applied to the diode or transistor connected to
its inverting terminal. A transistor or a diode can be used as the input element and feedback amplifier.

Equation:

 VD   VD   VD 
 nVT    0  VOUT  0, VOUT  
ID  IS  e -1 , ID  IS  eVT  ,  ID    ID   IS  e nVT .
R R
     
     
Vin - VD  0, VD  Vin.
Vin   Vin 
 
   
VOUT  Vin 
  ID   I e nVT  , VOUT   RID   RIS  e nVT   Vout  - RISanti ln 

S .
R 






  nVT 
   
   

Where n is typing device Si or Ge ,Is is the saturation current and VT is the thermal voltage. If the
operational amplifier is considered ideal, the inverting input pin is virtually grounded, so the current
flowing into the resistor from the source .

Objective :to construct Antilogism (exponential) circuit op- amp.

Material and equipment Quantity

1. Master unit panel …………………………………………….1

2. kit P/16 ……………………………………………………...1
3. Variable voltage source 0-15v ……………………………… 1
4. wiring cable ………………………………………………….needed
5. Multimeter …………………………………………………..1
6. Feedback resistor, capacitor &diode………………………….shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ……...1
8. Function Generator……………………………………………1
9. CRO Dual Trace. ……………………………………………...1

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Procedure:

1. construct the circuit diagram logarithm shown below.

2. Identify the required input, output terminals on Panel.

Fig.3.4. 2 b Antilog (exponential) Amplifier

3. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,FG(Square wave O/P)-node(diode+), node
(diode-) connect in to -8- connect in to 46, FG(GND)- connect in to 63, CRO(I/P)- connect in to 48
,CRO(GND)- connect in to 66,19- connect in to 65.

4. Connect the set up as shown in the circuit diagram. Connect dual power SUPPLY to the Panel.

5. Switch on the power supply. Apply a signal (1 kHz 1V square wave) to the input of antilog (one diode
at input and two resistance in feedback are shown in diagram, any combination may be Used).

6. Observe the input and output on CRO simultaneously.

7. Repeat the procedure for other combinations of resistor and feedback resistance.

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Result:

Conclusion

1) For a square wave input, output is pulse type wave. The pulse shape depends on the values of input
capacitor and feedback resistance.

2) Non-inverting differentiator can be constructed. Using the following circuit which will give you pulse
type wave at the O/P Using square wave as I/P of the circuit

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Experiment 4:Precision rectifiers (wave shaping)

4.1 half & full wave rectifiers

Theory: The precision rectifier is another rectifier that converts AC to DC, but in a precision
rectifier we use an op-amp to compensate for the voltage drop across the diode, that is why we are
not losing the 0.6V or 0.7V voltage drop across the diode, also the circuit can be constructed to have
some gain at the output of the amplifier as well.

A half wave precision rectifier is implemented using an op amp, and includes the diode in the
feedback loop. A half wave rectifier is a rectifier that produces positive half cycles at the output for
one half cycle of the input and zero output for the other half cycle of the input.

A full wave rectifier produces positive half cycles at the output for both half cycles of the input.

Objective: To study and test Precision Rectifier circuit, half wave & full wave rectifiers

Material and equipment Quantity

1. Master unit panel …………………………………………...1

2. kit P/16 …………………………………………………….1
3. Variable voltage source 0-15v …………………………..… 1
4. wiring cable ………………………………………………...needed
5. Multimeter ……………………………………………….....1
6. Feedback resistor, compacitor &diode………………………shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. …………………………………………....1

a) Half wave circuit :

Procedure:
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1. Study the circuit diagram as shown below. Identify the required component on Panel/16.

Fig.4.1. 1 a Precision Half-Wave Rectifiers

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,,FG(sine/triang O/P)- connect in to 4,8- connect
in to 60,FG(GND)- connect in to 66,61- connect in to CRO(O/P), 65- connect in to CRO(GND), 19-
connect in to 67.

3. Make assembly of test set up as shown in circuit diagram. Connect ±12V to Panel.

4. Switch power supply. Apply a signal of 1 kHz, 0.5v (sine wave) to the input of half wave rectifier.

5. Observe input output waveforms on CRO simultaneously. Measure the amplitudes of input, output
waveforms, and can you record it?.

6. Now use other diode (reversal of polarity) at O/P of Op amp & test the circuit by connecting a
capacitor (C2) across O/P of half wave rectifier you will get DC equivalent to Peak voltage at O/P.
This effect will be pronounced at higher frequency (10 KHz).

Result:

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b) Half wave rectifier adding capacitor.

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Procedure:

1. Half wave rectifier can also be constructed as shown in below circuit.

Fig.4.1. 2 b Half-Wave Rectifiers

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG(Sine /Triang.I /P)- connect in to
5,FG(GND) - connect in to 19,8- connect in to 58, 27 connect in to -CRO(O/P),65-CRO(GND),60-
connect in to 24,8- connect in to 14,13- connect in to 7- connect in to 27- connect in to 60,25- connect
in to 19 connect in to -GND.

3. Make assembly of test set up as shown in Circuit diagram.

4. Connect ±12V to Panel. Switch on power supply and observe waveform for half wave rectifier.

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Result:

Conclusion:

Precision half wave rectifier gives of output as conventional rectifier but the output signal has no loss
of voltage. O/P frequency is same as I/P.

Addition of capacitor at o/P of half wave rectifier converts the circuit into a peak detector.

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c) Full wave Rectifier:

Procedure:

1. Study the circuit diagram as shown below. Identify the required component on Panel.

Fig.4.1. 3 Full Wave Rectifiers

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG(Sine /Trian O/P)- connect in to 24, 25-
connect in to 8, 5- connect in to 58, 60- connect in to 6, 30- connect in to 6, 29- connect in to 37, 36-
connect in to 32, 19 connect in to -65, 28- connect in to 58,CRO(I/P)- connect in to 32, CRO(GND)-
connect in to 67.

3. Make connections as per circuit diagram (amplifier A2 is provided on Panel with components shown).
Connect a dual power supply ±12V to the Panel. Switch on power supply. Apply a signal of 1 KHz,
0.5V (sine wave) to the input of rectifier.

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4. Observe input and output waveforms on dual trace CRO simultaneously.

5. Draw the waveforms.

6. Similarly Addition of capacitor 0.1μF at o/P of full wave rectifier converts the circuit into a peak
detector.’

7. By connecting a can in parallel to R (10K), you can make filtered full wave rectifier short (33-27, 25-
32, 26-29.

Result:

Conclusion:

Precision full wave rectifier gives of output as conventional rectifier but the output signal has no loss
of voltage. O/P frequency is same as I/P.

By connecting a can in parallel to R (10K), you can make filtered full wave rectifier short (33-27, 25-
32, 26-29.

Addition of capacitor at o/P of full wave rectifier converts the circuit into a peak detector
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4.2 Waveform Generator

Theory: By creating Positive feedback and using various voltages, limiting schemes you could
make a op amp oscillator creating various waveforms at its outputs.

a) Wein bridge oscillator

b) Square wave generator

c) Triangular wave generator

d) Saw tooth wave generator.

e) Miller Ramp Generator

When a Wein bridge circuit is Connected between I/P & O/P of the op amp it will be used as a Wein
bridge oscillator. The freq. of the oscillator will be

Fo=1/ (2πRC) =0.159/RC

Square wave O/Ps is generated when op amps operate in the saturation region. By connecting
capacitor at inverting I/P of op amp it can be used as a square wave generator.

Giving square wave generator O/P to the integrator as a I/P, triangular waveform is generated.
Frequency of square wave and triangular wave are same. By changing the duty, cycle of the triangular
wave saw tooth waveform is generated at the O/P.

Objective: to generate various types of useful waveforms using op amp circuits. Typically above are
the waveform generating circuits Constructed using op amp.

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a) Wien Bridge Oscillator

Procedure:

1. Circuit diagram for Wein bridge oscillator is as given1ow.

Fig.4.2. 1 a Wein Bridge Oscillator

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 8 connect in to -37, 36- connect in to 46, 8-
connect in to 66, 56- connect in to 17, 22 connect in to -25, 21- connect in to 27, 26 connect in to -
65, CRO(I/P)- connect in to 51, CRO(GND) connect in to -67.

3. Identify the circuit on the panel and design the Wein bridge oscillator as per the wiring sequence
given. Switch on the power supply.

4. Adjust the potentiometers to get sine wave at the o/P oscillator.

Measure the frequency of the o/P waveform.

Fo = 1/2πRC. Where R = R4 = R5 = 11KΩ.

C = C3 = C5 = 0.1µF

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whether it is matching with the calculated frequency.

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b) Square wave generator/Astable Multivibrator

Procedure:

1. Circuit diagram for op amp as a square wave generator.

Fig.4.2. 2 b Square wave generator

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,15 connect in to -65, 8- connect in to 44, 17-
connect in to 65, 36- connect in to 37, 19- connect in to 36, 38 connect in to -48, CRO(I/P)- connect
in to 51, CRO(GND) connect in to -66, 56- connect in to 28,29- connect in to GND.

3. Observer square output at 48 & pulse output at 56 Connect the circuit as shown above

4. The R & C connected between I/P & the 0/P of the op amp will decide the frequency 0/P of the above
circuit. Fo =1/2RC .Where R = 1K & C = 0.1 µF

Result:

5. Smaller the RC time constant higher the O/P frequency and vice versa.

6. Observe the O/P frequency on the CRO and match it with the calculated one.

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c) Triangular wave generator

Procedure:

1. The circuit diagram for Triangular wave generator is as shown below.

Fig.4.2. 3 c Triangular wave generator

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,56- connect in to 8, 5- connect in to 62, 64
connect in to -67,63 connect in to -33, 29 connect in to 66,37 connect in to 38, 33 - connect in to 36
,38- connect in to 30, 31 connect in to -57, CRO(I/p)- connect in to 51 ,CRO(GND)- connect in to 67.

3. Identify’ the circuit on the panel & Construct Using the wiring sequence given above.

4. By connecting non-invert I/P of op amp 2 to ground, you will get triangular wave.

5. The Same I/P ¡S Used for the offset adjustment while saw tooth Waveform generate circuit.

6. Vary the 10K Pot & measure the 0/P frequency POT value Fo= POT value/4R1C5R9.

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d) Saw tooth wave generator

Procedure

1. The circuit diagram for Saw tooth wave generator is as shown below.

Fig.4.2. 4 d Saw tooth wave generator circuit

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,56- connect in to 8,5- connect in to 62,64-
connect in to 67.63- connect in to 33,37- connect in to 38,33- connect in to 36,38- connect in to 30,31-
connect in to 57,29- connect in to 65,+15V- connect in to 19,15V(COM)- connect in to 66,RCO(I/P)-
connect in to 51,CRO(GND)- connect in to 67.

3. Connect dual power supply to panel. Given vriable15V supply to the op amp for duty cycle adjustment
of tooth waveform. Do not exceed the supply above 12V.

4. Good saw tooth waveform is observed between the I/P supply range between 3V to 5V. Below that
the waveform will be angular wave Switch ON the power supply. Adjust 10K potentiometer (POT)
& the variable supply voltage to get the Saw tooth wave at O/P.

5. By varying the POT, amplitude & freq. of o/p wave changes. Measure the amplitude and freq. at min
& max position of pot at which you can observe a good saw tooth wave.

6. However, at extreme min & max position you will not get exact saw tooth.

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7. Can measure the frequency of waveform using equation below, POT value Observe the waveform &
note down frequency & match it will calculate. Fo=POT value/4R1C5R9.

Result: model graph

Conclusion:

1) Op amp can be used to construct various waveform generator circuits like Wein bridge oscillator,
Square wave, Triangular wave & saw tooth generator.

2) Write lab report for above fourth wave generator.

3) Show following circuit Synchronous Saw tooth waveform the same procedure frequency as square
wave can be generated using an Op-amp with square wave as I/P.

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e) Miller ramp generator

Theory: The Miller or Bootstrap Ramp generator Circuit generates a Sweep (ramp) with relatively
less slope error Compared to the exponential sweep. This is achieve maintaining a constant current
through a resistor by maintain Constant voltage across it.

Objective: observe the circuit for generation of ramp signal from applied square wave.

Equipment required

DC Power supplies +5V & -12V.

Function Generator.

Dual Channel TTL O/P CRO.

Panel no. pl1

Procedure:

1. Connect follow Fig. 4.2e. Setup for Miller Ramp Generator circuit.

Fig.4.2. 5 Setup for Miller Ramp Generator

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG o/p (3Vopp square)-11, FG (COM)-
connect in to 25, CRO CHI - connect in to 11, CRO CHII- connect in to 23, CRO (COM)- connect in
to 15.

3. Follow the given procedure tire lo observe the Output of Miller circuit;
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4. Make Connection as per above Wiring sequence.

5. Apply +5V and -12V power supplies to the Sockets as per above Wiring sequence and set the selector
5. switch to Miller Position.

6. Connect FG Square wave Output of 3Vpp & 500Hz to socket of Miller circuit as per wiring sequence

7. Connect CRO CR-I to PG output (means at input of Miller circuit) & CRO CH-II to the output of
Miller circuit and observe both signals on Dual trace CRO simultaneously.

8. Draw input square wave & observed Output Ramp signal on your note book & write do the Ramp
ON & OFF duration

9. Now YOU Can apply frequency in the range of l50Hz to 1KHz with same FG Settings & observe the
output Ramp signal & write down the Ramp ON & OFF duration.

Result:

Conclusion:

1) Miller circuit is used to generate a Ramp (Sweep) signal as application of square waveform and the
ON & OFF period of Output ramp signal is depends on the input signal frequency as have observed.

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4.3 voltage & current /Source Converter

a) Voltage to Settable Current Converter/Source

Theory: derivation calculation.

IL=I1 +12

IL= (Vin -V1) / (R5 + (V0 -V1) /R4),Assuming R4=R5=R1=R10=R=1K.

Vin+V0-2V1 =IL * R.

Since Vl=V2=VO x[R/R+R]=VO/2……………………….(1),Substitute above in equation 1

V0 / 2 = [VIN + Vo - ILR] / 2

Vin = ILR, IL=Vin/R (Where R=1K & is common circuit resistor, no way connected With load)

This means that the load current depends on input vo1ta Vin and resistor R. Notice that all resistor
must be equal in value However the circuit will perform satisfactorily Provided load Size (Value say
up to 500ohm) Objective: to test voltage settable current converter circuit, Here the amplitude of
current max. 10 mA) is not determine by load resistor however it has upper it of load resistor value.

Material and equipment Quantity

1. Master unit panel …………………………………………....1

2. kit P/16 …………………………………………………..…1
3. Variable voltage source 0-15v …………………….……….. 2
4. wiring cable ………………………………………………....needed
5. Multimeter ……………………………………………….....1
6. Feedback resistor, compacitor &diode……………… ……..needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. ……………………………………….…...1

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Procedure:

1. Voltage can be converted to current by operational amplifier Typical V to I circuit is shown below.

Fig.4.3. 1 a Voltage to Current Converter

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 8 connect in to -42, 4- connect in to 65, 48-
connect in to 17, 15V(V)- connect in to 20, 15V(COM)- connect in to 66, 21 - connect in to VM(+),
VM(-)-connect in to 66, AM(+)-connect in to 19, AM(-)-connect in to 30 (One terminal of 1K), 31
(Other terminal of Res 1K) -67 connect in to (GND).

3. Assemble the above circuit on Panel No. 16. Switch on power supplies. Set constant voltage suitably.
Apply input voltage as in the table and observe the current through RL (1K).

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Result: Table 4.3. 1 Voltage to Current Converter Observation

DC voltage IL

Vin (volt)

0V 2.049μA

1.05V 1.05mA

2.1V 2.102mA

3V 3.002mA

4.05V 4.052mA

5.1V 5.102mA

Verify, IL = Vm/RL RL=l KΩ or Less

Conclusion

1. Above V to I converter can be used to drive LED/Lamp (up to 20mA).

2. The amplitude does not depend on Load impendence by input voltage and circuit component R

3. By using from power supply a constant current can be genera passed through unknown resistor then
the drop across load is proportional to the resistance as current is known.

4. Construct V to I circuit that gives approx. lmA current for10v.

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b) Current to Voltage converter

Theory: Voltage gain of inverting amplifier

Vo= - (Vin/R1)

Vo= - Iin*Rf. Where, Vin/Rl = Iin (Constant for Constant Vin &R1)

Note: Negative polarity output voltage of Iin interning node of circuit. By changing polarity of Vin,
Iin direct be reverse thereby making Vo positive.

Objective: to test current to voltage converter circuit.

Procedure:

1. Assemble the circuit and setup of I to V converter as shown below.

Fig.4.3. 2 a Current to Voltage Converter

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,15V(V)-AM(+),AM(-) – connect in to 4, 8-
connect in to 42, 46- connect in to 65, 19- connect in to 66, 48- connect in to VM(+), VM(-)-connect
in to 67, 15V(COM)- connect in to 67.

3. Switch on the power supplies. Apply input current as in table, observe, and record corresponding
output voltage.

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Result: Table 4.3. 2 Current to Voltage Converter Observation

I/P current Vou

mA volt
0mA 0
1 mA -998.86mV
2 mA -1.929V
3 mA -2.776V
4 mA -3.621V
5 mA -4.465V
Verify O/P voltage =Iin x R

Conclusion: Show output voltage of current to voltage converter proportional to the input
current.

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4.4 Instrumentation Amplifier and its Application

Theory: Many industrial applications require amplification of low leve1 or weak signals measured
from remote place. Mostly such signals are from various transducers or sensors used in industry for
process control.An instrumentation Amplifier is a difference Amplifier, having two inputs & output
is proportional to the Deference between these two inputs.

Ideal instrumentation amplifier should exhibits the following properties.

 Very high & stable gain.

 Infinite input impedance (common mode & differential mode). To avoid loading on input source.

 Zero output impedance.

 Infinite CMRR) i.e. amplifiers should be very sensitive to difference signal only & to reject or ignore
common mode signals.

 High gain stability.

 Extremely high linearity between O/P & I/P.

 No offset errors. Zero drifts (Time & Thermal).

Objectives: To study and measure the different characteristics of an Instrumentation amplifier and
its application to bridge circuit.

Material and equipment Quantity

1. Master unit panel ………………………………………...….1

2. kit P/16 …………………………………………………..…1
3. Variable voltage source 0-15v …………………….…….…. 2
4. wiring cable ………………………………………………....needed
5. Multimeter ………………………………………………….1
6. Feedback resistor, compacitor &diode……………… …..… needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. ……………………………………….…...1
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Procedure:

1. Construct the circuit as shown below. Quad Op-Amps used as an Instrumentation Amplifier:

2. Identify instrumentation amplifier (In-Amp) & its inputs and output terminals on the panel Circuit
diagram of instrumentation amplifier is given below, which is constructed using Quad Op Amp IC
LM324.

Fig.4.4. 1 a. Instrumentation Amplifier

3. For testing of characteristics of Instrumentation amplifier, follow the below procedures with proper
wiring is connected as give for different experiments;

a) Offset adjustment

Procedure:

1. When I am applied to zero voltage to both inputs of In-Amp, the output must be zero. For this, an
offset adjustment POT is provided with Panel, follow the procedure below;

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2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2 , 40 connect in to 39, 40 connect in to 66, 41
connect in to VM(+), 67connect in to VM(-).

3. Now adjust offset adjustment potentiometer to set output of instrument on Amplifier is to zero. This
offset adjustment is necessary to adjust zero output for zero input due to non-ideal performance of
practical circuits. Do not disturb offset adjustment for further experiments after setting it to zero
output voltage for zero input voltages.

b) CMRR

Procedure:

1. The CMRR stands for “Common Mode Rejection Ratio means same signal is applied to both input
terminals of In-Amp, for better performance of In-Amps the CMRR must be low.

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, VM (+)connect in to 41, VM (-)connect in to
66, 39connect in to 40, 15V(-l-)connect in to 40, 15V(COM)connect in to 65.

3. observation table V1 = V2. .

4. For creating negative voltage from master unit, short the Positive terminal of +30Vvariable power
supply to the negative terminal of +15V variable power Supply, take the Output from Positive
terminal of variable 15V Power Supply to connect with socket no.40 and the voltages per the table
given below by rotating the +15V pot precisely.

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Result: Table 4.4. 1 CMRR

i/p V1 o/p voltage

(in volt) (in volt)
0 0
1 0.03
2 0.03
3 0.03
4 0.02
5 0.01
-1 0.05
-2 0.06
-3 0.07
-4 0.07
-5 0.08
CMRR=Ad/Acm

CMRR in dB=20log10 [Ad/Acm]

Acm=Vcm/Vo

c) Differential gain:

Procedure:

1. In this case, apply different voltages to both the input term in instrumentation Amp as per the
observation table & record the voltages. (i.e. 100k pot) on panel to middle position.

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,15V(+)-connect in to 39,30v(+)-connect in to
40,15(COM)- connect in to 65,30V(COM)- connect in to 66,VM(+) - connect in to 41,VM(-) -
connect in to 67.

3. 18V (+) connect in to 39, 18V (GND)- connect in to 66, 33- connect in to 36, 38 - connect in to 67,
37connect in to 40,vm(+)

4. Rotate the +15V pot and +30V pot, which are connected at the input side of In-Amp, to produce
different input voltages as given below observation table.

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5. With standalon1) Adjust required Vi2 volts using 10k pot located on panel at 37 feed it to 40.

Result: Table 4.4. 2 differential gain Observation

Vin1 volt Vin2 volt VO volt
0 1 2
1 0 -2.2
1 3 4.6
4 1 -6
1 5 8.2
Calculate differential gain, Ad=VO/ (V2—V1).

d) Active bridge application

Theory: An Active Bridge is built by using passive components resistors, inductors and capacitors
and the output is given to then the wlo1e unit becomes an active bridge circuit. Creating variations
in resistance at one input side of instrumentation amplifier and the other input is fixed to produce
different output as the variation of POT. Active Bridges are more accurate in measurement because
of the use active device. The ‘Vi1’ input of in-Amp is variable and ‘Vi2’ is fixed and ‘Vref’ is consider
as +5 volts as shown below.

Objective: Creating Active Bridge variations in resistance at one input side of instrumentation
amplifier.

Procedure:

1. Make the connection using proper patch cords as per the wiring sequence given.

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Fig.4.4. 2 d Active Bridge using In-Amp.

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 28 connect in to -31, + 5Vconnect in to 28,
29- connect in to 22, 20 connect in to -65,29- connect in to 40(Vi2), 30- connect in to 8,6_ connect in
to 65, 4_ connect in to 36, 37_ connect in to 38, 38- connect in to 67, 30- connect in to 39(Vi1),
VM(+)-connect in to 41, VM(-)connect in to 67.

3. First set the output of’ In-Amp to zero by applying zero inputs, refer the above offset adjustment
method.

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4. Set the gain of In-Amp to minimum by rotating the Gain pot of 100K to fully clock-wise i.e. at OK
range.

5. Use 10K POT for deferent resistance values of Vil-input side. slightly rotate to Anti-Clock-wise for
getting different values.

Result: Table 4.4. 3 Active Bridge using In-Amp

Resistance(R6) Vi1 Vi2 VO

kΩ (in volt) (in volt) (in volt)

0% 1.667 2.5 2.402

12.5% 2.045 2.5 1.312

16% 2.097 2.5 1.165

18% 2.121 2.5 1.094

82% 2.371 2.5 374.549m

100% 2.391 2.5 316.467m

Conclusion

1) Write note down the values according to Note: Vo decreases with increase resistance.

2) CMRR of In-Amp is very high (ideally infinite), which will to reduce the error introduce in In-Amp
and differential high.

3) We can implement any In-Amp for quality measurements as per our desired applications.

4) Write lab report instrumentation amplifiers.

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4.5 Comparator

Theory: A comparator is a circuit, which compares a signal with known quantity called reference.
Op Amp. Open loop configuration can be used as a comparator. This comparator has two analog
inputs and a single o/p. Thus Op-Amp. 0/p saturates to either +ve or -ve Voltas depending on i/p
voltage on both i/p. Comparators are used in circuit such as Schmitt trigger discriminator, voltage
level detectors & oscillator.

Objectives: you will be able to describe o/P input relation of a comparator (using Op-Amp)

Material and equipment Quantity

1. Master unit panel …………………………………………….1

2. kit P/16 ……………………………………………………...1
3. Variable voltage source 0-15v …………………….………. ..2
4. wiring cable ………………………………………………….needed
5. Multimeter …………………………………………………..1
6. Feedback resistor, compacitor &diode……………… ………needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) …......1
8. Function Generator…………………………………………...1
9. CRO Dual Trace. ……………………………………….…….1

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Procedure:

1. Make connection as shown in fìg.

Fig.4.6. 1 Connection to achieve Comparator Circuit

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,30V(+V)- connect in to 8,15V(V)- connect in
to 19,VM(+)-connect in to 48,VM(-)-connect in to 65,30V(-) - connect in to 66 , 30V(V)- connect in
to 8,15V(-)-connect in to 66.

3. Switch on all power supplies. Set reference voltage Vref. = 1V non inverting i/p & vary the voltage
at inverting i/p as shown.

Table 4.6. 1 Comparator Observations

Vref.=1v

I/P(inV) O/p
Volts volts
0
0.4
0.8
1.0
1.2

4. Repeat the above procedure for Vref. = 2 V & note down the observation in table 2

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Result: Table Comparator Observations

For Vref= 2.

Table 4.6. 2 Comparator Observations

I/P(inV) O/p
Volts volts
0
0.5
1.0
1.5
2.0
2.2

Conclusion:

1) Observations show that Op-Amp works as comparator when used in open loop configuration (No
feedback).

2) Which Signal voltage is less than reference voltage drives Op-Amp o/p to one end of saturation &
when signal voltage exceeds reference voltage o/p reaches opposite saturation.

3) Can be used as a zero crossing detector by keeping one I/P to ground and connect signal at other I/P.

4) Can connect a buffer amplifier before connecting to I/P to form Buffered zero crossing detector.

5) A capacitor at I/P side will provide AC coupling facility and only AC signal (No DC component) can
be compared with other signal at other I/P.

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4.7 Sign Changer

Theory: Sign changer is the circuit, which changes the sign / polarity of I/P signal as desired using
sign command. This sign command is a digital signal, which decides the o/P sign (polarity).

Objective: to understand sign changer functioning of an op amp. Thus, a command signal can be
used to decide o/P polarity (sign) & o/P amplitude.

Material and equipment Quantity

1. Master unit panel ……………………………………………..1

2. kit P/16 ………………………………………………………1
3. Variable voltage source 0-15v …………………….……...…. 2
4. wiring cable ………………………………………………….needed
5. Multimeter …………………………………………………...1
6. Feedback resistor, compacitor &diode……………… …….…needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….......1
8. Function Generator…………………………………………....1
9. CRO Dual Trace. ……………………………………….…….1

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Procedure:

1. Make connections of the Fig. on Panel No.16

(b

Fig.4.7. 1 a & b A typical and Circuit Sign Changer

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,FG(O/P)- connect in to 4, 8- connect in to 36,
37- connect in to 48, 5- connect in to 19, CRO(I/P)CHI- connect in to 5, CHI- connect in to 51,
CRO(GND) connect in to 67, FG(GND-66. 2] ,FG(OÌP)- connect in to 4, 8- connect in to 36, 37-
connect in to 48, 19- connect in to 65, CRO(I/P)CHI- connect in to 5 CHII- connect in to 51,
CRO(GND)- connect in to 67, FG(GND)- connect in to 65.

3. Connect ±12V Power Supply and 1 V pp sine signal of 1 KHz t the I/P from function generator.
Switch on the Power Supply & observe the I/P signal & O/P signal on CHI & CH2 respectively a
Dual Trace CRO.

4. Observe I/P & O/P when points A & B are shorted by patch cord ie.5-19)(C & D open). Note down
TIP, 0/P Waveforms.

5. Remove shorting of A - B & short C & D(i.e.19-65).observe & note down I/P & O/P wave forms.

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6. Observe the o/P amplitude & o/P polarity by varying potentiometer when A - B shorted (C-D open)
& C - D shorted (AB open).Note down the observations.

Conclusion:

1) Show Sign changer function sign op amp with Switches.

2) Variable o/P can be obtain by gain adjustment of amplifier (using potentiometer in feedback).

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4.8 Offset Null

Theory : Input offset voltage is the amount of voltage that applied between two input terminals of
Op Amp. To bring force O/P voltage to zero. This is due to mismatch of two is stage transistors of an
Op-amp. Practically it is not possible produce two transistors of exact characteristics. Supply of an
Op-Amp the circuit of offset null arrangement of IC74l with its null pins 1 & 5.

By varying Wiper of potentiometer, zero voltage at the o/P of an Op-Amp is obtained. This method
may be called as internal offset adjusting for most practical applications. The offset voltage is too
Small to bother and in that case just keep these input pins open. Use of compensating network at I/P
terminal is external to the device & may be called as external offset adjustment.

Objective: to test offset nulling is possible for both inverting & non-inverting amplifiers.

Material and equipment Quantity

1. Master unit panel ………………………………………….1

2. kit P/16 ……………………………………………………1
3. Variable voltage source 0-15v …………………….……… 2
4. wiring cable ……………………………………………….needed
5. Multimeter ………………………………………………...1
6. Feedback resistor, compacitor &diode……………… ……..needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) …....1
8. Function Generator……………………………………….....1
9. CRO Dual Trace. ………………………………………..….1

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Procedure:

a) Internal offset Null

1. Adjustment (using offset pins) circuit diagram in fig. 4.8. Shows off set null adjustment using offset
pins

Fig.4.8. 1 c Internal offset null

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 8- connect in to 47, 5- connect in to 65, 19
connect in to -66, 34- connect in to 36 connect in to 38, 37- connect in to 68, VM(+)-connect in to
51, VM(-)-connect in to 67 .

3. Connect both the I/Ps to ground. Measure O/P voltage on voltmeter & note down.

4. In another Adjust potentiometer P to obtain zero voltage on voltmeter o/p zero condition is the actual
balanced or null condition of an OP- amp. by compensating network. Study the circuit diagram
shown.

Fig.4.8. 2 d External offset null

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5. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 15V- connect in to 36, 15V(COM- connect in
to 65, 30V(V)- connect in to 15V(COM), 30V(COM)- connect in to 38, 37- connect in to 17, 21-
connect in to 66, 42- connect in to 8, 4- connect in to 67, VM(+)-connect in to 48,VM(-)-connect in
to 67.

6. Construct the circuit as shown in fig patch cords. Connect inverting I/P to ground & connect voltmeter
at the O/P terminals of an O/p Amp. Switch on the power supply.

7. Measure the O/P voltage on voltmeter & note down.

8. Adjust the potentiometer to obtain zero O/P voltage. You may measure the voltage at T. Which is
the input offset voltage as inverting Tip is grounded.

9. O/p zero condition is the Op Amp nulling & Op Amp is ready to work as inverting amplifier.

10. For Non-Inverting amplifier-compensating network should be connected to inverting I/P instead of
Non inverting I/P & Non Inverting I/P should be grounded.

Conclusion:

1) Offset Null can be achieved by using offset pins (Internal from Op-Amp) or by external
compensating network.

2) Offset nulling is possible for both inverting & non-inverting amplifiers.

3) Either external network or internal offset nulling can be applied for both inverting & non-inverting
op amps as shown above.

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4.9 Peak Detector

Theory: To detect peak value of small signal a precision detector circuit is needed. Precision circuit
consists of precision rectifier & a capacitor across its O/P fig4.9 shows peak detector.Diode & Op-
Amp offers rectification precisely with knee voltage in range of few microvolt’s due to the high gain
of Op-Amp (Normal knee voltage of a diode is around 0.7V). Thus, small signal can easily be
rectified. A capacitor across the 0/P charges to the peak value & discharges according to the values.

Objective: to understand the working of a peak detector / Precision rectifier with filter.

Material and equipment Quantity

1. Master unit panel …………………………………………….1

2. kit P/16 ………………………………………………………1
3. Variable voltage source 0-15v …………………….……...…. 2
4. wiring cable ………………………………………………….needed
5. Multimeter …………………………………………………...1
6. Feedback resistor, capacitor &diode……………… ………needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ……..1
8. Function Generator…...............................................................1
9. CRO Dual Trace. ……………………………………….…….1

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Procedure:

1. Construct the circuit as shown in fig. 4.9 as panel /16.

Fig.4.9. 1 Peak detector circuit

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,, FG (O/P)- connect in to 19, 8- connect in to
6 1, 60- connect in to 25, 27- connect in to 65, CRO(I/P) CHI- connect in to 22, CRO(IIP) CHU-
connect in to 60, CRO(GND)- connect in to 66. FG(GND)- connect in to 67.

3. power supply +/-I2Vconnections is internally wired needing no external connection at socket 1,2,3.

4. Connect a signal of 1 V p-to-p 1 KHz from Function Generator & observe the O/P on CRO.

Result: Table 4.9. 1 Peak detector Observations

O/P VoIt DC O/P Volts

1V
1.1V
1.2V
1.3V
1.4V
1.8V
2V
Now connect resistance of 1K2 across capacitor as RL & serve its effect on o/P voltage.

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Conclusion

1) Above observations shows that the circuit gives DC O/P almost equal to the I/P peak voltage.

2) By connecting second available op amp to the output of above peak detector either in voltage follower
(Buffer) mode or unity gain inverting op amp we can generate buffered peak detector.

Fig. (c) buffer circuit (d) inverter circuit

1. buffer circuit Fig: 4.9.2c: 60 connect in to -30, 29 connect in to -32, CRO (1/P) CH connect in to -
32.

2. inverter circuit fig: 4.9.2d: 60- connect in to 28, 36- connect in to 65, 28 connect in to -32, CRO (I/P)
CHII- connect in to 32 .

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4.10 Clipping Circuit

Theory: Clipper is a circuit, which rejects unwanted portion of a signal. In addition, it is called as
limiter. A positive limiter (Clipping) circuit is shown. When ref. voltage is zero, Inverting i/P drives
o/P to negative there by Diode D turns on. This causes heavy negative feedback (feedback resistance
is almost zero). Thus, o/p becomes near zero with +ve I/P. When I/P goes negative, D o/p goes +ve
& turns off Diode D. Thus o/P follows negative half cycle of lip & o/P waveform is on negative half
cycles without +ve half. Clipping level can be changed by changing reference voltage. Various
combinations of Op-Amp diode & Vref are possible to obtain desired clipping of the waveform.

Back connected zener are in the feedback path. Hence, the O/P voltage is Vz + Vk where Vz is zener
voltage & Vk is the forward voltage drop of a diode. Thus clipping level depends on Zener breaks
down voltage.

Objective: to construct & test the clipping circuit around an Op-Amp.

Procedure:

1. Construct the following circuits of fig. 17.3 as panel No. 16. Apply 10V p-to-p sine signal of 1 KHz
as L IP to each of the circuit &observe the O/P waveforms on CRO. Note down the 1/p & op
waveforms with their DC level (DC coupling mode of CRO).Vary the pot & observe o/p waveforms.

positive Clipper (Limiter)

Fig.4.10. 1 positive Clipper (Limiter

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2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,,FG(O/P)- connect in to 4,19- connect in to 37,
15V(V)- connect in to 36,38- connect in to 65, 15V(COM)- connect in to 66, 58- connect in to 8,
CRO(I/P)CHI- connect in to 5, CRO(I/P)CHII- connect in to 59, CRO(GND)- connect in to
67,FG(GND)- connect in to 65.

Result:

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for Negative Clipper

Fig.4.10. 2 Negative Clipper

3. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,,FG(O/P) connect in to -19,38- connect in to
65,37 connect in to -4, 36 connect in to -68, 6l- connect in to 8, CRO(l/P)CHI- connect in to 22,
CRO(I/P)CHII- connect in to 60, CRO(GND)- connect in to 67, FG(GND)- connect in to 65.

Result:

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Both Positive & Negative Peak Clipper (Limiter)

Fig.4.10. 3 Both Positive & Negative Peak Clipper (Limiter)

4. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2,, FG(O/P)- connect in to 4, FG(GND)- connect
in to 65 ,64- connect in to 51’ 8- connect in to 62, 19- connect in to 65, CRO(I/p)CHI- connect in to
5,CRO(i/p)CHII- connect in to 8 ,CRO(GND)- connect in to 67.

Result:

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Conclusion:

1) Positive, Negative & Positive Negative Clipping circuits eliminates +ve, -ve & +ve —ve peaks of the
I/P signal.

2) In place of back-to-back (anti series), a bridge rectifier may replace Zeners in above circuits with
zener connected across DC o/p corners of the bridge to obtain same results, only difference being the
limiter.

3) Two diode drops will increase value.

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4.12 Multivibrator or Timer Circuit

Introduction: A multivibrator is an electronic circuit used to implement a variety of simple two-state

systems such as oscillators, timers and flip-flops. It is characterized by two amplifying devices
(transistors, electron tubes or other devices) cross-coupled by resistors and capacitors.

There are three types of multivibrator circuit:

 Astable: in which the circuit is not stable in either state—it continuously oscillates from one state to
the other.

 Monostable: in which one of the states is stable, but the other is not—the circuit will flip into the
unstable state for a determined period, but will eventually return to the stable state. Such a circuit is
useful for creating a timing period of fixed duration in response to some external event. This circuit
is also known as a one shot. A common application is in eliminating switch bounce.

 Bistabl, in which the circuit will remain in either state indefinitely. The circuit can be flipped from
one state to the other by an external event or trigger. Such a circuit is important as the fundamental
building block of a register or memory device. This circuit is also known as a flip-flop.

a) Monostable- Multivibrator (Timer Circuit) By Op Amp

Theory: A Monostable multivibrator is a timing circuit that changes state once triggered, but returns
to its original state after a certain time delay. It is also known as ‘One-Shot’ circuit

Monostable multivibrators have only one stable state that is used to generate a single o/p pulse of a
specified width either high or low when an external trigger pulse is applied. This trigger pulse starts
a timing cycle, which causes the o/p to change its state at the time of start of timing cycle and
continues in the second state which is decided by the time constant of the capacitor C and resistor R
until it returns to its original state. It will continue in this state until another i/p signal is received.
Monostable multivibrators can used as pulse stretcher rectangular waveform. Trailing edge depends
upon the RC time constant of the feedback components used.

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Objective: Design and Build Monostable Multivibrator Circuit using Op-amp

Material and equipment Quantity

1. Master unit panel ……………………………………….….1

2. kit P/16 ………………………………………………….…1
3. Variable voltage source 0-15v …………………….………. 2
4. wiring cable …………………………………………….…..needed
5. Multimeter ……………………………………………….....1
6. Feedback resistor, compacitor &diode……………… ……...needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. ……………………………………….……1

Procedure:

1. The connecting circuit diagram of Monostable multivibrator is given below.

Fig.4.12. 1 a Monostable multivibrator

Important Condition: R2C1 <<x P1C5.

Where ‘x’ is equivalent to 0.5, if you set the Wiper of POT at the center of variable range.

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2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG (O/p)- connect in to l2 ,FG(Gnd)- connect
in to 67, 6- connect in to 65, 55- connect in to 19, 37- connect in to 19, 38- connect in to 67, 36-
connect in to 68, CRO (l/P) - connect in to 48, CRO (GND)- connect in to 67.

3. Connection of circuit should be in above given sequence to use the panel in Mono stable mode. Apply
square wave signal from FG within frequency range varies from 10Hz -3.2 kHz only.

4. Show output wave has Constant amplitude and pulse width for a certain input frequency range
depending upon component values used at output side.

5. Is it the RC circuit at the output side decides the width of output pulse?

6. The Mono stable multivibrator is triggered at falling edge of input square wave.

Result:

 Input Time Constant (R2C I) = (0.01 *10-6)*(103) = 10 µs.

 Output Time Constant (XP1C5) = (0.5)*(l0*103)*(0.1*10-6)=500µs.
 X’ (i.e. wiper setting of Pot) and it must be at center for x=0.5.
 Set input square wave amplitude +/- 10 volts or 20 V p-to-p.
 Set both channel knobs of CRO as; Amplitude knob at 10V/div & Time base knob at lm sec/div.
Observed output pulse train of width = 200µs.

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Conclusion:

1) Monostable shows that it remains stable in only one State. This state may he changed by application
of a trigger pulse.

2) The output pulse width does not depend of amplitude of trigger pulse and to duty cycle of input square
wave for 10Hz to 3.2 kHz frequency range only.

b) Monostable Multivibrator (One Shot) By Transistor

Theory: monostable multivibrator is squasi-stable state and one shots state means has only one stable
state.

Objective: to study a Monostable Multivibrator. Observe and draw out from transistor amplifier
panel/11

Equipment’s required

DC Power Supply +5V, CRO, Generator TTL o/p, Panel No.p11.

Procedure:

1. Construct Monostable Multivibrators circuit follow fig.

Fig.4.12. 2 monostable multivibrator

2. 5V(+F)- connect in to 1, 5V(-) connect in to 2, FG(O/P) connect in to 11, FG(GND) connect in to

15,CRO(I/P) connect in to 12, CRO(GND) connect in to 2 OR- connect in to 15.

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3. Put selector switch to Monostable position. Connect were supply and switch it on. Apply input signal
from function generation (0.1 Hz, TTL Level) to the input of monostable observe out phase by180̊.

Result:

Monostable shows that it remains stable in only one state(one transistor on and other off). This state may
be changed by application of a trigger pulse.

Change in state is temporary for a predetermined time (depends on RC time Constant) and returns to
original state.

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c) Bistable multivibrator (block register or memory device) by op amp

Theory: A Bitable multivibrator circuit generates square wave has two stable states. The circuit can
be flipped from one state to other by an application of external trigger pulse. Such a circuit is
important as the fundamental building block of a register or memory device. This circuit is also known
as a flip-flop.

states at the output (+Vsat and -Vsat) are stable states. i.e. threshold voltage(at non-inverting terminal)

Objective: to construct and observe Bistable Multivibrator waveforms from op amp panel/16

Material and equipment Quantity

4. Master unit panel ……………………………………….….1

5. kit P/16 ………………………………………………….…1
6. Variable voltage source 0-15v …………………….………. 2
7. wiring cable …………………………………………….…..needed
8. Multimeter ……………………………………………….....1
9. Feedback resistor, compacitor &diode……………… ……...needed shown on fig.
10. Dual Constant Power supply ±12V(or on master unit) ….....1
11. Function Generator…………………………………………..1
12. CRO Dual Trace. ……………………………………….……1

Procedure:

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1. The connecting circuit diagram of Bistable multivibrator is given below.

Fig.4.12. 3 b Bistable multivibrator

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, FG(o/p)- connect in to 15,FG(Gnd) connect in
to 67, 14- connect in to 29,28- connect in to 66,31- connect in to 66,30_ connect in to 33, CRO (I/p)
- connect in to 32, CRO (GND) connect in to 67.

3. Connection of circuit should be in the to use the panel in Bistable ‘node. Set function generator

4. A negative going pulse at input side will switch the circuit on to the positive saturation voltage (+Vo
sat) and a positive going) pulse will switch it into negative state (-Vo set), because input is applied to
inverting terminal of op-amp.

5. When input signal changes from +5.5V to -5.5V, then voltage atpin-2 of 1C741 becomes +11V and
at this time voltage at pin-3 is -5.5V due to these output goes to its maximum value in negative.

6. Which are the two stable states of Bistable multivibrator?

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Result :

Time Constant (R7C2) = (1*103)*(0.l*l0-6)=100µs.

Conclusion:

1) Bistable multivibrator will remain in either state indefinitely, these states are positive and negative
saturation voltages (i.e. ‘+Vo sat’ and ‘—Vo sat’) of the Op-amp operating with the given supply
voltage.

2) Show the states of circuit can be changed by an application of external event or trigger.

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d) Bistable Multivibrator By Transistors

Theory: Two transistor. Fixed DC Regulated power supply of 5 volts to start ON the with function
generator circuit. combination of 5 resistances and 2 capacitors for biasing the circuit &2 LED and 2
normal diode taking output.

Objective: to contract and Bistable Multivibrator observe waveforms from transistor amplifier
panel/11

Equipment’s required

1. DC Power supply +5 2. CRO. 3. Function Generator TTL o/p. 4. PanelNo.Pl1.

Procedure

1. Connect follow Fig: 4.12d Bitable Multivibrator

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Fig.4.12. 4 Bistable Multivibrators

2. 5V (+)-connect in to l, 5V (-)-connect in to 2, FG (O/P)- connect in to 4, FG (GND)- connect in to 7,

CRO (I/P)- connect in to 5, CRO (GND)- connect in to 2 OR 7.

3. Put selector switch to Bistable. Connect 5V Power supply to the Panel. Switch on the Power Supply.
Observe the LEDs at collector of two transistors. LEDs indicate one transistor An and other is off.
This is the Bistable steady state Condition.

4. However, in practice the OFF LED will never be fully OFF, as it finds a current path through 4.7K
resistor & base of other transistor. However, it will be glowing dimly due to only flowing through it.

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5. Apply TTL level square wave signal of i/p 5V, i/p Fre100Hz to 450Hz check o/p for division of 2 on
CRO & observe waveforms at collector and base of one transistor .

6. Owing RC time constant of R & C (at base) & gain of transistor conditions becomes critical. If supply
is being shorted, connect GND).

7. you will still see the waveform. (Only one transistor collector and base are brought on banana socket,
other transistor waveforms are identical with phase difference of 180̊). Draw the input and collector,
base waveforms.

Conclusion

1) Bistable gives output at collector of transistor and frequency of output is half the input frequency i.e.
bistable divide input frequency by two (divide by 2).

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e) Astable Multivibrator (Measure Frequency) By Transistor

Theory: astable multivibrator in which the circuit is not stable in either state it has continuously
square wave oscillates from one state to the other.

Objective: to construct astab1e Multivibrator and observe collector and base waveform and to
measure frequency of output.

Equipment’s require:

DC Power Supply 5V, Master unit ,CRO and Panel No.p1l.

Procedure

1. Put selector switch to Astable position. Connect Power Supply to panel Switch on the power supply.

2. Observe the two LED of multivibrator. LEDs turn on & off, turn by turn at a fixed period.

3. Observe the waveforms of base and collector of the transistor (provided on terminals) on CRO.

4. Transistor waveform similar but out of phase by 180̊. Measure the frequency. Observe the effect of
variation in supply voltage frequency. Fig.4.12c Astable Multivibrator.
𝟏
F = Frequency= 1.4 R C

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Fig.4.12. 5 c Astable multivibrator

5. +15V (+)connect in to 1, 15V (-)-connect in to 2, CROI/P)connect in to 19, CRO (GND)- connect in
to 2.

Conclusion:

1) Circuit oscillates and gives square wave at output (collector). Observe on CRO with time/div
0.2sec/div only, slow frequency facilitates easy viewing on LED and you do not needed CRO.

2) Frequency is dependent an R, C and supply voltage. Vary the supply and observe the changes in
frequency.

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4.13: Dead Band (zone) circuits

Theory: Dead band (zone) circuits are precision rectifiers with biasing (reference). These circuits can
be constructed to give negative, positive and both negative — positive o/p band. A dead band or dead-
band (also known as a dead zone or a neutral zone) is a band of input values in the domain of a transfer
function in a control system or signal processing system where the output is zero (the output is 'dead'
no action occurs).

Objective: to construct a band (zone) circuit and its desired response circuit band .

Material and equipment Quantity

1. Master unit panel ……………………………………….….1

2. kit P/16 ………………………………………………….…1
3. Variable voltage source 0-15v …………………….………. 2
4. wiring cable …………………………………………….…..needed
5. Multimeter ……………………………………………….....1
6. Feedback resistor, compacitor &diode……………… ……...needed shown on fig.
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. ……………………………………….……1

Procedure

1. Construct a dead zone circuit as shown in fig.4.13 on panel no.P16. This circuit gives positive O/P.

2. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, 15V(+) connect in to 4,15V(COM) connect in
to 65,FG(out) connect in to 6,FG(GND) connect in to 65,8 connect in to 58,60 connect in to 28,29
connect in to 33,19 connect in to 66,30 connect in to 66,59 connect in to 23,25 connect in to
60,CRO(IN)connect in to 32,CRO (GND) connect in to 67.

3. Connect ±12V power supply, a variable power supply 0-15V as reference voltage and a function
generator O/P (1 KHz, 5V P-P) as shown in fig.

4. Connect CRO to monitor input and O/p waveforms.

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5. Observe and note down o/P waveforms in comparison with input waveform when reference voltage
are 0,1V, 2V& 3V.

6. You may construct a dead Zone Circuit giving positive O/P on panel no. P 16 using wiring seq. given
and repeat the same produce as above.

A)

Fig. Dead band circuit with negative o/P

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B)

Fig. Dead band circuit with positive o/P

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C)

Result:

Graph of Waveform for Dead zone

Conclusion

1) Dead zone or Dead band circuit allows an O/P above o/P below Positive or negative reference voltage
respectively.

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4.14 Window comparator

Theory: A Window Comparator is basically the inverting and the non-inverting comparators above
combined into a single comparator stage. The window comparator detects input voltage levels that
are within a specific band or window of voltages, instead of indicating whether a voltage is greater or
less than some preset or fixed voltage reference point.

Window comparator circuit use to know whether the input voltage falls within a given range it
requires three inputs: A low reference voltage (Vrefl), a high reference voltage (Vref2) and input
voltage (Vin).

The output of window comparator will be +ve voltage only if the input voltage is greater than low
reference voltage and less than reference voltage [i.e. Vref2 <Vi/p < Vrefl].

If the I/P voltage is less than low reference OR if the I/P voltage is greater than high ref voltage the
output will be zero.

Objective: To construct circuit and determine input voltage range using window comparator Circuit
Diagram

Material and equipment Quantity

1. Master unit panel ……………………………………….…....1

2. kit P/16 ………………………………………………….…..1
3. Variable voltage source 0-15v …………………….……….. 2
4. wiring cable …………………………………………….…..needed
5. Multimeter ……………………………………………….....1
6. Feedback resistor, compacitor &diode……………… ……...needed
7. Dual Constant Power supply ±12V(or on master unit) ….....1
8. Function Generator…………………………………………..1
9. CRO Dual Trace. ……………………………………….…...1

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Procedure

1. Connect following figure in p/16

2. Connect the circuit as shown in wiring sequence.

3. Give the supply Of Vrefl, Vinput voltage from 0-15 variable supply of standalone provided. Give
Vref2 from external DC power supply.

Fig.4.14. 1 Window comparator circuit

4. master unit output voltage (-12v) connect in to kit/16 pin 1, master unit output voltage (+12v) connect
in to kit/16 pin3, any ground connect in to kit/16 pin2, Vre (2) connect in to 19, 21- connect in to 29.
Vref(1) connect in to 29, 8 connect in to 30, 28 connect in to GND,41 connect in to 32, Vi/p- connect
in to 8, Vout connect in to 48, Vref(1)( GND) connect in to Vref2 (GND) connect in to Vi/p, GND
connect in to 28.

5. Note down output voltage Vout at BSS-NO. 48 on DMM and fill the reading as per observations
table.

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Result: Table 4.14. 1 Observation

V(highRef2 V(low ref1) Vi/p Vout
DC supply)
12V 8V 11V High +
12V 6V 10V High +
12V 10V 5V Low-
12V 10V 14V Low-

Conclusion:

1) Window comparator circuit used to determine whether the input voltage falls within a given range.

O/P voltage will be high, if V high ref Vi/p>Vlow ref.

O/P voltage will be low, if Vi/p<V Iow ref. ,Vi/p>V high ref.

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Experiment 5:Oscillators (OTL) amplifiers

5.1 High frequency response Oscillator of transformer

Theory: High frequency response of transformer coupled push pull power amplifier is limited.
This limitation can be overcome by eliminating transformer (inductance element) from amplifier, to
the amplifier I/P.

Objectives: To Identify& OTL amplifier circuit. You will be able to test the same on frequency
Parameter

Equipment required:

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter 0-20V

5. Panel No.P35.

6. DC current meter.

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Procedure:

1. Connect follow figure OTL amplifier.

Fig.5.1. 1 OTL Amplifier

2. +12V- connect in to 1, GND- connect in to 2 ,12V- connect in to 3, Variable) C- connect in to
4,VM(+)connect in to 4,VM()connect in to 15,VM(+)connect in to 5, VM(-)connect in to 6.

3. Circuit shown in fig. is an OTL amplifier Study the Circuit fù1Iy. Same circuit completely assembled
is provided on panel P35.

4. You are required apply required DC supply & Sinusoidal all the connection as Shown in fig. Connect
DC supply ± 12V the panel.

5. Apply variable DC voltage as I/P to the amplifier & observe the DC voltage at o/P on the DMM as
shown in the table

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Table: p35.5.1 Observation Table

I/P at O/p at
BS5no.4 BS5.no.5
-5
-4
-3
-2
0
2
3
4
5
Conclusion:

1) This is typically used as servo amplifiers for driving DC motors. Hence limited in BW (10Hz)

2) Write lab report.

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5.2 Mic preamplifier oscillate

Theory: Panel No. P35 provides hard-wired hardware of Microphone amplifier. You can connect
microphone to the amplifier input through Earphone socket.

Objectives: test a Mic Preamplifier oscillation circuit.

Equipment required:

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter 0-20V

5. Panel No.P35.

6. DC current meter.

Procedure

1. Connect Circuit diagram is shown in fig.

Fig.5.2. 1 Mic Preamplifier

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2. +12V- connect in to l, GND- connect in to 2, -12V- connect in to 3, FO (O/P)- connect in to TP10,

CRO(I/P)CHI- connect in to 11,CRO (GND)- connect in to 15, 11- connect in to 24, 6- connect in to
25.

3. To test frequency response of an amplifier makes connect to panel No. P35 as shown in fig. above.
Connect 12V DC supply to the panel. Insert electorate Mic in the earphone socket. Now apply sine
wave of l40mVpp at TP10.

4. Vary the frequency of I/P signal as shown in table (keeping signal amplitude Constant). Note down
the O/P voltage. Observe O/P on CRO.

Table 5.2. 1 Observation table

I/P amplitude at frequency O/p amplitude(pp)
BS5no.TP10 at i/p
140mV 10Hz
140mV 50 Hz
140mV 100 Hz
140mV 500 Hz
140mV 1k Hz
140mV 5k Hz
140mV 10k Hz
140mV 15k Hz
140mV 20k Hz
5. Plot graph of I/P frequency vs O/P voltage. Calculate the gain of amplifier at 1KHz

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5.3 Wein Bridge Oscillator by transistor

Theory: Assembled wein bridge oscillator (transistorized) you is provided on panel no. P35. You are
required connect to DC to the panel & you can measure the frequency of on CRO. Circuit diagram is
shown in fig. below. Set /adjusted for largest undistorted sine wave. When R53 = R59 & C34 = C35
frequency of oscillations.

Objective: To construct wein bridge oscillator with transistor .

Equipment required:

1. DC Power Supply 0-15v 2. Function Generator.

3. CRO. 4. DC voltmeter 0-20V

5. Panel No.P35. 6. DC current meter.

Procedure

1. Connect to flowing diagram Bridge oscillator circuit.

Fig.5.3. 1 wein bridge oscillator circuit

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2. +12V connect in to l, GND- connect in to 2, -12V- connect in to 3, CRO 0/PCH I- connect in to 14,
CRO GND- connect in to 15.

3. Connect 12V DC to the panel no. P35, make the OSC witch on & measure the frequency of
oscillations on CRO. Note down the frequency. Calculate the frequency F= 1/2πRC. R=10K
&C=0.022µF

4. Compare measured frequency with calculated frequency.

Conclusion

1) Measured frequency of Wein bridge oscillator is near to calculated Frequency within component
tolerance limitation (10% for C)

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5.4 Phase shift oscillator

Theory: Panel No. P35 provides complete hardware of phase Shaw oscillator (transistorized) .You
are required to connect DC supply to the panel & measure oscillator frequency on CRO. Circuit
diagram is shown fig.

Objective: To construct & test phase shift oscillator circuit .

Equipment required:

1. DC Power Supply 0-15v 2. Function Generator.

3. CRO. 4. DC voltmeter 0-20V

5. Panel No.P35. 6. DC current meter.

Procedure

1. Connect to flowing circuit.Fig.5.4. 1 Phase shift oscillator with transistor circuit

2. +12V connect in to 1, GND connect in to 2, -12V connect in to 3, CRO O/P CH 1 connect in to 22,
CRO& GND connect in to 15.

3. Study the circuit of phase shift Oscillator Feedback path network .If C27 =C24= C25 =0.01µF&
R49=R39= R40=15KΩ. if Connect 12V DC to the panel no. P35.Make the Oscillator.
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4. Connect CRO at the output of oscillator & measure the Frequency of oscillation & note down the
same. You can measure Amplitude, Calculate freq.

5. Compare the measured frequency with calculated Frequency.

Result:

Conclusion

1) Circuit produces sine wave output & frequency measured is rear to calculated one.

2) Difference in calculated & measured because of R3 is being parallel due to bias resistor.

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5.5 Hartley Oscillator

Theory:

Hartley Oscillator: This is class Hartley configuration where in the primary of IFT works as two
inductors & capacitor in tank circuit acts as single capacitance element. o/p can be either tapped A
coupled from collector using capacitor or transformer couple using secondary with Vcc connected to
center tap & mutually coupled inductance gives feedback to base.

RF tuned Oscillator: This oscillator is different than Hartley even though same LC components are
used. The change in configuration changes its classification.

Differences: The feedback is tapped from secondary. There is isolation between LC tuned tank
circuit& its feedback. Due to parallel resonance offering maximum impedance collector circuit at
resonance.

Objective: to construct Hartley Oscillator & RF tuned Oscillator and observes output measure
frequency causing maximum gain at feedback given from secondary causes oscillation.

Equipment required:

1. DC Power Supply +5V.

2. CRO.

3. Frequency counters

4. Panel No.Pl1

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Procedure

1. Connect Fig: 5.5-Combined circuit of Hartley Oscillator / RF tuned Oscillator Using SPDT switch .

Fig.5.5. combined circuit of Hartley Oscillator / RF tuned Oscillator

2. For Hartley Osc: 5V(+)connect in to 1, 5V(-)-connect in to 2, CRO(I/P)- connect in to 3,
CRO(GND)- connect in to 6, Keep SW2 left side .

3. For RF tuned Osc: Connections same as above keep SW2 right side.

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4. Selector switch to Hartley / RF tuned Oscillator position. This Connects +5v supply to oscillator Vcc.
Set SW2 Rt (right) to select RF tuned & Lf (left) for Hartley as per following table.

Table 5.4. 1 Observation Table

name SW2 frequency

Hartley left
osci

RF tuned right
osci

1
Frequency= 2𝜋√𝑙𝑐

5. When selector switch positioned to a Hartley oscillator circuit then the check output of Hartley
Oscillator is

a) Sine wave

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b) No output

e) Square wave

d) Unipolar half wave

6. Connect C.R.O. to the output terminals of Hartley oscillator.

7. Observe the wave shape and measure and record the frequency of oscillations.

8. Measure (You can measure the frequency using frequency counter also) the frequency.

Conclusion

1) The circuit works as oscillator i.e. it gives out sin wave output without any input.

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5.6 Colpitts Oscillator

Theory: It consists of a tank circuit which is an LC resonance sub circuit made of two series
capacitors connected in parallel to an inductor and frequency of oscillations can be determined by
using the values of these capacitors and inductor of the tank circuit. It is basically a harmonic
oscillator, which has a lot of applications. The Colpitts oscillator can be realized using valves,
transistors, FETs or op-amp. Main advantage of Colpitts oscillator over Hartley oscillator is the
improved performance in the high frequency region. This is because the capacitors provide a low
reactance path for the high frequency signals and thus the output signals in the high frequency domain
1 𝑐1∗𝑐2
will be more sinusoidal. Frequency= 2𝜋√𝐿𝐶 , C= 𝑐1+𝑐2

Objective: to construct oscillator circuit and observe output and measure frequency.

Equipment required:

1. DC Power Supply +5V. 2. CRO. 3. Frequency counters . 3. Panel No. Pl1.

Procedure:

1. Connect bellow figure Colpitts Oscillator.

Fig.5.6. 1 Colpitts Oscillator.

2. 5V(+)connect in to l, 5V(-)-connect in to 2, CRO(I/P)- connect in to 9, CRO(GND)- connect in to 13.

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3. Put selector to Colpitts oscillator position. Connect 5V supply to the Panel switch on the power
supply.

4. Connect to the output of Colpit’s oscillator and observe the output sure the frequency of oscillator
record. For preciseuency measurement use frequency counter. Calculate frequency of oscillation.

Result:

1) Colpitts is an LC oscillator with tap on capacitor.

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5.7 Crystal (Pierce) Oscillator

Theory: A crystal oscillator is an electronic oscillator circuit that uses the mechanical resonance of a
vibrating crystal of piezoelectric material to create an electrical signal with a constant frequency. This
frequency is often used to keep track of time, as in quartz wristwatches, to provide a stable clock
signal for digital integrated circuits, and to stabilize frequencies for radio transmitters and receivers.

Objective: At the crystal (Pierce) oscillator observe output, measure frequency, and observe the
effect of variation in supply voltage on frequency.

Equipment required:

1. DC Power Supply +5V.

2. CRO.

3. Frequency counters

4. Panel No .Pl11.

Procedure:

1. A Colpitt’s circuit is used in which crystal is connected in place of an inductor. Study the circuit
shown below.

Fig.5.7. 1 Crystal (Pierce) Oscillators

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2. 15V (+)connect in to 1, 15V (-)-connect in to 2, CRO (I/P)- connect in to 17, CRO (GND)- connect
in to 20.

3. Put selector switch to crystal oscillator position.

4. Connect to the output terminals and a variable power supply to the panel. (Adjust 5V before
connection and switch it off). Here variable supply is recommended to check frequency stability with
respect to supply variation.

5. Now switch on the power supply and observe the output waveform on CRO. For precise measurement
of frequency, connect a frequency counter to the output of oscillator.

6. Measure and record frequency. Frequency observed = f = …………MHz

f crystal−f observed
%error = f crsytal

Conclusion:

1) Observation shows stable frequency o/p with little or no variation in output frequency of oscillator.

2) Write lab report.

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5.8 Clapp Oscillator and Twin T Oscillator

Theory:

Part 1) Clapp oscillator: This is similar Colppit’s oscillator circuit. Difference is the use of series
L-C circuit in place of purely L (inductor). The Clapp oscillator is an LC electronic oscillator that
uses a particular combination of an inductor and three capacitors to set the oscillator's frequency. LC
oscillators use a transistor (or vacuum tube or other gain element) and a positive feedback network.
The oscillator has good frequency stability.

Part 2) Twin T Oscillator: Another R-C oscillator other than Wein Bridge & Phase Shift Oscillator
is Twin T Oscillator. As name suggests. Circuit of Twin T Oscillator consists of two T’ networks in
the feedback path. Rl, R2 & Cl form first LPF network. C2. C3 & R3 form another HPF network.
Both the networks are symmetrical type i.e.R1, R2 for first network & C2C3 for other network. Study
the diagram as shown below. By appropriately selecting components such that cut off (-3db) of HPF
is higher than that of LPF, you will create a Notch filter thereby only allowing narrow band of
frequencies to pass from o/p to i/p as feedback where the transistor can oscillate i.e. total phase shift
is 360̊ & at unity gain. The simple feedback from o/p to i/p will saturate the amplifier; which is also
contributing 180̊ inversion hence a notch should provide 180̊ phase shift at the point of oscillation &
attenuates o/p to make it unity gain.

Objective : To study Clapp oscillator and Twin T oscillator & observe output and measure the
frequency of oscillations.

Equipment required:

1. DC Power Supply +5V.

2. CRO.

3. Frequency counters.

4. PanelNoPl1.

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Procedures:

1. Connect Fig 5.8.1: combined circuit of Clapp Oscillator & Twin T Oscillator Using DPDT switch

Fig.5.8. 1 combined circuit of Clapp Oscillator & Twin T Oscillator

2. wiring sequence of Clapp :5V (+)connect in to l, 5V (-)-connect in to 2, CRO (I/p)- connect in to
10, CRO (GND) - connect in to 14, Keep SW1 left side & SW3 right side .

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3. for Twin T Oscillator Connection are same as per above. Keep W1 right side & SW3 left side.

4. Put rotary selector switch to clapp / Twin T oscillator position. Switch connects +5V supply to the
Vcc of oscillator.

5. There are two slide switches, SW1 (DPDT) as feedback network selector & SW3 (SPDT) sets gain
(A) of amplifier, Twin T needs higher gain.

Table 5.8. 1 Observation Table

name SW1 SW2 Sw3 frequency

Clapp osc left Right right 5KHz

Twin T osc right left left 1.25KHz

Connect CRO at the output of oscillator and observe output. Measure and record the output frequency
on CRO or frequency counter.

Frequency of Oscillation for Clapp oscillator,

1
F=Frequency= 2𝜋√𝐿𝐶

Frequency of Oscillation for Twin T Oscillator,

𝟏
F = Frequency= 𝟐𝝅𝑹𝑪

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Conclusion:

1) Clapp Circuit oscillates and gives sinusoidal output Due presence of series capacitor, frequency of
oscillation shift upwards than what is given by formula.

2) Frequency of Twin a T oscillation depends on the Values of T network components as well as gain
of Amplifier, which stabilizes the oscillation point on negative scope of notch characteristics.

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5.9 Block oscillator at transistor

Theory: A single transistor & Audio transformer is used to Feedback required is taken from same
load is driven. In this unit, a transformer commonly used amplifier is used, so that a speaker can be
connected as Panel no. P35 provides as assembled oscillator circuit as shown in fig. & a speaker.

Objective: To study block oscillator circuit & you can observe the O/P as speaker.
Equipment required:

1. DC Power Supply 0-15v. 2. Function Generator. 3. CRO. 4. DC voltmeter 0-20V

5. Panel No.P35. 6. DC current meter

Procedure:

1. Connect to circuit to fig. 5.10. 1

Fig.5.10. 2 blocking oscillator.

2. +12V- connect in to 1, GND connect in to -2, -12V- connect in to 3, 17- connect in to 24, 18- connect
in to 25, CROI/P CH 1- connect in to 24, CRO GNI)- connect in to 25.

3. Circuit diagram shown in fig. above. Connect speaker to terminals (transformer secondary) & CRO
across it (speaker).

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4. 12V DC supply to the panel. Put the supply switch for keeping oscillator on. You can hear an audio
note from speaker.

5. Can observe the o/P waveform on CRO & you can measure frequency.

Conclusion: Blocking oscillator in a single device power oscillator, which can drive loads like
speaker.

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Experiment 6: Class (switching) amplifier

6.1 Class A amplifier

Theory: Here transistor is biased such that it conducts ail the gives faithful reproduction of input, is
classified as amplifier. Class A amplifier conducts for 360̊ of input cycle. Hence output is magnified
replica of input (but one of 180̊ .When no input Is connected from FG the output stand midpoint of
supply voltage (i.e. 4V here) The value of R selected that very small voltage is dropped across it when
Current flows through it thus leaving maximum margin for V swing both sides.

Objective: To construct and observe working of Class A amplifier circuit. To calculate efficiency of
class A amplifier.

Equipment required.

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter 0-20V.

5. Panel No.P9.

6. DC current meter.

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Procedure

1. Identify the circuit on module no.9 as shown below as show makes connections as in diagram below.

Fig.6.1. 1 Class A amplifier

2. 15(+)-connect in to AM (+ve), AM (-ve)- connect in to 10,15V (COM) - connect in to 11, FG (I/p)-

connect in to 12, FG (GND) connect in to 13, CRO (I/P) connect in to 16, CRO (GND)- connect in
to 15, 19- connect in to 17 , Load 16-connect in to 46,15- connect in to 47.

3. Switch on the power supply. Apply volts as Vs. Before connecting FG on input measure voltage level
at the output of amplifier. This is its quiescent state.

4. Note down this steady state Voltage (Voss) = 4.32

5. a) Determine voltage across RE. (V RE)= Voss *RE/1.8. In this pane1 Voss 4.32V and RE=200Ω.

6. Determine maximum voltage Swing Possible at Vopp without saturation (Assuming minimum
Voltage drop across not saturated transistor to be=0.5V).

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Result: Table 6.1. 1Draw the observation table

Load Vs Is Pin Vopp Vorms Pout Efficiency%

K V mA V
ohm
1 8
2 8
4 8
6 8
8 8
10 8
12 8
14 8
16 8
18 8
22 8

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6.4 Class ‘AB’ (Switching) Amplifier

Theory: Transistor is biased such that it conducts above 180̊ and gives faithful reproduction of input,
is classified as class AB amplifier.

Efficiency of class AB amplifier is less than class B. To minimize cross over distortion, the transistor
must operate in a class AB mode. Here a small standby current flows at zero excitation. Class AB
operation results in less distortion than class B.but the price, which must be paid for this improvement,
is a loss in efficiency. Use following equation for calculation.

Objective: To construct and observe working of Class AB amplifier circuit. To calculate efficiency
of class AB amplifier.

1. Vo rms =Vopp/2sqr2 , Where Vopp peak-to-peak voltage across RL as seen on CRO.

2. Input power to amplifier (Pin) = Vs*I s

3. Output power (Pout) =(vo rms)2/RI=(VOPP)2/8RI

4. (%)=po/pin*100

Equipment required

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter O-20V

5. Panel No.P9.

6. DC current meter.

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1. Locate the (class AB amplifier circuit on line no.P9 Connect the test set UP as shown in the diagram
below. Keep switch SWI in up position. (down position is for class B)

Fig.6.1. 2 Class AB Amplifier

2. 15v (+)-connect in to 35, 15v (com) connect in to 36. FG (I /P)- connect in to 33, CRO (I/P)- connect
in to 37, CRO (gnd) connect in to 39. SW1- up.

3. Switch on the power supply and adjust voltage to 6 volts. Connect signal to the input from function
generator arid observe the output on CRO.

4. Adjust input level to get maximum output (pit without Clipping. Typically it is I KHz, 5Vpp Measure
supply current (Is).

5. Measure and record output Voltages (Vopp). Observe and draw input and output waveform

6. Calculate total I/P power O/P power and efficiency of Class AB amplifier.

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7. A) Efficiency Verses Load Measure and record input which is set constant amplitude and observe
output waveform on dual trace CRO simultaneously observe change in output waveform while
varying the load using 25-ohm pot in steps of 2 ohm.

Note down value of load when efficiency is maximum.RL=13Ω.

Result: Table 6.1. 2 Observation table

Load Vs Is P Vopp Vorms Pout Efficiency%

K V mA
ohm
25 6
22 6
20 6
17 6
8 6
10 6
15 6
13 6

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2. (B)Frequency Vs Output voltage Keeping amplitude of FG consl4n( i.e. 5Vpp ‘ its frequency 1Hz to
3Hz and noise down Vopp in another table and determine 3db bandwidth Definition of 3 db
BW=Diftcrence in to frequencies where .O/P drops to 0.707 of Vopp .

Table 6.1. 3 Observation table

frequency Vopp
Hz V
1k 8
10k 6
100k 6
300k 6
400k 6
600k 6
800k 6

db Bandwidth= F2-F1.

Conclusion:Efficiency of Class AB amplifier is less than class B amplifier and class AB

operation results in less distortion than class B amplifier.

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6.2 Class B (Switching) Amplifier

Theory: Class B amplifier is the circuit in which amplifier conducts only for I W of m put cycle.
Biasing is adjusted conducts only for half cycle of the input.

Use following equation fol calculation: Vrms= Vopp/2sqr2. Where Vopp =peak-to-peak voltage
across Rl. as seen cm CRO).

Objective: To construct and observe working of Class B amplifier circuit. To calculate efficiency of
class B amplifier.

Equipment required

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter O-20V

5. Panel No.P9.

6. DC current meter.

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Procedure

1. Identify the circuit of Class B amplifier on Panel no. P9.Make all connect on as shown in diagram
below.

2. Keep switch SW1 in down position. (Up position is for class AB)

Fig.6.1. 3 Class B Amplifier

3. 15v(+)-connect in to 35,15v(-)-connect in to 36,FG(I/P) connect in to 33,FG(GND)- connect in to
34, CRO(1/P)- connect in to 37, CRO(GND – connect in to 39,SW1- down.

4. Switch on the power supply and adjust voltage to 6 volts.

5. Connect signal to the input from function generator and observe the output on CRO. Adjust input
level to get maximum output without clipping.

6. Typically it is 1 KHZ, 2.5Vpp Measure supply current (Is). Measure and record output Voltages
(Vopp).

7. Observe and draw input and output waveforms Calculate total I/P power O/P Power and efficiency
of Class B amplifier.

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8. (A) Efficiency Vs Load Measure and record input which ¡s set constant amplitude and observe output
waveform on dual trace CRO simultaneously observe change in output waveform while varying the
load using 25 ohm pot in steps of 2 ohm.

9. Fill the table given below and plot the graph. Note down value of load when efficiency is maximum
RL=13Ω.

Result: Table 6.1. 4 Observation table

Load Kohm Vs(V) IsmA Pin Vopp VoRms Pout Efficiency%

25 6
22 6
20 6
17 6
8 6
10 6
15 6
13 6
12 6

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10. (B)Frequency Vs Output voltage. Keeping amplitude of FG constant at 2.5, Vpp vary its frequency
from 10Hz to 3MHz, note down Vopp in another table, and determine 3db bandwidth Definition of 3
db BW. Difference in two frequencies where O/P drops to 0.707 of Vopp (Max)

Conclusion:Class B Amplifier is capable of as power efficient is higher than class A

amplifier or Class AB.

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6.3 Class ‘C’ Amplifier

Theory: Class C amplifier is the circuit in which amplifier biased such that it conducts for less than
180̊ of input cycle (vi small portion of input signal cycle). Hence, efficiency of class amplifier is high.

Class C amplifiers arc used where high power is require (e.g. Radio transmitters and where efficiency
is main criteria. The air core coils arc designed for work around 300 KHz-400 KHz.

Objective: To construct and observe working of Class C amplifier circuit. To calculate efficiency
of class C amplifier.

Equipment required

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter O-20V

5. Panel No.P9.

6. DC current meter.

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Procedure

3. Locate the (class C amplifier circuit on Panel no.P9 connect the test set up as shown in the diagram
below.

Fig.6.1. 4 Class ‘C’ Amplifier

4. 15V(+)connect in to 40, 15V(GND) connect in to 41, FG(1/p) connect in to 3,(GND) connect in to

43, CRO(l/P) connect in to 44, CRO(GND) connect in to 45.

5. Switch on the power supply. Adjust supply voltage to 8Vt to exceed 12V).

6. Efficiency Verses Load Now Connect input signal of from FG 300 KHz, 5Vpp and is level to get
maximum output without clipping.

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Result: Table 6.1. 5

Load VsV IsmA Pin Vopp Vorms Pout Efficiency%

K
ohm
500 8
400 6
300 6
200 6
100 6
50 6
30 6

7. Increase input signal voltage and observe output voltage put voltage will rise up to certain limit only;
further increase in voltage will be in effective. Note down the maximum active input voltage to get
maximum Output (his is the ration of amplifier)

8. Draw (he input & Output waveforms the table below and plot the graph. at l00 ohm.

9. Frequency verses output voltage 5Vopp vary frequency 1 KHz to 1MHz Vopp in Another table
determine bandwidth.

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Table 6.1. 6

frequency Vopp
Hz V
1k 8
10k 6
100k 6
300k 6
400k 6
600k 6
800k 6

graph find out following Bandwidth F2-f1

Conclusion

Class C amplifier used above can deliver high R.F.to low load resistance Efficiency of class C
amplifier.

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6.4 Class ‘D’ (Switching) Amplifier

Theory: Class D amplifier is an Switching amplifier. The both transistors act like ON and OFF switch
alternately. One transistor is ON at one time simultaneously the other is OFF. So that input for class
D

Amplifier is PWM (Pulse width modulated). The output of an amplifier is then filtered to suppress
carrier and to extract modulating input signal. LPF does two functions. It removes carrier frequency
of 45 KHz and extracts input modulation waveform PWM by LPF.

Equation for calculation

1. Vo rms Vopp/2*sqr2 Where Vopp peak-to-peak voltage across RL as seen on CRO.

2. Input power to amplifier (Pin) =Vs*I s

1. Output power (Pout) =(vo rms)2/RI=(VOPP)2/8RI

2. η(%)=po/pin*100

Objective: To construct and observe working of Class D amplifier circuit. To calculate efficiency of
class D amplifier.

Equipment required:

1. DC Power Supply 0-15v.

2. Function Generator.

3. CRO.

4. DC voltmeter O-20V

5. Panel No.P9.

6. DC current meter.

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Procedure:

1. Locate the Class D amplifier circuit on Panel no.P9 Connect the test set up as shown in the diagram
below.

2. Keep switch SWI in down position. (Up position is for class AB)

Fig.6.1. 5 Class ‘D’ Amplifier

3. 15V(+)connect in to 35, 15V(com) connect in to 36, FG(I/P) - connect in to 33 ,CRO(I/P) connect in
to 38, CRO(gnd) connect in to 39, SW1 – down.

4. Switch on the power supply and adjust voltage to 8 volts. Connect PWM output function generator
the carrier signal is 4KHz ,8 Vpp and audio signal is I KHz J8Vpp.

5. Observe the Output on (‘RO. Measure supply current (Is). Measure and record output voltages
(Vopp).

6. Observe and draw input and output waveforms. Calculate total I/P power O/P power and efficiency
of Class D amplifier.

7. (A) Efficiency Verses Load Measure and record input which is set constant amplitude and observe
output waveform on dual trace CRO simultaneously observe change in output waveform while
varying the load using 25-ohm pot in steps of 2 ohm.

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8. Fill the table given below and plot the graph using Note down value of load when efficiency is
maximum .RL=l3Ω.

Result: Table 6.1. 7 Observation table

Load Vs Is Pin Vop-p VoRMS=(Vopp)/2sqr2 PoutmW=(Vopp)2/8RL Efficiency%

Kohm V mA Mw=Vi V

25 8
22 8
20 8
17 8
8 8
10 8
15 8
13 8
10. (B)Frequency Vs Output voltage Keeping amplitude modulating signal Constant i.e. l5Vp vary
frequency 100HZ to 4KHz and note down Vopp in another table and determine 3db bandwidth

11. Definition of 3 db BW Difference in two frequency where O/P drops to 0.707 of Vop (Max)

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Table 6.1. 8 Observation table

frequency Vopp
Hz V
1k 8
10k 6
100k 6
300k 6
400k 6
600k 6
800k 6

From the graph find out following.3 db Bandwidth =F2-Fl.

Conclusion: Efficiency of Class D amplifier is better but bandwidth is less.

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References
1. Operational amplifier circuit experiment panel/16,35,11 and 9.
2. OP AMPS Design, Application, and Troubleshooting second edition, by David L. Terrell President
Terrell Technologies, Inc.
3. Feedback amplifiers by , Gaetano Palumbo University of Catania and Salvatore Pennisi University
of Catania, ©2003 Kluwer Academic Publishers.
4. Fundamentals Of Electrical Engineering First Edition By Giorgio Rizzoni
5. Handbook of operational amplifier applications by, Bruce Carter and Thomas R. Brown ,SBOA092B
–October 2001 – Revised September 2016.
6. Fundamentals Of Electric Circuits Third ,Fourth & Fifth Edition By Charles K. Alexander &
Matthew N. O. Sadiku
7. Lessons In Electric Circuits,Volume III– Semiconductors By Tony R.Kuphaldt Fifth Edition,last
update July02,2007 pdf
8. Electronic Devices And Circuit Theory Seventh Edition By Robert Boylestad & Louis Nashelskyp
9. Teach Yourself Electricity And Electronics Third Edition By Stan Gibilisco
10. Electrical Engineering Principles And Applications Fifth Edition By Allan R. Hambley
11. http://www.mechatronics-mec.org/downloads/Concept Electronics II Student Lab Manual.pdf
12. https://en.wikipedia.org/wiki/Operational_amplifier
13. https://www.arrow.com/en/research-and-events/articles/fundamentals-of-op-amp-circuits
14. https://www.alldatasheet.com

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Appendix

Table 1. 4 Open loop gain Observations

NO. Frequency V in V Gain(Av)

(mVpp) out(mVpp)

1 100Hz

2 274Hz

3 500Hz

4 1K

5 1.5K

6 5K

7 7K

8 10K

Table 1. 5 Open Loop Bandwidth Observations

Sr.No. Freq.(hz) I/P O/P Gain= Gain*201 Gain(dB)

VP- VP- vo
vi
P(V) P(V)

1 50 100m

2 70 100m

3 100 100m

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4 150 100m

5 200 0.4

6 500 0.4

7 1k 0.4

8 5k 0.4

9 10k 0.4

10 50k 0.4

11 100k 0.4

12 1m 1

13 2m 1

Table 2.1. 3 Inverting Amplifier (DC) Observations

I/P O/P O/P VOLT

VOLT VOLT RF=4.7KΩ
RF=1KΩ

0 0 0

+0.5 -0.5 -2.4

+1.0 -1.0 -4.8

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+1.5 -1.5 -7.2

+2.0 -2.0 -9.0

+2.5 -2.5 -11.0

+3.0

Table 2.1. 4 Inverting Amplifier (AC) Observations

I/P- O/P
100mVPP (Vp-p)
frequency VOLT

10Hz 0.1

100Hz 0.7

500Hz 2.4

1KHz 4.4

2KHz 8

3KHz 8.4

4KHz 8

5KHz 8

6KHz

7KHz

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8KHz

9KHz

10KHz

Table 2.2. 3 a non-Inverting Amplifier (DC) Observations

I/P O/P O/P VOLT

VOLT VOLT RF=4.7KΩ
RF=1KΩ

0 0 0

+0.5 1 3

+1.0 2 6.4

+1.5 2.9 8.0

+2.0 4.0 11.5

+2.5 4.8 13.5

+3.0

Table 2.2. 4 b none inverting Amplifier (AC) Observations

I/P- O/P
100mVPP (Vp-p)
frequency

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VOLT

10Hz 0.1

100Hz 0.52

500Hz 2.4

1KHz 4.2

2KHz 7.0

3KHz 7.0

4KHz 7.0

5KHz 7.0

6KHz 6.8

7KHz 7.0

8KHz 7.0

9KHz 6.8

10KHz 6.0

The four types of amplifier dependent source—control variable on left, output variable on right

Table 1. 6 Amplifier type Dependent source Input / Output impedance.

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Dependent source Amplifier type Gain Input Output

controlled units impedance impedance
Output
Input

I I Current controlled Current amplifier Unit less 0 ∞

current source, CCCS
I V Current controlled Tran resistance Ohm 0 0
voltage source, CCVS amplifier
V I Voltage controlled Tran conductance Siemens ∞ ∞
current source, VCCS amplifier
V V Voltage controlled Voltage amplifier Unit less ∞ 0
voltage source, VCVS

Op-Amp Internal Circuit in IC-741

Cathode Ray Tube /Oscilloscope(CRT/O)

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Cathode Ray Tube (CRT) Controls:

(1) INTEN Controls the brightness of the trace.

(2) FOCUS Allows for focusing of the trace to the sharpest image.

(3) TRACE ROTATION Potentiometer for aligning the horizontal trace in parallel with the grid
lines. (4) CRT SCREEN For viewing waveform.

Vertical Axis Controls:

(5) CH 1 Vertical input terminal for Channel 1. When in X-Y operation, X-axis input terminal.

(6) AC-DC-GND Selects connection mode between Channel 1 input signal and vertical amplifier.

(7) VOLTS/DIV Selects the Channel 1 vertical axis sensitivity from 1mV/DIV to 5V/DIV in 12
ranges. (8) VARIABLE Fine adjustment of Channel 1 vertical axis sensitivity. When in CAL position,
sensitivity is calibrated to the indicated value.

(9) POSITION Vertical position control of Channel 1 trace.

(10) CH 2 Vertical input terminal for Channel 2. When in X-Y operation, Y-axis input terminal.

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(11) AC-DC-GND Selects connection mode between Channel 2 input signal and vertical amplifier.

(12) VOLTS/DIV Selects the Channel 2 vertical axis sensitivity from 1mV/DIV to 5V/DIV in 12
ranges (13) VARIABLE Fine adjustment of Channel 2 vertical axis sensitivity. When in CAL
position, sensitivity is calibrated to the indicated value.

(14) POSITION Vertical position control of Channel 2 trace.

(15) MODE Selects operation of CH 1 and CH2 CH 1 CH 2 DUAL ADD The oscilloscope operates
as a single-channel instrument using CH 1. The oscilloscope operates as a single-channel instrument
using CH 2. The oscilloscope operates as a dual-channel instrument using both CH 1 and CH 2.
CHOP/ALT are automatically changed by the TIME/DIV setting. The oscilloscope displays the
algebraic sum of the two signals.

(16) CHOP Allows for the two traces to be displayed in the CHOP mode at all ranges.

(17) CH 2 INV The oscilloscope displays the algebraic difference of the two signals when in ADD
mode.

Horizontal Axis Controls:

(18) TIME/DIV Selects the rate at which the waveform is displayed across the CRT screen (sweep
speed).

(19) SWP. UNCAL When pushed in, the sweep time can be made slower using the SWP.VAR
control (20) by a factor of ≥2.5 of the indicated value. When not pushed in, the indicated values are
calibrated.

(20) SWP. VAR Vernier control of sweep time. Allows horizontal time scale to be set in between
the discrete TIME/DIV settings. The indicated values are calibrated when the SWP. UNCAL (19)
button is not pushed in.

(21) POSITION Horizontal positioning control of the trace.

(22) X 10 MAG When button is pushed in, a magnification of 10 occurs on the horizontal scale.

(23) X-Y X-Y operation is enabled when pressed. When in X-Y mode, time is no longer measured
on the X axis. The X axis represents the CH 1 input and the Y axis represents the CH 2 input.

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Trigger Controls:

(24) EXT TRIG Input terminal is used in common for external triggering a signal. To use this
terminal, set SOURCE switch (25) to the EXT position. On this setting, a better-conditioned signal
can be used to trigger the scope while observing a relatively weak signal.

(25) SOURCE Selects the internal triggering source signal. CH1 (X-Y) When the VERT MODE
switch (15) is set to DUAL or ADD, selects CH 1 for the internal triggering source signal. When in
X-Y mode, select CH 1 for the X-axis signal. CH 2 When the VERT MODE switch (15) is set to
DUAL or ADD, selects CH 2 for the internal triggering source signal. LINE Selects the AC power
line frequency signal as the triggering signal. EXT The external signal applied through EXT TRIG
input terminal (24) is used for the external triggering source signal. When in the X-Y mode, the X-
axis operates with the external sweep signal.

(26) TRIG. ALT When the VERT MODE switch (15) is set to DUAL or ADD, and the SOURCE
switch (25) is selected at CH 1 or CH 2, with the engagement of the TRIG. ALT switch (26), CH1
and CH 2 will be alternately selected for the internal triggering source signal.

(27) COUPLING Selects the coupling of the triggering signal to the trigger circuit in accordance
with the characteristics of the measured signal. AC This coupling is for AC triggering which is used
most commonly. As the triggering signal is applied to the trigger circuit through an AC coupling
circuit, stable triggering can be attained without being affected by the DC component of the input
signal. The low-range cutoff is 10-Hz. HF REJ (High frequency rejection) The triggering signal is
fed to the trigger circuit through an AC coupling circuit and a low pass filter (approx. 50- kHz). The
higher frequencies are rejected and only the lower frequencies are applied to the trigger circuit.
(Useful for noise reduction) TV Useful for observation of TV video signals. The triggering signal is
AC coupled and fed through the triggering circuit to the TV sync separator circuit. The separator
circuit picks off the sync signal, which is used to trigger the sweep. Thus the video signal can be
displayed stably. Being linked to the TIME/DIV switch, the sweep speed is switched for TV-V and
TV-H as follows: TV-V: 0.5s – 0.1ms TV-H: 50µs – 0.1µs DC The triggering signal is DC-coupled
to the trigger circuit. This mode is used when triggering is desired with the DC component of the

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triggering signal or when a signal with very low frequency or a signal with a large duty cycle ratio is
needed to be displayed.

(28) SLOPE Selects the polarity of the triggering signal. + Triggering occurs as the triggering signal
crosses the triggering level in a positive-going direction. – Triggering occurs as the triggering signal
crosses the triggering level in a negative-going direction. 8 Others:

(29) LEVEL Displays a stationary waveform and sets a start point for the waveform. The trigger
level changes in the positive direction when the control knob is turned clockwise, and it changes in
the negative direction as the knob is turned counter-clockwise.

(30) LOCK When the LEVEL LOCK switch is engaged, the triggering level is automatically
maintained within the amplitude of the triggering signal, and stable triggering is made without
requiring level adjustment (although jitter may not be suppressed when in the ALT mode).

(31) HOLD OFF Used when the signal waveform is complex and stable triggering cannot be attained
with the LEVEL knob alone.

(32) TRIGGER MODE Selects the desired trigger mode. AUTO When no triggering signal is
applied or when triggering signal is less than 50-Hz, sweep runs in the free run mode. NORM When
no triggering signal is applied, sweep is in a steady state and the trace is blanked out. Used primarily
for observation of a signal ≤ 50-Hz.

Others:

(33) POWER Main power switch of the instrument. When this switch is turned on, the LED (34) is
also turned on.

(34) POWER LED indicating oscilloscope power is turned on.

(35) GND Ground terminal of oscilloscope main frame.

(36) CAL This terminal delivers the calibration voltage of 2-VP-P, 1-kHz, positive square wave. The
output is 2kΩ.

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Basic Operation Before applying power to the oscilloscope, ensure the instrument switch
settings and controls are set to the default settings according to the table below.

After the switches and controls are set to the default settings, connect the power cord to the AC line
outlet and continue as follows.

1. Engage the POWER switch (33) and make sure the power LED (34) is turned on. A trace should
appear on the CRT screen (4) in about 20 seconds. If no trace appears after one minute, double check
the switch and control settings.
2. Adjust the trace with the appropriate brightness and sharpness with the INTEN (1) and FOCUS (2)
controls. NOTE: Set the intensity only bright enough to legibly see a trace. Setting the trace intensity
too high for a long period of time could cause permanent damage to the CRT screen.
3. Align the trace with the horizontal center line of the grid by adjusting the CH 1 POSITION (9) control
and TRACE ROTATION (3) control (adjustable by screwdriver).
4. Align the begining of the trace with the left-most vertical grid line on the CRT screen by adjusting
the HORIZ. POSITION (21) control.
5. Connect a probe to the CH 1 INPUT terminal (5). Make sure the slide switch on the probe is set to
the “X1” position.
6. Connect the probe tip to the CAL (36) terminal.

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7. Set the CH 1 AC-DC-GND (6) switch to AC and release the GND. A square waveform similar to the
one shown in Figure P-6 should now be displayed on the CRT
screen (The vertical lines of a square wave may be invisible on
your screen but you should still be able to view the peaks and
valleys of the waveform). Since the CH 1 VOLTS/DIV (7) is
set to 0.5 V/DIV, we can determine the peak to peak voltage
of the waveform. Each vertical grid square or division
represents 0.5 V. Since the peak to peak waveform is approximately 4 divisions from top to bottom
our peak to peak voltage is 2 volts (0.5-V x 4 divisions = 2-VP-P).
8. Now change the CH 1 VOLTS/DIV (7) setting to 0.1 V/DIV, and set the switch on the Channel 1
probe to X10. You should now be viewing a square wave that is approximately 2 vertical grid squares
(divisions) high. By turning on the probe’s X10 switch, a multiplier of 10 is introduced into the
waveform’s vertical calculation. The peak to peak voltage of the waveform can then be found by
taking the CH 1 VOLTS/DIV setting times a multiplier of 10, times the number of divisions of the
waveform (0.1 x 10 x 2 = 2-VP-P). The X10 setting on the probe is mainly used for increasing the
number of voltage ranges the oscilloscope is capable of measuring, therefore making it a more
versatile instrument. It also allows for viewing waveforms with higher voltage and amplitude that
may otherwise be very difficult to observe.
9. The next step will be to determine the frequency of the waveform. Frequency is equal to the
reciprocal of the period, or the length of time needed to complete one
waveform cycle. With the TIME/DIV (18) set to 0.5-mS/DIV, the
waveform cycle is approximately 2 h orizontal divisions in length.
The period can then be found by taking the TIME/DIV setting times
the number of divisions for one cycle (0.5-mS x 2 = 1-mS). The
reciprocal of the 1-mS period will then be the frequency of the waveform (1/.001-S = 1000-Hz).
10. Now change the TIME/DIV (18) setting from 0.5-mS/DIV to 0.1- mS/DIV. By changing the time
base to a shorter length of time for each division, the waveform, in a sense will appear “stretched
out”. This allows for a more accurate frequency measurement. Each division is separated by 5 smaller
divisions indicated as graticule marks on the middle vertical and horizontal grid lines. Each of these

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marks represents 0.2 of a whole division. For example, if one complete cycle of the waveform being
measured is just short of 10 divisions by an amount of one graticule mark, then you would use the
value of 9.8 {(9.8 divisions) x (0.1-ms/DIV) = 0.98-mS period}. The reciprocal of the 0.98-mS period
would then be 1020-Hz. A more accurate reading of the same input waveform from step 9. NOTE:
For precision and ease of measuring it is common practice to move and align the waveform with the
vertical and horizontal graticule marks on the CRT screen. This is done by turning the VERT
POSITION (9), (14) and the HORIZ POSITION (21) controls. Just as the vertical scale has an X10
setting directly on the probes, the horizontal scale has the X10 MAG (22) switch that can be used the
same way to magnify the amount of time per division by 10 times. Although usually not used as often
as the vertical magnifier, the X10 MAG can be used to examine waveforms with extremely low
frequencies.
11. Set the TIME/DIV (18) back to 0.5-mS/DIV.
12. Set the VERT MODE (15) switch to CH2 and align the trace with the horizontal center line of the
grid by adjusting the CH2 POSITION (14) control.
13. Connect a second probe to the CH2 INPUT terminal (10).
14. Connect the probe tip to the CAL (36) terminal so both CH1 and CH2 probes are connected.
15. Set the CH2 VOLTS/DIV (12) control to 0.1 V/DIV and select X10 on the CH 2 probe.
16. 16. Set the CH2 AC-DC-GND (11) switch to AC and release the GND. You should now see the same
square wave signal as before, the only difference being the input is now on CH2 instead of CH1.
17. Set the VERT MODE (15) switch to DUAL. You should now be able to see the waveforms of both
CH1 and CH2 as shown in Figure P-8. You are able to move the waveform of each channel by using
the corresponding CH1 or CH2 VERT POSITION (9), (14) controls. The DUAL channel mode is
very useful for comparing two different waveforms and to observe such characteristics as phase,
voltage, and frequency relationships between the two waveforms. Obviously in order for an accurate
voltage or amplitude reading, both CH1 and CH2 must be set to the same VOLTS/DIV.
18. Set the VERT MODE (15) switch to ADD. The ADD mode displays the sum of CH1 and CH2 input
signals. As you can see the sum of the two 2-VP-P signals is now displayed as a 4-VP-P square wave.
When using the ADD mode, it is important that both CH1 and CH2 be set to the same VOLTS/DIV.
The ADD mode is mostly used in conjunction with the CH2 INV (17) switch. The CH2 INV switch

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inverts the polarity of the CH2 input only. This allows subtractions to be used (CH1 minus CH2) and
ungrounded voltage drops in a circuit to be determined. For example, in most cases the oscilloscope’s
ground is connected to the signal generator’s ground through the wiring of the power cables and the
building’s receptacle plugs. This restricts the oscilloscope to test only across grounded components.

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