Release Notes For ModelSim Intel FPGA 2020.

Jan 28 2020
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_______________________________________________________________________

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_______________________________________________________________________

Index to Release Notes

* [2]Key Information
* [3]Release Announcements in 2020.1
* [4]Base Product Specifications in 2020.1
* [5]Compatibility Issues with Release 2020.1
* [6]General Defects Repaired in 2020.1
* [7]User Interface Defects Repaired in 2020.1
* [8]SystemVerilog Defects Repaired in 2020.1
* [9]VHDL Defects Repaired in 2020.1
* [10]SystemC Defects Repaired in 2020.1
* [11]Mixed Language Defects Repaired in 2020.1
* [12]User Interface Enhancements in 2020.1
* [13]SystemVerilog Enhancements in 2020.1
* [14]VHDL Enhancements in 2020.1
* [15]SystemC Enhancements in 2020.1
* [16]Document Revision History in 2020.1
_______________________________________________________________________
Key Information
* QSIM-59485 - This release uses new licensing version which needs to
have license servers upgraded to FLEXnet v11.16.4.0.
For floating licenses, it will be necessary to verify that the
vendor daemon (i.e., mgcld) and the license server (i.e., lmgrd)
have FLEXnet versions equal to or greater than 11.16.4.0. If the
current FLEXnet version of your vendor daemon and lmgrd are less
than 11.16.4.0 then it will be necessary to stop your license
server and restart it using the vendor daemon and lmgrd contained
in this release.
If you use node locked licenses you don't need to do anything. This
release will update licensing to MSL v2019_3 with MGLS v9.22_3.1.0
and PCLS v9.22.3.1.0
In summary, this release uses the following license versions:
FLEXnet v11.16.4.0
MSL v2019_3
MGLS v9.22_3.1.0
PCLS v9.22.3.1.0
* QSIM-555 - Systemc/GCC Changes starting 2020.1:
o SystemC/DPI/PLI/VPI/FLI default compiler (GCC) for linux and
linux_x86_64 platforms is upgraded to 7.4.0
o GCC 4.5.0 is no longer supported and it will no longer be
distributed with the release. This affects linux and linux_x86_64
platforms only.
o Supported compilers on linux and linux_x86_64 platforms:
gcc-7.4.0, gcc-5.3.0 and gcc-4.7.4
o Support for the IEEE 1666-2005 SystemC-2.2 standard has been
deprecated and it is no longer supported.
_______________________________________________________________________

Release Announcements in 2020.1

* Due to enhanced security restrictions with web browser PDF
plug-ins, some links do not function. Links in HTML documentation
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Clicking a link within a PDF viewed in a web browser may result in
no action, or it may load the title page of the current PDF manual
(instead of the intended target in the PDF manual). The unresolved
link behavior occurs in all web browsers on Windows and Linux
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PDF manuals is compromised. PDF is ideal for printing because of
its page-oriented layout.
Use the HTML manuals to search for topics, navigate between topics,
and click links to examples, videos, reference material, and other
related technical content.
For information about Adobe's discontinued support of Adobe Reader
on Linux platforms and your available options, refer to Knowledge
Article MG596568 on SupportNet.
Linux is a registered trademark of Linus Torvalds in the U.S. and
other countries.
* Since 2019.1 release, support for Windows 7 and 8.1 have
discontinued. Only Windows 10 is supported. However, we continue to
support Windows 7 & 8.1 with our 10.7 release series until their
planned End Of Life (10.7 EOL - mid 2020)
_______________________________________________________________________

Base Product Specifications in 2020.1

*
[Supported Platforms]
 Linux RHEL 6 x86/x86-64
Linux RHEL 7 x86/x86-64
Linux SLES 11 x86/x86-64
Linux SLES 12 x86/x86-64
Windows 10 x86/x64
[Supported GCC Compilers (for SystemC)]
gcc-7.4.0-linux/gcc-7.4.0-linux_x86_64
gcc-5.3.0-linux/gcc-5.3.0-linux_x86_64
gcc-4.7.4-linux/gcc-4.7.4-linux_x86_64
gcc-4.2.1-mingw32vc12
[OVL (shipped with product)]
v2.8.1
[VHDL OSVVM (shipped with product)]
v2014.07
[Licensing]
FLEXnet v11.16.4.0
MSL v2019_3
MGLS v9.22_3.1.0
PCLS v9.22.3.1.0
_______________________________________________________________________

Compatibility Issues with Release 2020.1

User Interface Compatibility

* QSIM-18738 - (results) Fixes corner cases that were causing the
Colorize system in the Transcript window to malfunction for some
customers. Using a color of 0 (Normal) now works as a Start Tag.
Also, having an End Tag on another line from its matching Start Tag
now correctly cleans up the color escape sequence.

SystemVerilog Compatibility
* QSIM-57185 - (source) Added checking for packed array of time.
Packed arrays of time are not allowed as per LRM. We were not
checking for it in the tool but now we have added the check. So,
the packed array of time will result in compiler error. The users
need to convert the packed array to unpacked to use arrays of time.
* QSIM-53731 - (source) Macros and symbols defined (with `define) in
source files compiled because of -v and -y will no longer persist
after the -v and/or -y context is finished with. Use -svext=+dvydl
to reenable the old buggy behavior of leaking such macros/symbols.
* [nodvtid] - (source) When a macro definition is found after a
pre-processor conditional compiler directive and they share the
same line in an HDL file emit a suppressible error. This will guide
users to create portable code that will behave similarly across
different implementations.

VHDL Compatibility
* QSIM-52747 - (source) Fixed an issue where forward type
declarations could allow compilation of illegal redefinitions. It
is now illegal to declare multiple forward type declarations for
the same symbol (see VHDL-2008 5.4.2).
* QSIM-56691 - (source, results) Following execution of
uninstantiated procedures with OUT mode parameters not associated
with a type generic, and evaluation of generic procedures with OUT
mode parameters not associated with a type generic, actual
variables associated with the OUT parameters could be left
unchanged despite changes within the procedures. The compiler is
now generating code to correctly set the value of OUT mode
parameters in the above cases.
 * QSIM-58539 - (results) The attributes INSTANCE_NAME and PATH_NAME,
were not considered globally static. If the prefix of the attribute
is a signal and this expression appears in a wait statement with an
on clause or in a concurrent statement other than a process, a
change in signal value would trigger a evaluation of the wait or
concurrent statement. This currently results in extra statement
executions. The attributes are now considered globally static, so
the wait or concurrent statement is no longer sensitized to that
prefix. This change can cause simulation results to be different
from previous versions.

SystemC Compatibility
* QSIM-555 - (source) SystemC/DPI/PLI/VPI/FLI default compiler (GCC)
for linux and linux_x86_64 platforms is upgraded to 7.4.0
Supported compilers: gcc-7.4.0, gcc-5.3.0 and gcc-4.7.4 for linux
and linux_x86_64 platforms
* QSIM-57618 - (source, results)
Support for the IEEE 1666-2005 SystemC-2.2 standard has been
deprecated and it is no longer supported.
* QSIM-57618 - (source, results) GCC 4.5.0 is no longer supported and
It will no longer be distributed with the release. This affects
linux and linux_x86_64 platforms only.
_______________________________________________________________________

General Defects Repaired in 2020.1

* [nodvtid] - vmake many now consume less memory.
* VM-11516 - Removed enforced addition of "/bin" to PATH in vco
wrapper script.
* QSIM-55252 - The vdir command can now be given the name of an
already-existing directory; it will transform the directory into a
Questa library. The directory must be empty for this to succeed.
* QSIM-55060 - Running vopt to re-generate an existing optimized
design after the work library had been moved in the file system
would sometimes produce an error message involving the original
file pathnames. The behavior has been fixed, and vopt will now
re-generate the optimized design.
_______________________________________________________________________

User Interface Defects Repaired in 2020.1

* QSIM-18738 - (results) Fixes corner cases that were causing the
Colorize system in the Transcript window to malfunction for some
customers. Using a color of 0 (Normal) now works as a Start Tag.
Also, having an End Tag on another line from its matching Start Tag
now correctly cleans up the color escape sequence.
* QSIM-60864 - Corrected and extended handling of ANSI escape codes
in the Questa GUI transcript window. More colors are supported, but
not the full ANSI range. Also Bold is supported.
_______________________________________________________________________

SystemVerilog Defects Repaired in 2020.1

* QSIM-53856 - Use of the 'inside' operator with an array of 'real'
type on the RHS (e.g. "myvar inside { array_of_real }") would
trigger an internal error "==? operator invalid for REAL". This
issue has been fixed.
* QSIM-55187 - Certain lists of expressions, as in a concatenation,
could cause a compiler crash if there was a missing element; this
is a syntax error now correctly handled.
* QSIM-56462 - An index variable in a streaming concat expression
like b1 = {>> {b2 with [0 +: len]}} would sometimes generate an
 error at vsim time because the variable "len" was expected to be a
constant expression. The typical error was:<br>
** Error: (vsim-3044) Usage of 'mod.len' inconsistent with
'register' object.
* QSIM-57185 - (source) Added checking for packed array of time.
Packed arrays of time are not allowed as per LRM. We were not
checking for it in the tool but now we have added the check. So,
the packed array of time will result in compiler error. The users
need to convert the packed array to unpacked to use arrays of time.
* [nodvtid] - Vlog would crash when parsing certain syntax
constructs.
* QSIM-58023 - Using a wire type with a struct containing a field of
an enum type could generate an error like<br>
<code># ** Fatal: (vsim-3355) Variable 'struct1.enum1' cannot be
converted to a net.</code>
* [nodvtid] - SystemVerilog macros undefining and subsequently
redefining a macro of the same name repeatedly during macro
expansion would generate incorrect results.
* QSIM-58670 - Vsim incorrectly reported a vsim-3837 error for
multiple continuous assignments to a variable when using a
bit-select expression with a complex index expression
* QSIM-53731 - (source) Macros and symbols defined (with `define) in
source files compiled because of -v and -y will no longer persist
after the -v and/or -y context is finished with. Use -svext=+dvydl
to reenable the old buggy behavior of leaking such macros/symbols.
_______________________________________________________________________

VHDL Defects Repaired in 2020.1

* QSIM-54334 - References within an uninstantiated package to a
locally-defined package instantiation could result in incorrect
simulator error messages due to incorrect code generation.
* QSIM-54962 - An object declaration with an initial value (or
default value, for signal) that was the parenthesized OPEN reserved
word was accepted and resulted in bad code that would crash the
simulator. This is a syntax error that is now detected.
* QSIM-54941 - The presence of a package instantiation declaration
within the declarative region of a design unit could cause the
compiler to incorrectly identify the instantiation as a standalone
design unit when compiling a source file with a -just command-line
switch. As a consequence, it is possible the extracted generic map
clause of the instantiation will refer to objects that are not in
scope, or the containing design unit will be broken into two parts
that cannot be compiled without syntax errors.
* QSIM-55531 - If a component or an entity contains a generic whose
type is dependent on another generic of the component or entity.
Code generation in vcom or vopt could fail.
* QSIM-56373 - A VHDL design unit whose source text is in 2 or more
files is not supported. An error will be issued if such a situation
is detected.
* QSIM-56691 - (source, results) Following execution of
uninstantiated procedures with OUT mode parameters not associated
with a type generic, and evaluation of generic procedures with OUT
mode parameters not associated with a type generic, actual
variables associated with the OUT parameters could be left
unchanged despite changes within the procedures. The compiler is
now generating code to correctly set the value of OUT mode
parameters in the above cases.
* QSIM-57546 - If a package contains a package instance within a USE
clause, static array constraints within the package instance may
 not be compiled correctly, possible causing a fatal internal error
during elaboration of the design by the simulator.
* QSIM-57795 - The compiler could report a fatal internal error if it
encountered a generic declaration list with an index constraint
within a generic vector preceding an interface package.
* QSIM-58539 - (results) The attributes INSTANCE_NAME and PATH_NAME,
were not considered globally static. If the prefix of the attribute
is a signal and this expression appears in a wait statement with an
on clause or in a concurrent statement other than a process, a
change in signal value would trigger a evaluation of the wait or
concurrent statement. This currently results in extra statement
executions. The attributes are now considered globally static, so
the wait or concurrent statement is no longer sensitized to that
prefix. This change can cause simulation results to be different
from previous versions.
* QSIM-60023 - Use of the -mixedsvvh switch could result in the
compiler erroneously emitting error vcom-1995, which states that a
package cannot be imported into SystemVerilog designs. This can
occur when at least two VHDL packages are compiled on a single
command-line with the -mixedsvvh switch; and, one package contains
a constant declaration initialized by a function defined in the
other package, and the name of the first package comes lexically
before the name of the second package.
* QSIM-57712 - If an entity has a generic whose type depends on a
previously declared generic and that entity is directly
instantiated, then vsim could crash when loading the design. The
work around was to use a component instantiation.
* QSIM-60153 - If a component had a port that is a multi-dimensional
array whose bounds depended on the component's generics and the
port's actual was an expression, vcom could generate an internal
error.
* QSIM-60125 - Simulations can crash, producing a stacktrace, when
simulating a VHDL design that calls procedures defined inside an
uninstantiated package with signal-valued attribute expressions,
using the 'TRANSACTION, 'STABLE, and 'QUIET attributes.
* QSIM-56236 - Several related problems are fixed
1. Ports that are of a multi-dimensional array type and the index
constraints depend on generics would crash.
2. Partially constrained ports that are arrays of arrays would
crash
3. Generic of type array whose constraints depend on other
generics would crash.
All these issues have been resolved.
* QSIM-59785 - The compiler could generate incorrect code for the
mapping of a signal to a component port when the port is an array
of records containing unconstrained array fields, and the component
instantiation is within a generate block. Incorrect code generation
could result in invalid error messages emitted from the compiler,
the optimizer, or simulator, or could cause the simulator to crash.
* QSIM-53604 - VHDL-2008 construct `with <expr> select ?` previously
gave error: unimplemented feature. This language construct has now
been implemented.
* QSIM-52747 - (source) Fixed an issue where forward type
declarations could allow compilation of illegal redefinitions. It
is now illegal to declare multiple forward type declarations for
the same symbol (see VHDL-2008 5.4.2).
_______________________________________________________________________

SystemC Defects Repaired in 2020.1

 * QSIM-39643 - Fixed an incorrect flag setting for the pointer types
that would cause an sccom (sccom-6165) merge error.
* QSIM-55481 - Fix scparse to handle C++11 scoped enums.
* QSIM-57389 - Fixed sccom-6000 error caused by a corrupt debug
database generated by scparse in cases where member functions had
many arguments.
_______________________________________________________________________

Mixed Language Defects Repaired in 2020.1

* QSIM-53578 - When a write-protected library contained a Verilog DU
made visible (as its equivalent ENTITY) by VHDL "use lib.all" in a
VHDL design unit, if the VHDL design unit then contained an
identifier that was the same as the name of this Verilog module, an
error would occur as the equivalent ENTITY was being made. This
error happened on Windows platforms only.
_______________________________________________________________________

User Interface Enhancements in 2020.1

* [nodvtid] - The vopt -linedebug option is being deprecated. A
warning message is issued when this option is used.
_______________________________________________________________________

SystemVerilog Enhancements in 2020.1

* [nodvtid] - SystemVerilog macro names defined on the command line
may contain the minus ('-') character in addition to the set of
characters that form valid identifiers. Enable this extension with
the "-svext=+mncim" option.
* [nodvtid] - (source) When a macro definition is found after a
pre-processor conditional compiler directive and they share the
same line in an HDL file emit a suppressible error. This will guide
users to create portable code that will behave similarly across
different implementations.
_______________________________________________________________________

VHDL Enhancements in 2020.1

* QSIM-52747 - Improved compilation performance for designs with long
strings of non-identical sub-declarations.
_______________________________________________________________________

SystemC Enhancements in 2020.1

* QSIM-555 - (source) SystemC/DPI/PLI/VPI/FLI default compiler (GCC)
for linux and linux_x86_64 platforms is upgraded to 7.4.0
Supported compilers: gcc-7.4.0, gcc-5.3.0 and gcc-4.7.4 for linux
and linux_x86_64 platforms
* QSIM-57618 - (source, results)
Support for the IEEE 1666-2005 SystemC-2.2 standard has been
deprecated and it is no longer supported.
* QSIM-57618 - (source, results) GCC 4.5.0 is no longer supported and
It will no longer be distributed with the release. This affects
linux and linux_x86_64 platforms only.
* QSIM-57322 - Removing the leading hierarchical path separator for
mixed-language designs that include SystemC is now supported under
'-scnolps' switch.
To enable the new behavior, '-scnolps' should be added to both vopt
and vsim arguments.
* QSIM-61311 - Fixed sccom-6142 compilation error when compiling with
-DMTI_BIND_SC_MEMBER_FUNCTION
_______________________________________________________________________
Document Revision History in 2020.1
* Revision - Changes - Status/Date
+ 5.0 - Modifications to improve the readability and
comprehension of the content. Approved by Tim Peeke. All
technical enhancements, changes, and fixes are listed in this
document for all products in this release. Approved by Bryan
Ramirez. - Released/January 2020
* Author: In-house procedures and working practices require multiple
authors for documents. All associated authors for each topic within
this document are tracked within the document source.
* Revision History: Released documents maintain a revision history of
up to four revisions. For earlier revision history, refer to
earlier releases of documentation which are available on Support
Center (http://support.mentor.com).