Ultra-Low Power and Dependability for IoT Devices

(Invited Paper for IoT Technologies)

Jörg Henkel, Santiago Pagani, Hussam Amrouch, Lars Bauer, and Farzad Samie
Chair for Embedded Systems (CES), Karlsruhe Institute of Technology (KIT), Germany
{henkel, pagani, amrouch, lars.bauer, samie}@kit.edu

Abstract—Recent advances in technologies have allowed the

design of small-size low-power and low-cost devices that can

Clouds
be connected to the Internet, enabling the emerging paradigm
of Internet-of-things (IoT). IoT covers an ever-increasing range
of applications, e.g., health-care monitoring, smart homes and
buildings, etc. In this invited paper, we discuss and summarize

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the IoT paradigm with a special focus on energy consumption

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and methodologies for its minimization. Furthermore, we also

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discuss about reliability in the context of IoT devices. In all, this

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paper attempts to be a starting point for readers interested in

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developing energy-efficient IoT devices.

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IoT Edge devices

I. I NTRODUCTION

Recent advances in technologies of sensors, wireless com-

munication, and embedded processors have enabled the design WĞƌƐŽŶĂůΘ,ĞĂůƚŚ ^ŵĂƌƚ,ŽŵĞ
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of low-cost small-size and low-power devices that can be
networked or connected to the Internet. These are the key Fig. 1: Computation layers in IoT systems and their properties
components of the emerging paradigm of Internet-of-things (figure from [1]).
(IoT) [1, 2]. IoT is covering an ever-increasing range of
applications, such as health-care monitoring, smart city, smart
home, smart building, smart industry, etc.
II. E NERGY E FFICIENCY ON I OT
The IoT is a multidisciplinary paradigm in which many Every core doing some computation, every Analog-to-
of the objects and things that surround us will be networked Digital Converter (ADC) acquiring data, every wireless com-
and connected to the Internet in order to provide new and munication, consumes power (with unit: Watt [W]), and this
better services [1, 3]. Recent and ongoing advances in the power consumption changes through time, e.g., a core exe-
technologies such as ultra-low power processors, wireless cuting a certain application will consume different amounts
communication, embedded sensors and actuators, Radio Fre- of power at different points in time. The amount of power
quency IDentification (RFID), mobile phones, and fog/cloud consumed by the different parts of the IoT device at a given
computing has enabled the emergence of IoT [4]. Although time point depends on several parameters, e.g., the technology
not all those technologies are needed for each and every IoT scaling node, the architecture of the core, the power mode of
application, they all enable and facilitate the proliferation of the different elements and peripherals (e.g., active, idle, sleep,
IoT by providing an essential prerequisite [5, 6]. While RFID off, etc.), the voltage and frequency settings, the temperature
enables low-cost object identification, and while ultra-low on the core, the instructions being executed, etc. Contrarily,
power system-on-chips (SoC) enable portable battery-powered energy is the integration of power through time (with units:
embedded devices, cloud computing and fog computing can Joule [J] or Watt second [W s]). Namely, when the power
be used to offload computations to the local or global servers, consumption of the IoT device is plotted with respect to time,
providing additional resources for handling large-scale data or the energy consumed between two time points is equal to
performing more complex operations [7, 8]. The IoT system the area below the power curve between the two time points.
consists of different computation and storage layers, as shown Therefore, energy is associated to a time window, e.g., the
in Figure 1. intervals between the periodic updates of sensor data.
Connectivity (wired or wireless) is what distinguishes Many IoT devices are battery-operated or rely on energy
embedded IoT devices from conventional embedded devices. harvesters with limited energy sources due to either their
In a broader sense and vision, IoT is a global infrastructure portability requirements, or the low cost of installation and
of heterogeneous, networked embedded objects and devices maintenance. Therefore, ultra-low power consumption and
[9]. Communication ability, and in particular the Internet efficient energy management are critical design objectives
connectivity, allows devices and smart objects (also known as both in hardware design and software application, aiming at
machines) to communicate and interact with (i) other machines reducing the overall energy consumption while satisfying the
and devices, or (ii) humans [5, 10, 11]. Quality-of-Service (QoS) constraints. The functionality on an

978-3-9815370-8-6/17/$31.00 2017
c IEEE 954
 Data acquisition Data processing and control Data storage Data transmission and communication
Power [W]

sleep mode sleep mode sleep mode

0 0.01 1 1.01 2 2.01 3 3.01

Time [s]

Fig. 2: Abstract example of the operation of an IoT device with respect to time, including the different stages of operation, their
normal sequence, and some possible power consumption values. In this example, the sensor data is updated with a period of 1 s.

IoT device mainly includes the following four stages: IoT. In addition, leakage power can be further reduced
• Data acquisition (sensing the physical phenomena). by choosing the process technology with high threshold
• Data processing and control. voltage.
• Data storage. • Software design: The IoT application, control functions,
• Data transmission and communication. and communication tasks need to be optimized for fast
execution time in order to reduce the time spent in active
Ultra-low power and energy-efficient design have to be consid- mode. One approach is to run the software at the highest
ered in all these stages, requiring low power and compressed- frequency (at the given operating voltage). Scheduling of
sensing, low-power microcontrollers, emerging technologies different tasks (main application, communication, etc.)
for low power memories, and novel low-power wireless tech- must aim at further reducing the duty cycle (i.e., the
nologies [1]. For example, Figure 2 depicts an abstract example active mode). Further details about this are discussed in
of the operation of an IoT device with respect to time, includ- Section III.
ing these four stages, their normal sequence, and some possible
power consumption values. In Figure 2, we can observe that III. E NERGY E FFICIENCY T HROUGH DYNAMIC VOLTAGE
the data to transmit can be stored in memory for a few periods, AND F REQUENCY S CALING (DVFS) FOR I OT
and only then transmitted. Naturally, we could have the case
that data is immediately transmitted after processing it. The In regards to the voltage and frequency settings, cores can
decision whether to use one approach or other will depend be provided with Dynamic Voltage and Frequency Scaling
on the memory size and energy consumption for buffering (DVFS) capabilities. For a core to stably support a specific
the data, and its relationship with the energy consumption for frequency, its supply voltage has to be adjusted above a
waking-up the wireless transmitter and putting it back to sleep minimum value. This minimum voltage value is frequency
(which has non-negligible overheads). dependent, and higher frequencies require higher minimum
voltages. Correspondingly, for a given voltage setting, a core
Besides energy-efficient hardware, software optimization should be executed below a maximum frequency. Specifically,
for low power consumption also has a great potential. In fact, as shown in [14], the relationship between the supply voltage
studies showed and concluded that large energy savings can be of a core and the maximum frequency for stable execution can
achieved when the energy efficiency is addressed in software be modeled as shown in Eq. (1),
design [12, 13]. 2
(Vdd − Vth )
The input data rate in IoT applications is usually relatively fstable = k · (1)
Vdd
low. For instance in the health-care monitoring domain, the
sampling rate of bio-signals is only a few kilohertz or even less. where Vdd is the supply voltage, fstable is the maximum stable
In other application domains, such as smart homes or smart frequency for this Vdd value, Vth is the threshold voltage for
buildings, the input data rate might be much less (i.e., a few the given technology, and k is an architecture-dependent fitting
hundred hertz). Therefore, in order to preserve energy, most factor. For a given Vdd , running at frequencies lower than fstable
IoT devices operate on a very low duty cycle, i.e., remain in is stable, but energy inefficient. For example, Figure 3 uses
sleep mode for most of the time (as already shown in Figure 2). Eq. (1) to model the stable voltage and frequency relationship
The low duty-cycle in IoT devices calls for the following two of a 28 nm x86-64 processor developed in [15].
approaches, one in hardware design and the other in software
As detailed in [16], the power consumption of a CMOS
design:
core can be modeled as shown in Eq. (2),
• Hardware design: Given that the IoT device spends most
of its time in the sleep mode, its power consumption in the P (Vdd , f , T , t) = u (t) · Ceff · Vdd 2 · f + Vdd · Ileak (Vdd , T ) + Pind
sleep mode needs to be reduced significantly. Emerging (2)
technologies with low leakage power, including e.g. non- where u (t) represents the instantaneous activity factor of
volatile processors, Ferroelectric Random Access Mem- the core at time t, Ceff represents the effective switching
ory (FRAM), and Fully-Depleted Silicon-On-Insulator capacitance of the core, Vdd represents the supply voltage, f
(FD-SOI), are promising solutions for VLSI design in represents the execution frequency of the core, Ileak represents

2017 Design, Automation and Test in Europe (DATE) 955

 4 10
Frequency [GHz]
Values from [15]
Vdd for fstable = 3 GHz
3 Model from Eq. (1)
Vdd for fstable = 2 GHz

Energy [J]
2 Vdd for fstable = f
5
1
0
0.5 1.0 1.5
Voltage [V] 0
0 1 2 3 4
Fig. 3: Supply voltage vs. maximum stable frequency modeled Frequency [GHz]
according to Eq. (1) for the experimental results of the 28 nm
x86-64 processor developed in [15]. Fig. 4: Energy consumption examples for a core executing
Δc = 109 compute cycles according to the energy model
from Eq. (4), considering that u (Δt) · Ceff = 2.3 V2 ·GHz
W
, that
we approximate Ileak (Vdd , T ) = 0.6 A, and Pind = 0.4 W. The
the leakage current (which depends on the supply voltage values for the model from Eq. (4) are for a 22 nm out-of-
and the temperature of the core T , such that high temper- order Alpha 21264 core, based on simulations conducted with
atures cause high leakage currents), and Pind represents an gem5 [17] and McPAT [18] for an x264 application from the
independent power consumption which can be attributed to PARSEC benchmark suite [19] running a single thread.
maintaining the core in execution mode (i.e., a constant offset
which corresponds to the voltage and frequency independent
part of the power consumption). In Eq. (2), u (t) · Ceff · Vdd 2 · f
represents the dynamic power consumption on the core (mainly the supply voltage precisely to the minimum value for stable
generated by switching activities), while Vdd · Ileak (Vdd , T ) execution. The reason for doing this is that, given that when we
represents the leakage power consumption (mainly generated reduce the frequency we can also reduce the voltage, then the
by leakage currents). In other words, there is a convex and savings in dynamic energy consumption are more significant
increasing relationship between the supply voltage of a core than the increments of the leakage and independent energy
and its power consumption, and a linear relationship between (due to the prolonged execution time). Nonetheless, there is
the execution frequency of the core and its power consumption. a point below which further reductions to the frequency is
Furthermore, the average power consumed during time window no longer energy efficient, and this occurs when the savings
Δt, can be expressed as shown in Eq. (3), in dynamic energy consumption (due to voltage reduction)
become less significant than the increments of the leakage and
P (Vdd , f , T , Δt) = u (Δt)·Ceff ·Vdd 2 ·f +Vdd ·Ileak (Vdd , T )+Pind independent energy. Contrarily, the second conclusion is that,
(3) on IoT platforms where voltage scaling is not possible (the
where u (Δt) represents the average activity factor of the core most common case), then the energy-efficient option is to race-
during time window Δt. to-idle, which implies executing cores as fast as possible in
With regards to energy consumption, if during time window order to reduce the execution time and also reduce the energy
Δt a core executes Δc compute cycles running at frequency consumption. The justification now is that, when the voltage is
f , then the energy consumed during this time window can be fixed, according to Eq. (4), the dynamic energy consumption
computed as P (Vdd , f , T , Δt)· Δc remains constant while the leakage and independent energy
f , which according to Eq. (3) consumption is reduced by decreasing the execution time.
is expressed as shown in Eq. (4).
Naturally, in either case, the selected frequency should be high
E (Vdd , f , T , Δt) = enough that the performance requirements of the applications
Δc (4) are always satisfied.
u (Δt) · Ceff · Vdd 2 · Δc + [Vdd · Ileak (Vdd , T ) + Pind ]
f
IV. A PPROXIMATE C OMPUTING ON I OT D EVICES
According to Eq. (4), Figure 4 presents energy consump-
tion examples for executing Δc = 109 compute cycles, The emerging paradigm of approximate computing lever-
considering three different voltage configurations. In the first ages inherent resilience of some applications and relaxes the
and second case, the value of Vdd is kept constant at 1.14 V and requirement of exact equivalence between the specification and
0.86 V, respectively, which according to Eq. (1) and Figure 3, implementation in order to gain more efficiency. Most of IoT
is the minimum value required to execute at 3 GHz and 2 GHz applications are interacting with the physical world with noisy
for this type of core, respectively. In the third case, according input data [1]. Therefore, they are inherently dealing with
to Eq. (1) and Figure 3, the value of Vdd is always set to the approximation. For instance, the first level of approximation
minimum value required to execute at the frequency of interest happens in the ADC which introduces a quantization error.
(i.e., the frequency in the x-axis of Figure 4). Moreover, the ADC uses a voltage-reference in its conver-
sion process. In the battery-powered IoT devices, the voltage
There are two very important conclusions that can be reference may change as the battery voltage changes, which
inferred from Eq. (4) and Figure 4. The first conclusions is leads to an inaccurate input from the ADC. Although these
that, on IoT platforms where voltage scaling is possible (not a applications tolerate some errors, the final output or Quality-
common case), then the energy-efficient option is to reduce of-Service (QoS) should be in a certain range (defined by the
the execution frequency as much as possible while setting user or system designer).

956 2017 Design, Automation and Test in Europe (DATE)

 The error tolerance property of the IoT applications can be V. B EYOND THE I OT E MBEDDED D EVICE
exploited to trade the output quality for other computational
As shown in Figure 1, the ultra-low power and edge IoT
effort (e.g., energy consumption, performance, memory usage,
devices are usually connected to the gateways. The main
etc.). Some open challenges exist in the domain of approximate
functionality of gateways is to enable seamless integration of
computing for IoT. The tolerable error can be exploited at
low-power wireless networks of IoT devices such as Bluetooth
different hardware components and different software parts:
Low Energy (BLE) or HaLow with other networks (e.g.,
• Data acquisition: The quality of input data, during the cellular network, LAN, etc.). However, they also provide
data acquisition, is determined by the resolution and local data processing service at the edge of the network in
sampling rate. For instance, an electrocardiogram (ECG) the Edge Computing paradigm [29]. In the next layers, the
captures the electrical signal of the heart at 360 samples Fog and Cloud computing provide massive storage and high
per second, with an 11-bit resolution in [20]. Compressed performance computing for Big Data in IoT.
Sensing (CS) is a novel technique in which the signal can
be reconstructed from much fewer samples than Nyquist Considering the other computation layers in IoT, the task
theory, at the cost of accuracy loss. As long as the input of data processing can be partitioned between different entities
data has the sparseness property (see [21] for details), or exclusively assigned to a specific layer. In the emerging
a smaller number of samples can capture the required paradigm of edge computing, the IoT data is processed and
information, and therefore CS can reduce the volume acted upon close to the edge of network (i.e., embedded
of collected data without significant loss of information. devices and gateways).
Most IoT applications have the data sparsity property and
can benefit from the CS paradigm. In health monitoring VI. R ELIABILITY C ONSIDERATIONS FOR I OT
applications and wireless body sensor network, CS has In a sense, voltage reduction is a double-edged sword.
been studied and investigated extensively [22–25]. When While, on the one hand, reducing voltage provides considerable
the IoT application tolerates error, reducing the quality of power and energy savings (as motivated earlier in Section III),
the input data is one way to take advantage of it in order on the other hand, it reduces the reliability which leads to
to reduce the energy consumption or delay. increasing the susceptibility to different kinds of failures. In
• Data processing: The approximation can also be done in general, failures can be divided into two main categories as
the underlying hardware, by designing inexact hardware follows:
units, or software implementation of the data processing • Time-Independent Failures: They are independent of
stage for specific arithmetic operations. For instance, the operation time of the circuit and mainly due to soft
some computation-intensive operations such as multi- errors, which can be caused by either intrinsic voltage
plication, Discrete Cosine Transform (DCT), Discrete noise and/or extrinsic radiation (i.e., energetic particles).
Fourier Transform (DFT), etc., have shown great poten- • Time-Dependent Failures: They are dependent on the
tials for the approximation [26]. operation time of the circuit and mainly due to aging
• Data storage: The tolerable error can be exploited at the effects such as Bias Temperature Instability and Hot
memory unit (or storage) to reduce the size of the required Carrier-induced Degradation (HICD), which are able to
memory, to reduce the number of memory accesses, alter the electrical characteristics of transistors over time,
or to reduce its energy consumption. One example of e.g., such as the threshold voltage (Vth ) [30].
approximation in memory is presented in [27] for an ultra-
low power biosignal processor. In order to demonstrate the impact of voltage reduction
• Data transmission: Given that the wireless communica- on reliability, we study, as an example, a 6-T SRAM cell
tion is power-hugry, reducing the amount of transmitted under different operating voltages, particularly, from 0.5 V to
data is a key concern. Novel data compression techniques 1.2 V. The Predictive Technology Model (PTM) [31], along
can take advantage of the specific properties of IoT data with the compact modeling of MOSFETs from Berkeley
and further reduce the power consumption of the device (BSIM [32]) were jointly employed to perform the required
for transmission. Lossy compression techniques fall into SPICE simulations at 45 nm technology node.
the approximation category. In [28], we have presented Resiliency against noise: The voltage noise, which inherently
an approximate compressor for the IoT-based biomedical exists in any chip, can jeopardize the data integrity of SRAM
health-care monitoring devices. By accepting a small cells. The resiliency of an SRAM against noise mainly depends
amount of error in the amplitude of the sample of the bio- on its operating voltage. To quantify the SRAM resiliency,
signal (given by the user or system designer based on its the Static Noise Margin (SNM) is typically used, which ex-
application requirements), we are able to encode the data presses the resiliency of SRAM against the effects of parasitic-
using shorter code-words which results in an improvement coupling (e.g., bit-line coupling) and intrinsic noise sources
of the compression ratio. The proposed technique does like thermal noise. In practice, larger SNM results in higher
not need any modification or extension in the hardware. resiliency against noise and vice versa. In Figure 5, we show
Moreover, the computation overhead of this technique is how voltage reduction considerably reduces the SNM which,
negligible. in turn, can lead to a higher probability of noised-induced
failures. For instance, reducing the voltage from 1.2 V to
Hybrid schemes, where multiple stages exploit approxima-
0.9 V and 0.5 V leads to reducing SNM by 20% and 60%,
tion, are also possible and promising. The main challenge here
respectively.
is to decide 1) at which stage, and 2) how much approximation
should be applied in order to minimize the computational effort Resiliency against radiation: When a particle strikes an
while meeting the QoS requirements. SRAM cell, the deposited charge due to its kinetic energy can

2017 Design, Automation and Test in Europe (DATE) 957

 0.5 14 60
0.4 12 50
10

ΔVth [mV]
SNM [V]
40

Qcrit [fC]
0.3 8
30
0.2 6
4 20
0.1 2 10
0 0 0
0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2
Supply Voltage [V] Supply Voltage [V] Supply Voltage [V]

Fig. 5: Impact of Vdd on the resiliency of Fig. 6: Impact of Vdd on the resiliency Fig. 7: Impact of Vdd on the resiliency of
SRAMs against noise. Note that smaller of SRAMs against radiation. Note that SRAMs against aging. Note that smaller
Vdd results in smaller SNM and hence less smaller Vdd results in smaller Qcrit and Vdd results in smaller ΔVth and hence
reliability. hence less reliability. better reliability.

corrupt the stored value if the resulting charge is higher than overall energy consumption of the IoT device while satisfying
the critical charge (Qcrit ) of the SRAM. Similar to the SNM the Quality-of-Service (QoS) or performance constraints. In
that represents the SRAM resiliency against intrinsic noise, this paper, we have summarized the generalities about energy
Qcrit represents the SRAM’s resiliency against extrinsic noise minimization for IoT devices, and we have discussed several
(i.e., particles-induced charges). In Figure 6, we show how techniques that can be employed for such a purpose. Moreover,
voltage reduction also considerably reduces the resiliency of we have also discussed several reliability issues which should
SRAMs against radiation. As it can be noticed, lowering the nonetheless not be ignored. In all, this paper is a good starting
voltage, e.g., from 1.2 V to 0.9 V and 0.5 V, can reduce Qcrit point for readers interested in developing energy-efficient IoT
by 50% and 90%, respectively. In turn, smaller Qcrit results in devices.
higher probability of failure as even weak particles existing at
the sea level (like neutrons) might become sufficient to cause ACKNOWLEDGEMENTS
soft errors.
This work was partly supported by the German Re-
Resiliency against aging: When the electric fields are applied search Foundation (DFG) as part of the Transregional Col-
during the operation of MOSFET transistors, different kinds laborative Research Centre Invasive Computing [SFB/TR 89]
of defects due to aging mechanisms can be generated. Such http://invasic.de, and the priority program Dependable Embed-
defects can accumulate over time, leading to an increase in ded Systems [SPP 1500] http://spp1500.itec.kit.edu.
the delay of a transistor and hence slowing down its speed. In
fact, the amount of generated defects is primarily determined
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