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DC LAB Ex-2

Lab report DC

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0% found this document useful (0 votes)
18 views9 pages

DC LAB Ex-2

Lab report DC

Uploaded by

hridoy45567
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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AMERICAN INTERNATIONAL UNIVERSITY BANGLADESH

Faculty of Engineering
Laboratory Report Cover Sheet

Students must complete all details except the faculty use part.

Please submit all reports to your subject supervisor or the office of the concerned faculty.

Laboratory Title: Verification of Kirchhoff’s Voltage Law (KVL) in Series Circuit and
Verification of Kirchhoff’s Current Law (KCL) in Parallel Circuit.
Experiment Number: _02_ _ Due Date: _23 NOVERDER 2024___ Semester:_2_________
Subject Code: EEE____ Subject Name: _ELECTRICAL CIRCULT 1-LAB_______ Section: __B___
Course Instructor: MD ASSIQUZZAMAN Degree Program: ____EEE________

Declaration and Statement of Authorship:


1. I/we hold a copy of this report, which can be produced if the original is lost/ damaged.
2. This report is my/our original work and no part of it has been copied from any other student’s work or from
any other source except where due acknowledgement is made.
3. No part of this report has been written for me/us by any other person except where such collaboration has
been authorized by the lecturer/teacher concerned and is clearly acknowledged in the report.
4. I/we have not previously submitted or currently submitting this work for any other course/unit.
5. This work may be reproduced, communicated, compared and archived for the purpose of detecting
plagiarism.
6. I/we give permission for a copy of my/our marked work to be retained by the School for review and
comparison, including review by external examiners.
I/we understand that
7. Plagiarism is the presentation of the work, idea or creation of another person as though it is your own. It is a
form of cheating and is a very serious academic offence that may lead to expulsion from the University.
Plagiarized material can be drawn from, and presented in, written, graphic and visual form, including
electronic data, and oral presentations. Plagiarism occurs when the origin of the material used is not
appropriately cited.
8. Enabling plagiarism is the act of assisting or allowing another person to plagiarize or to copy your work

Group Number (if applicable): 04 Individual Submission Group Submission

Student
No. Name Student Number Student Signature Date
Submitted by:
1 Hossain,MD.Robiul 24-57996-2
Group Members:
2 HALDER,ALIZAH DIBBO 24-58236-2
BARBHUYIA, MD. MUSFIQ
3 HOSSAIN 24-56884-1
4 HOSSAIN, MD.SIFAT 24-58169-2
5 AHOSANUL ISLAM TAKIM 24-58084-2

For faculty use only:


Total Marks: _______ Marks Obtained: _______
DC LAB EXPERIMENT 2 GROUP 4

Faculty comments___________________________________________________________________________

1
DC LAB EXPERIMENT 2 GROUP 4

Title: Verification of Kirchhoff’s Voltage Law (KVL) in Series Circuit and Verification of
Kirchhoff’s Current Law (KCL) in Parallel Circuit.
 Introduction:
The current and potential difference in electrical circuits are addressed by Kirchhoff's
circuit laws, which are two approximate equalities. Gustav Kirchhoff was the first to
describe them in 1845. This came before Maxwell's work and expanded on Georg Ohm's
work. Kirchhoff's rules, or simply Kirchhoff's laws, are widely used in electrical
engineering. Kirchoff's Current Law (KCL) and Kirchoff's Voltage Law (KVL) have been
practically developed in this experiment. Lastly, we have measured data that are being
checked against computed values.
 Theory and Methodology:
Kirchhoff’s Voltage Law (KVL):
In a DC circuit, Kirchhoff's Voltage Law (KVL) asserts that "the algebraic sum of the potential
rises and drops around a closed loop (or path) is zero." Stated differently, "the total of the
potential drops must equal the total of the rises around a closed loop." Potential increases (- to +)

(-). KVL is represented symbolically as follows: ∑𝐶 𝑉 = 0, where c stands for closed loop and V
are denoted by a plus (+) sign, whereas potential decreases (+ to -) are denoted by a minus sign

for potential rises and falls.

Figure 1: Series Circuit

Analysis of KVL circuit: For doing a complete analysis of KVL, with the given values of
circuit parameters follow the following steps:

Step 1: Calculate the equivalent resistance of the circuit: 𝑅𝑇 = 𝑅1 + 𝑅2 + 𝑅3

Step 2: Calculated the value of supply current, I:


E
I=
R 1+ R 2+ R 3
Step 3: Calculated V1, V2 and V3:

V1= I×R1 V2= I×R2 V3= I×R3


Step 4: Used KVL to verify:

∑cV=0 or E-V1-V2-V3=0

 Analysis of Series Circuit:


Any number of components connected at terminal locations form a circuit, which offers at least
one closed path for the movement of charge.
If two elements a) share a single terminal (that is, one lead of one is connected to one lead of the
other), then they are in series. b) There is no connection between the two elements' common point
and another element that carries current.
2
DC LAB EXPERIMENT 2 GROUP 4

Through series elements, the current remains constant. The sum of the resistance levels in a series
circuit is its total resistance. Generally speaking, the following formula is used to determine the
total resistance of N resistors connected in series:

RT = R1+R2+R3+ ........... +RN (Ohms)


I= E /R T (Amperes)
The voltage across each resistor (Figure 1) using Ohm’s law; that is,
V1= IR1, V2= IR2, V3= IR3, ......... , VN= IRN (Volts)
Using KVL, E = V1 + V2
In a series circuit, the voltage across a resistor is equal to the resistor's value times the total
impressed voltage across the series elements divided by the series elements' total resistance,
according to the voltage divider rule. The VDR equation that follows is used:
Vx=RxE/RT Similarly, V1=R1E/RT, V2=R2E/RT
where RT is the series circuit's total resistance, E is the impressed voltage across the series parts,
and Vx is the voltage across Rx.

Kirchhoff’s Current Law (KCL):


According to Kirchhoff's Current Law (KCL), "the algebraic sum of the currents entering and
leaving an area, system, or junction is zero" in a DC circuit. Stated otherwise, "the total currents
entering a system, area, or junction must equal the total currents exiting the system, area, or

∑ 𝐼𝐸𝑛𝑡𝑒𝑟𝑖𝑛𝑔=∑ 𝐼𝐿𝑒𝑎𝑣𝑖𝑛𝑔
junction." KCL can be represented in equation form as [1]:

Figure 2: Parallel Circuit

Analysis of KCL circuit: The following procedures should be followed in order to perform a
thorough analysis of KCL using the provided circuit parameter values:
Type equation here .

Step 1: Calculate the equivalent resistance of the circuit: Req= ( R 1−1 R 2−1 R 3−1 )−1

Step 2: Calculate the supply current:

E
I=
Req
Step 3: Calculate the current through different branches:

𝑰𝟏 = , 𝑰𝟐 = 𝑹 𝑬𝟐, 𝑰𝟑 = 𝑹 𝑬𝟑
E
R1

Step 4: Use KCL to verify:

3
DC LAB EXPERIMENT 2 GROUP 4

∑ I Entering = ∑ I leaving or I= I1 + I2 + I3

Analysis of Parallel Circuit:


If two elements, branches, or networks share two points, they are in parallel. Generally speaking,
the following formula is used to determine the total resistance of N resistors connected in parallel:
(Ohms) 1/RT = (1/R1) + (1/R2) + (1/R3) +... + (1/RN)
The voltage across parallel elements is the same (Figure 1). (V1= V2= E)

I1=E/ R1, I2=E/ R2 (Amperes)


Using KCL, Is= I1+I2 (Amperes)

According to the current divider rule, the current flowing through any parallel branch is equal to
the product of the input current divided by the resistance of the branch through which the current
is to be measured and the total resistance of the parallel branches. The CDR equation that follows
is used:
Ix=RTI/Rx Similarly, I1=RTI/R1, I2=RTI/R2

where RT is the total resistance of the parallel branches and the input current I is equal to V/RT.
When V=IxRx is substituted into the equation above, Ix stands for the current flowing through a
parallel branch of resistance Rx.

Circuit Diagram:

Fig-3: Loop Circuit Fig-4: Node Circuit

 Apparatus:

Serial Number Equipment Name Quantity Picture

Trainer Board
1
1

Connecting Wires 2

4
DC LAB EXPERIMENT 2 GROUP 4

AVO meter or Multi 1


meter
3

DC source 1

Resistors 3
5

 Precautions:
• The equipment's overall functionality was examined.
• Where required, the circuit was implemented with care.
• The DC source was connected, and it was made sure not to short when it was inserted into
the trainer board.

• When the circuit was being implemented in the trainer board, the DC supply was not turned
on.
• The digital multimeter was in voltmeter mode and was positioned in parallel across the
circuit's components to measure the voltage.
• To measure current, the digital multimeter was set up in ammeter mode and connected in
series with the circuit branch that was to be measured.

 Result:

Fig-5: Series circuit implementation Fig-6: Parallel circuit


on breadboard implementation on
breadboard

5
DC LAB EXPERIMENT 2 GROUP 4

 Experimental procedure:

1. As illustrated in Figure 1, we have linked the circuit.


2. Next, each circuit element's voltage was measured.
3.Following that, we entered the required computations in the following table.

Data Table:

Table-1 (For Figure 5):

Value of Resistors: R1 = 4.9 KΩ, R2 = 3.3 KΩ, R3 = 2.2 KΩ

Value of Voltage Source: E = 10 V

E IS (mA) V1 (V) V2 (V) V3 (V) V1 + V2 + V3 (V)

Measured 0.95 4.59 3.21 2.15 9.95


Value 10
Calculated 0.96 4.71 3.17 2.11 9.99
Value
Simulated 0.961 4.712 3.173 2.115 10
Value

Table-2 (For Figure 6):

IS (mA) I1 (mA) I2 (mA) I3 (mA) I1 + I 2 + I 3


(mA)
Measured Value 9.52 2.1 3.0 4.5 9.60

Calculated Value 9.70 2.04 3.03 4.54 9.61

Simulated Value 9.61 2.041 3.03 4.545 9.616

 Simulation and Measurement:

Fig-7: Measuring Voltage Drop Across Fig-8: Measuring Current Across Each

Each Resistor in a series Circuit Resistor in a Parallel Circuit.


 Calculations:
6
DC LAB EXPERIMENT 2 GROUP 4

 Theoretical Calculation:
KVL:
1) R1 = 4.9 KΩ, R2 = 3.3 KΩ, R3 = 2.2 KΩ
and E = 10 V ⸫ Rs = R1 + R2 + R3 = (4.9 +
3.3 + 2.2) KΩ = 10.4 KΩ
𝐸
𝐼= 𝑚𝐴 = 0.96 𝑚𝐴
10

𝑅𝑠
=
10.4
𝑉1 = 𝐼𝑅1 = (0.96 × 4.9) 𝑉 = 4.71 𝑉

𝑉2 = 𝐼𝑅2 = (0.96 × 3.3) 𝑉 = 3.17 𝑉

𝑉3 = 𝐼𝑅3 = (0.96 × 2.2) 𝑉 = 2.11 𝑉

⸫ 𝑉 = 𝑉1 + 𝑉2 + 𝑉3 = (4.71 + 3.17 + 2.11) 𝑉 = 9.99 𝑉

KCL:
1) R1 = 4.9 KΩ, R2 = 3.3 KΩ, R3 = 2.2 KΩ and E = 10 V
⸫ Rp = (R1-1 + R2-1 + R3-1) -1 = (4.9-1 + 3.3-1 + 2.2-1) -1 KΩ = 1.03 KΩ
𝐸
𝐼= 𝑚𝐴 = 9.70 𝑚𝐴
10

𝑅𝑝
=
1.03
𝐸
𝐼1 = 𝑚𝐴 = 2.04 𝑚𝐴
10

𝑅1 4.9
=

𝐸
𝐼2 = 𝑚𝐴 = 3.03 𝑚𝐴
10

𝑅2 3.3
=

𝐸
𝐼3 = 𝑚𝐴 = 4.54 𝑚𝐴
10

𝑅3 2.2
=

⸫ 𝐼 = 𝐼1 + 𝐼2 + 𝐼3 = (2.04 + 3.03 + 4.54) 𝑚𝐴 = 9.61 𝑚𝐴

 Reports:

ⅰ) There were a little bit difference found between the calculated values and the values which is
measured by multimeter.

ⅱ) The error percentage was found to be apprax 1-4%. The error of this experiment was for the
internal resistance of the elements,

7
DC LAB EXPERIMENT 2 GROUP 4

 Discussion:

Two circuits were constructed for the experiment in order to confirm Kirchhoff's laws in the first
circuit. Initially, the three resistors were linked in series, and in the second circuit, they were
connected in parallel. from each circuit's fast circuit voltage after that. were measured, and each
branch's current was measured from the second circuit. Since there is no error, nothing needs to
be changed. Simply attach the ammeter and voltmeter to the circuit in series and parallel,
respectively.

 Conclusion:
Kirchhoff's voltage and current laws were taught to us through the experiment, and both laws
were subsequently confirmed. There was no slight variation in the readings between the actual
and theoretical values while testing the voltage and current across the circuit, as is done online.
Here, the error is 0%. Thus, we might conclude that our experiment was a success.

 Reference:

[1] Robert L. Boylestad,” Introductory Circuit Analysis”, Prentice Hall, 12th Edition, New
York, 2010

[2] ELECTIC CIRCUIT 1 DC LAB Manual, Department of EEE, FE AIUB

[3] Charles K. Alexander | Matthew n. o. Sadiku Fundamentals of Electric Circuits.

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