MICROCONTROLLER

8051

Y Aruna Suhasini
1
Associate Professor
 Need for Microprocessors / controllers?

❖ The microprocessor is the core of computer systems.

❖ Nowadays most communication, digital entertainment,

portable devices, are controlled by them.

❖ A designer should know types of components needed ,

ways to reduce production costs and make the product
reliable.
Y Aruna Suhasini
2
Associate Professor
The necessary tools for a microprocessor
/microcontroller
• CPU: Central Processing Unit
• I/O: Input /Output
• Bus: Address bus & Data bus
• Memory: RAM & ROM
• Timer
• Interrupt
• Serial Port
• Parallel Port
Y Aruna Suhasini
3
Associate Professor
 MICROPROCESSORS
General-purpose Microprocessor
 CPU for Computers
 No RAM, ROM, I/O on CPU chip itself
 Example：Intel’s x86, Motorola’s 680x0

Many chips on mother board

Data Bus
CPU
General-
Serial
Purpose RAM ROM I/O Timer COM
Micro- Port
Port
processor
Address Bus

General-Purpose Microprocessor System

Y Aruna Suhasini
4
Associate Professor
 MICROCONTROLLER
• A smaller computer
• On-chip RAM, ROM, I/O ports...
• Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X.
• The most commonly used is Dual Inline Package (40 pins) – known
popularly as DIP.
• 8051 is also available in QFP (Quad Flat Package), TQFP (Thin Quad
Flat Package), PQFP (Plastic Quad Flat Package) etc.

CPU RAM ROM

A single chip
Serial
I/O Timer COM
Port Port
Microcontroller
5
Y Aruna Suhasini
Associate Professor
 MICROPROCESSOR VS MICROCONTROLLER
Microprocessor Microcontroller
• It is just a processor. Memory• Micro controller has processor
and I/O components have to along with internal memory and I/O
be connected externally. components.
• It is Expensive. • It is cheap as CPU, RAM, ROM,
• Designer can decide on the I/O and timer are on a single chip.
amount of ROM, RAM and I/O • Fixed amount of on-chip ROM,
ports. RAM, I/O ports.
• Microprocessors are based on • Micro controllers are based on
von Neumann architecture Harvard architecture where
where program and data are program memory and Data memory
stored in same memory module. are separate.
• General-purpose. Cannot be • Single-purpose. Can be used in
used in compact systems and compact systems and hence it is an
hence inefficient. efficient technique.
Y Aruna Suhasini 6
Associate Professor
MICROPROCESSOR VS. MICROCONTROLLER
Microprocessor
• Due to external components, Microcontroller
the entire power consumption • Since external components
is high. Hence it is not are less, total power
suitable to be used with consumption is less and can
devices running on stored be used with devices
power like batteries. running on stored power
like batteries.
• Since memory and I/O
components are all external, • Since components are
each instruction will need internal, most of the
external operation, hence it is operations are internal
relatively slower. instructions, hence execution
speed is high.
Y Aruna Suhasini
Associate Professor
7
MICROPROCESSOR VS. MICROCONTROLLER
Microprocessor Microcontroller
• we have to interface • While in the microcontroller
external RAM for data RAM, ROM, I/O ports,
storage, ROM for timers and serial
program storage, communication ports are in
programmable peripheral built.
interface (PPI) 8255 for
the Input Output ports, • Microcontroller gives the
8253 for timers, USART satisfactory performance for
for serial port. small applications, but for
• So for large applications we large applications the memory
prefer microprocessor than requirement is limited because
microcontroller due to its only 64 KB memory is
high processing speed. Y Aruna Suhasini
available for program storage.
Associate Professor
8
The 8051 is an 8-bit microcontroller. It has the following
12 major components:

1. ALU (Arithmetic and Logic Unit)

2. PC (Program Counter)
3. Registers
4. Timers and counters
5. Internal RAM and ROM
6. Four general purpose parallel input/output ports
7. Interrupt control logic with five sources of interrupt
8. Serial data communication
9. PSW (Program Status Word)
10. Data Pointer (DPTR)
11. Stack Pointer (SP)
12. Data and Address bus.
Y Aruna Suhasini
Associate Professor 9
 FEATURES OF MCS-51

• 4K bytes ROM (factory mask programmed)

• 128 bytes RAM
• Four 8-bit I/O (Input / Output) ports
• Two 16-bit timers
• Serial Interface
• 64K External code memory space
• 64K External data memory space
• Boolean processor (operates on single bits)
• 210 bit-addressable locations

Y Aruna Suhasini
10
Associate Professor
 FEATURES OF 8051
• The Intel 8051 is a very popular general purpose
microcontroller widely used for small scale Embedded systems.
• The 8051 is an 8-bit microcontroller with 8 bit data bus and
16-bit address bus.
• The 16 bit address bus can address a 64Kbyte code memory
space and a separate 64K byte of data memory space.
• The 8051 has 4K on-chip read only code memory which is
used for permanent data storage and 128 bytes of internal
Random Access Memory (RAM)
• Microcontroller has 256 byte RAM in which 128 byte is used
for user space which is normally register banks and stack. But
other 128 byte RAM consists of SFRs(Special Function
Registers). Y Aruna Suhasini
11
Associate Professor
 FEATURES OF 8051
• Besides internal RAM, the 8051 has various Special
Function Registers(SFR) such as the Accumulator,
the B register, and many other control registers.
• It has 34 8-bit general purpose registers in total.
• The ALU performs one 8-bit operation at a time.
• It has two 16 bit counter/timers
• There are 3 internal interrupts (1 serial, 2 external
interrupts).
• It consists of 4 8-bit I/O ports (3 of them are dual purpose).
one of them is used for serial port.
• Some 8051 chips come with UART for serial communication
and ADC for analog to digital conversion.
Y Aruna Suhasini
12
Associate Professor
 BLOCK DIAGRAM

External interrupts
On-chip Timer/Counter

Interrupt ROM for

On-chip Timer 1 Counter
Control program
code RAM Timer 0 Inputs

CPU

Bus Serial
4 I/O Ports
OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data
Y Aruna Suhasini
Associate Professor 13
 Y Aruna Suhasini
14
Associate Professor
 REGISTERS
A

R0
DPTR DPH DPL
R1

R2 PC PC
R3

R4 Some 8051 16-bit Register

R5

R6

R7

Some 8-bit Registers of the

8051

Y Aruna Suhasini
Associate Professor 15
REGISTER ORGANIZATION OF 8051

Y Aruna Suhasini 16
Associate Professor
RAM ORGANIZATION

17
Y Aruna Suhasini
Associate Professor
REGISTER BANKS OF 8051

Y Aruna Suhasini
Associate Professor

18
PSW BANK SELECTION

Y Aruna Suhasini 19
Associate Professor
Y Aruna Suhasini
20
Associate Professor
 8051 INTERNAL ARCHITECTURE
• The CPU has many important registers. The Program Counter (PC)
always holds the code memory location of next instruction.
• The CPU fetches instructions from the code memory into the
instruction Register (IR), analyses the opcode of the
instruction, updates the PC to the location of next instruction,
fetches the operand from the data memory if necessary, and
finally performs the operation in the Arithmetic-Logic Unit
(ALU) within the CPU.
• The B register is a register just for multiplication and division
operations which require more register spaces for the product of
multiplication and the quotient and the remainder for the
division.
• The immediate result is stored in the accumulator register (Acc)
for next operation and the Program Status Word (PSW) is
updated depending on the status of the operation result 21

Y Aruna Suhasini
Associate Professor
 DATA and ADDRESS BUS
• A bus is group of wires using which data transfer takes place from
one location to another within a system.
• Buses reduce the number of paths or cables needed to set up
connection between components.
• There are mainly two kinds of buses - Data Bus and Address Bus

• Data Bus: The purpose of data bus is to transfer data. It acts as an

electronic channel using which data travels. Wider the width of the
bus, greater will be the transmission of data.

• Address Bus: The purpose of address bus is to transfer

information but not data. The information tells from where within
the components, the data should be sent to or received from. The
capacity or memory of the address bus depends on the number of
wires that transmit a single address bit.
22
Y Aruna Suhasini
Associate Professor
ALU
• All 8-bit arithmetic and logical operations are carried out by
the ALU over the operands held by temporary registers
TEMP1 and TEMP2.
• Users cannot access these temporary registers.

PROGRAM COUNTER (PC)

• A program counter is a 16-bit register and it has no internal
address.
• The basic function of program counter is to fetch from
memory the address of the next instruction to be executed.
• PC increments automatically, holding the address of the
next instruction.
Y Aruna Suhasini
Associate Professor 23
REGISTERS (ACCUMULATOR AND REGISTER B)
• 8051 microcontroller has 2 registers, Register A (or ACC)
and Register B.
• Register A serves as an accumulator while Register B
functions as a general purpose register. These registers are
used to store the output of mathematical and logical
instructions.
• The operations of addition, subtraction, multiplication and
division are carried out by Register A.
• Register B is usually unused and comes into picture only
when multiplication and division functions are carried out by
Register A.
• Register A is also involved in data transfers between the
microcontroller and external memory.
Y Aruna Suhasini
Associate Professor 24
DATA POINTER (DPTR)
• The data pointer or DPTR is a 16-bit register.
• It is made up of two 8-bit registers called DPH and DPL.
• Separate addresses are assigned to each of DPH and DPL for
storing the memory addresses that can be used to access
internal and external data/code.
• Its addresses are at 82H (DPL) and 83H (DPH)

STACK POINTER (SP)

• The stack pointer (SP) in 8051 is an 8-bit register used to
access the stack.
• As it has 8-bits it can take values in the range 00 H to FF H.
• Stack is a special area of data in memory.
• The SP acts as a pointer for an address that points to the top of
the stack. Y Aruna Suhasini 25
Associate Professor
 STACK OF 8051

• The register used to access the

stack is called SP (stack pointer)
register.
• The stack pointer in the 8051 is
only 8 bits wide, which means
that it can take value 00 to FFH.
• Stack Pointer (SP) is at 81H
address, contains address of the
data currently on the top of the
stack
• When 8051is powered up, the
SP register contains value 07.

26
Y Aruna Suhasini
Associate Professor
 STACK OPERATION

Stack in 8051
• Stack is used to store the data temporarily
• RAM locations from 08H to 1FH can be used as stack..
• Stack is last in first out (LIFO)
• Stack pointer (SP) is 8bit register, it indicates current
RAM address available for stack or it points the top of
stack.
• After PUSH instruction SP is decremented.
• After each POP instruction the SP is decremented.

Y Aruna Suhasini
Associate Professor
27
 PSW (PROGRAM STATUS WORD)

• Program Status Word or PSW is a hardware register which is a memory

location that holds a program's information and also monitors the status of
the program that is currently being executed.

• PSW register has 3 fields namely instruction address field, condition code
field and error status field.

• Generally, the instruction of the result of a program is stored in a single bit

register called a 'flag'. There are7 flags in the PSW of 8051. Among these 7
flags, 4 are math flags and 3 are general purpose or user flags.

The 4 Math flags are: The 3 General purpose flags or User flags are:
• Carry (c) • FO - Flag 0 is available for general purpose
• Auxiliary carry (AC) • RSO – Register Bank Selector bit 0
• Overflow (OV) • RS1 – Register Bank Selector bit 1
• Parity (P) Y Aruna Suhasini
Associate Professor
28
 Y Aruna Suhasini
29
Associate Professor
SPECIAL FUNCTION REGISTERS (SFRS).

8051 microcontroller has 7 Special Function Registers are:

1. Serial Port Data Buffer (SBUF)

2. Timer/Counter Control (TCON)
3. Timer/Counter Mode Control (TMOD)
4. Serial Port Control (SCON)
5. Power Control (PCON)
6. Interrupt Priority (IP)
7. Interrupt Enable Control (IE)
Y Aruna Suhasini 30
Associate Professor
 Y Aruna Suhasini
Associate Professor
31
 8051 MEMORY
8051 has two memories :
1. Program memory
2. Data memory
• It has an internal program memory of 4K size and if
needed an external memory of size 60K max can be
added (by interfacing ).
• So in total 64K size memory is available for 8051
microcontroller.
• By default, the External Access (EA) pin should be
connected Vcc so that instructions are fetched from
internal memory initially.
Y Aruna Suhasini 32
Associate Professor
 PROGRAM MEMORY ORGANIZATION
• When the limit of internal
memory (4K) is crossed,
control automatically moves
to external memory to fetch
remaining instructions.

• If the programmer wants to

fetch instruction from
external memory only
(bypassing the internal
memory), then External
Access (EA) pin must be
connected to ground (GND). 33

Y Aruna Suhasini
Associate Professor
 DATA MEMORY ORGANIZATION
• 8051 has 128 bytes of internal data memory and it allows
interfacing external data memory of maximum size up to 64K.
• So the total size of data memory in 8051 can be up to 64K
(external) + 128 bytes (internal).
• There are 3 separations/divisions of the data memory:
1) Register banks
2) Bit addressable area
3) Scratch pad area.

Y Aruna Suhasini
34
Associate Professor
 INTERNAL RAM AND ROM
ROM
• A code of 4K memory is incorporated as on-chip ROM in
8051.
• The 8051 ROM is a non-volatile memory meaning that its
contents cannot be altered i.e, they can address program
memory as well as a 64K separate block of data memory.
RAM
• The 8051 microcontroller is composed of 128 bytes of internal
RAM.
• This is a volatile memory since its contents will be lost if
power is switched off.
• These 128 bytes of internal RAM are divided into 32 working
registers which in turn constitute 4 register banks (Bank 0-
Bank 3) with each bank consisting of 8 registers (R0 - R7).
• There are 128 addressable bits in the internal RAM. 35
Y Aruna Suhasini
Associate Professor
Y Aruna Suhasini 36
Associate Professor
 ▪ The 8051 contains 210 bit addressable
locations, 128 from address 20H to
address 2FH and the rest are special
function registers
▪ 128 general-purpose locations are
accessed as bytes or as bits
▪ The bottom 32 locations of internal
memory contain the register banks
▪ The 8051 instruction set supports 8
registers, R0-R7

• The 8051 internal registers part of the

on-chip RAM, each register also has an
address (PC and IR are exceptions)

• 21 SFRs at the top of internal RAM

Y Aruna Suhasini
37
Associate Professor
 • PSW Program Status Word at address
D0H
• Carry Flag (C or CY) is dual-purpose,
during add or subtract
• Auxiliary Carry Flag AC when adding
binary-coded-decimal BCD
• Flag 0 (F0) is a general-purpose flag bit
available for user applications
• Register Bank Select Bits, RS0 and
RS1, determine the active register bank
• Overflow flag (OV), after add or sub,
set when arithmetic overflow
• Parity Bit (P), check for parity after
reception
• B register, or accumulator B, address
F0H, for MUL and DIV

Y Aruna Suhasini
Associate Professor 38
PIN DESCRIPTION of 8051

39
Y Aruna Suhasini
Associate Professor
 PIN DESCRIPTION
• 32 of the 8051’s 40 pins function as I/O port lines
• 24 of these lines are dual-purpose (26 on the 8032/8052), each
can operate as I/O or as a control line or the part of the address
or data bus.
• VCC → 5V supply- Pin 40
• VSS → GND - Pin 20
• XTAL2/XTALI are for oscillator input –Pins 18 &19
• Port 0 –P0.0 to P0.7 and AD0/AD7 - Pins 32 to 39
• Port 1 –P1.0 to P1.7 - Pins 1to 8
• Port 2 –P2.0 to P2.7 and A 8 to A15 – Pins 21 to 28
• Port 3 –P3.0 to P3.7 – Pins 10 to 17
Y Aruna Suhasini 40
Associate Professor
 PIN DESCRIPTION
• P 3.0 – RXD – Serial data input – SBUF
• P 3.1 – TXD – Serial data output – SBUF
• P 3.2 – INT0 – External interrupt 0 – TCON 0.1
• P 3.3 – INT1 – External interrupt 1 – TCON 0.3
• P 3.4 – T0 – External timer 0 input – TMOD
• P 3.5 – T1 – External timer 1 input – TMOD
• P 3.6 – WR bar – External timer 0 input – TMOD
• P 3.7 – RD bar– External timer 0 input – TMOD

• [EA(bar)]/VPP:Pin 31 (active low I/P to 8051)

when (EA)= 0, then 8051 access from external
program memory (ROM) only.
When (EA) = 1, then it access internal and external 41

program memories (ROMS). Y Aruna Suhasini

Associate Professor
 PIN DESCRIPTION
• [PSEN(bar)]:Program Store Enable is an output signal on pin 29. Usually
connects to an EPROM's Output Enable (OE) pin.
• It is used to enable external program memory (ROM).
When [PSEN(bar)]= 0, then external program memory becomes enabled and
microcontroller reads content of external memory location. Therefore it is
connected to (OE) of external ROM.
• When this line is ‘1’,16 address lines are being used to address the data memory.
• It is activated twice every external ROM memory cycle.

• ALE: Address latch enable: Pin 30 (active high O/P signal).

• When it goes high, external address latch is enabled and lower address of
external memory is (RAM or ROM) latched into it.
• Thus it separates A0-A7 address from AD0-AD7.
It provides properly timed signal to latch lower byte address.
• The ALE is activated twice in every machine cycle.
• If external RAM & ROM is not accessed, then ALE is activated at constant
rate of 1/6 oscillator frequency, which can be used as a clock pulses for
42
driving external devices. Y Aruna Suhasini
Associate Professor
 PIN DESCRIPTION
EA (External Access) - Pin 31
• The External Access input signal on pin 31 is generally tied
high (+5 V) or low (ground).
• If low, programs execute from external memory only.
• The EPROM versions of the 8051 also uses the EA line for
the +21 volt supply (Vpp) for programming the internal
EPROM.

• RST - Pin 9
• The RST input on pin 9 is the master reset for the 8051.
• When brought high for at least two machine cycles, the 8051
internal registers are loaded with appropriate values for an
orderly system start-up. Y Aruna Suhasini
Associate Professor
43
FOUR GENERAL PURPOSE PARALLEL INPUT/OUTPUT
PORTS

The 8051 microcontroller has four 8-bit input/output ports:P0, P1, P2 and P3. All of
them are dual purpose ports except P1 which is only used for I/O.These are:

• PORT P0: When there is no external memory present, this port acts as a general
purpose input/output port. In the presence of external memory, it functions as a
multiplexed address and data bus. It performs a dual role.

• PORT P1: This port is used for various interfacing activities. This 8-bit port is a
normal I/O port i.e. it does not perform dual functions.

• PORT P2: Similar to PORT P0, this port can be used as a general purpose port
when there is no external memory but when external memory is present it works
in conjunction with PORT PO as an address bus. This is an 8-bit port and
performs dual functions.

• PORT P3: PORT P3 behaves as a dedicated I/O port. 44

Y Aruna Suhasini
Associate Professor
 PORTS OF 8051
PORT 0 PORT 2
▪ Dual-purpose port on pins 32-39 • Pins 21-28
▪ In minimum-component designs • Dual purpose port
general purpose I/O port • General I/O port or as the high
▪ For larger designs with external byte of the address bus with
memory multiplexed address and external code memory
data bus • Port 2 is at A0H
▪ Port 0 is at address 80H

PORT 1 PORT 3
• Dedicated I/O port on pins 1-8 • Dual-purpose port on pins 10-17
• Used solely for interfacing to • Multifunctional
External devices
• Port 1 is at 90H • General-purpose I/O
• Port 3 is at B0H
45
Y Aruna Suhasini
Associate Professor
Port 0 with Pull-Up Resistors

Vcc
10 K

P0.0

Port
DS5000 P0.1
P0.2
8751 P0.3
8951 P0.4 0
P0.5
P0.6
P0.7

Y Aruna Suhasini 46
Associate Professor
Port 0(p0.0 to p0.7):
It is 8-bit bi-directional I/O port. It is bit/ byte addressable. During external memory
access, it functions as multiplexed data and low-order address bus AD0-AD7.
Port 1 (p1.0 to p1.7):
It is 8-bit bi-directional I/O port. It is bit/ byte addressable. When logic '1' is written
into port latch then it works as input mode. It functions as simply I/O port and it does
not have any alternative function.
Port 2 (p2.0 to p2.7):
It is 8-bit bi-directional I/O port. It is bit/ byte addressable. During external memory
access it functions as higher order address bus (A8-A15).
Port 3(p3.0 to port 3.7):
It is 8-bit I/O port. In an alternating function each pins can be used as a special
function I/O pin.
P3.0-RxD:
It is an Input signal. Through this I/P signal microcontroller receives serial data of
serial communication circuit.
P3.1-TxD:
It is O/P signal of serial port. Through this signal data is transmitted.
P3.2- (INT0):
It is external hardware interrupt I/P signal. Through this user, programmer or
peripheral interrupts to microcontroller.
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Y Aruna Suhasini
Associate Professor
P3.3-(INT1):
It is external hardware interrupt I/P signal. Through this user, programmer or peripheral
interrupt the microcontroller.

P3.4- T0:
It is I/P signal to internal timer-0 circuit. External clock pulses can connect to timer-0
through this I/P signal.

P3.5-T1:
It is I/P signal to internal timer-1 circuit. External clock pulses can connect to timer-1
through this I/P signal.

P3.6-[WR(bar)]:
It is active low write O/P control signal. During External RAM (Data memory) access it is
generated by microcontroller. when [WR(bar)]=0, it performs write operation.

P3.7-[RD(bar)]:
It is active low read O/P control signal. During External RAM (Data memory) access it is
generated by microcontroller. when [RD(bar)]=0, it performs read operation from external
RAM.
Y Aruna Suhasini 48
Associate Professor
 INTERRUPT CONTROL
• An event which is used to suspend or halt the normal program execution for a
temporary period of time in order to serve the request of another program
or hardware device is called an interrupt.

• An interrupt can either be an internal or external event which suspends the

microcontroller for a while and thereby obstructs the sequential flow of a
program.

• There are two ways of giving interrupts to a microcontroller –

1.By sending software instructions and
2.By sending hardware signals.

• The interrupt mechanism keeps the normal program execution in a "put on

hold" mode and executes a subroutine program and after the subroutine is
executed, it gets back to its normal program execution.

• This subroutine program is also called an interrupt handler.

• A subroutine is executed when a certain event occurs. 49

Y Aruna Suhasini
Associate Professor
INTERRUPT

50
Y Aruna Suhasini
Associate Professor
 INTERRUPTS OF 8051
5 Sources of interrupts are:

• 2 External interrupt sources connected through INT0 and INT1

• 3 External interrupt sources- Serial port interrupt, Timer Flag 0 and
Timer Flag 1.
The pins connected are as follows:
1. ALE(Address Latch Enable) - Latches the address signals on Port P0
2. EA (External Address) - Holds the 4K bytes of program memory
3. PSEN (Program Store Enable) - Reads external program memory
4. RST (Reset) - Reset the ports and internal registers upon start up
Y Aruna Suhasini 51
Associate Professor
 SERIAL DATA COMMUNICATION
Communication among computers is established by transmitting and
receiving data bits in a serial connection network.
SBUF (Serial Port Data Buffer) register at 99H holds both the transmit
data and receive data. Serial Port Control Register (SCON) controls serial
data communication. Address: 098H (Bit addressable)

• The SBUF register has 2 parts –

1. For storing the data to be transmitted TXD pin is used
2. For receiving data from external sources RXD pin is used.
Interrupt enable register IE at A8H,
Interrupt priority register IP at B8H
There are 4 programmable modes in serial data communication. They are:

1. Serial Data mode 0 (shift register mode)

2. Serial Data mode 1 (standard UART)
3. Serial Data mode 2 (multiprocessor mode)
4. Serial Data mode 3
Y Aruna Suhasini 52
Associate Professor
MODES OF SERIAL DATA COMMUNICATION

Y Aruna Suhasini 53
Associate Professor
 PCON ,TCON
PCON (Power Control, Addresses 87h): The Power Control SFR is
used to control the 8051's power control modes. "sleep" mode
which requires much less power are controlled through PCON.
Additionally, one of the bits in PCON is used to double the
effective baud rate of the 8051's serial port.

TCON (Timer Control, Addresses 88h, Bit-Addressable): The

Timer Control SFR controls whether each of the two timers is
running or stopped and contains a flag to indicate if each timer has
overflowed. Additionally, some non-timer related bits are located in
the TCON SFR. These bits are used to configure the way in which
the external interrupts are activated and also contain the external
interrupt flags which are set when an external interrupt has
occurred. Y Aruna Suhasini 54
Associate Professor
 TMOD
TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used to
configure the mode of operation of each of the two timers. Using this
SFR each timer may be configured to be a 16-bit timer, an 8-bit auto
reload timer, a 13-bit timer, or two separate timers. Additionally, the
timers may be configured to only count when an external pin is
activated or to count "events" that are indicated on an external pin.
TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch): These two SFRs,
taken together, represent timer 0. Their exact behavior depends on how
the timer is configured in the TMOD SFR; however, these timers
always count up. What is configurable is how and when they increment
in value.
TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh): These two SFRs,
taken together, represent timer 1. Their exact behavior depends on how
the timer is configured in the TMOD SFR; however, these timers
always count up. What is configurable is how and when they increment
55
in value. Y Aruna Suhasini
Associate Professor
 8051 RESET CIRCUIT
8051 can be Reset in two ways
1) Power-on Reset – It resets 8051 when power is turned ON
2) Manual Reset – in which a reset happens only when a push
button is pressed manually.

56

Y Aruna Suhasini
Associate Professor
 POWER-ON RESET CIRCUIT
Vcc

+
10 uF
31
EA/VPP
30 pF X1
19
11.0592 MHz
8.2 K
X2
18
30 pF
9 RST
RESET:
It is active high I/P signal. It should be maintained high for
at least two machine cycle while oscillator is running for
8051 microcontroller to reset. 57
Y Aruna Suhasini
Associate Professor
 8051 System Clock
Synchronization among internal operations can be achieved with
the help of clock circuits.
• Quartz crystal is used to generate periodic clock pulses.

• During each clock pulse a particular operation will be carried

out, thereby, assuring synchronization among operations.

• XTAL1 and XTAL2 are provided with two pins which are used
for connecting a resonant network in 8051 microcontroller
device. In addition to this, circuit also consists of four more
pins. They are,

1. EA: External enable

2. ALE: Address latch enable
3. PSEN: Program store enable and 58

Y Aruna Suhasini
4. RST: Reset. Associate Professor
 8051 DRIVEN BY A TTL OSCILLATOR
• Quartz crystal is used to make the
clock circuit.
• A resonant network as quartz
crystal is connected between these
two pins 18 & 19.
• The nominal crystal frequency is
12 MHz, up to 16 MHz
• The first 6 crystal pulses (clock
cycle) is used to fetch the opcode
and the second 6 pulses are used to
perform the operation on the
operands in the ALU. XTAL1 and XTAL2 are two I/P
line for on-chip oscillator and clock
• This gives an effective machine generator circuit.
cycle rate at 1MIPS (Million
Instructions Per Second). Y Aruna Suhasini
Associate Professor
59
 8051 System Clock
• One complete oscillation of the
clock source is called a pulse.
• Two pulses form a state and six
states form one machine cycle.
• Two pulses of ALE are available
for 1 machine cycle.
If 8051 microcontroller is
driven from external clock,
then XTAL2 is used to
drive 8051 from external
clock and XTAL1 should be
grounded.

60
Y Aruna Suhasini
8051 machine cycle waveform Associate Professor
 TIMER

• The 8051 has two timers: Timer 0 and Timer 1.

• They can be used either as timers to generate a time
delay or as counter to count events happening outside
the microcontroller.
• Both Timer 0 and Timer 1 are 16 bits wide and they are
accessed as two separate registers
• Low byte and high byte - TL0 & TH0 for Timer 0
TL1 & TH1 for Timer 1
• Timer 0, TL0 at 8AH and TLH at 8CH,
• Timer 1, TL1 at 8BH and TH1 at 8DH
Y Aruna Suhasini
Associate Professor
61
 TIMER PROGRAMMING
• There are three Special Function Registers for timer settings
• 1. Timer Registers (Timer 0 & Timer 1) – store the starting values of the
Timer 0 & Timer 1.
• Each timer is 16-bit register which is split into two bytes (THx & TLx).

Timer 0 register (16 Bit)

Timer 1 register (16 Bit) Y Aruna Suhasini

Associate Professor
62
 TIMER PROGRAMMING
2. Timer Control Register (TCON)
• It is used to turn ON/OFF the timers and timer interrupt control.
• It is a 8-bit register and bit-addressable, and only the upper 4-bits
refer to timer control.
(MSB) (LSB)
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
Timer ON/OFF control bits Trigger mode of external interrupt control bits

TR1 –Timer 1 run control bit. Set = Timer ON and Clear = Timer OFF
TF1 – Timer flag which is set when the Timer 1 rolls over from FFFFH to 0000H
Cleared the bit in software !.
TR0 – Timer 0 run control bit. Set = Timer ON and Clear = Timer OFF
TF0 – Timer flag which is set when Timer 0 rolls over from FFFFH to 0000H.
Cleared the bit in software !
IE1 and IT1 – Set the trigger mode of external interrupt 1 63

IE0 and IT0 – Set the trigger mode of external interrupt 0 Y Aruna Suhasini
Associate Professor
 TIMER PROGRAMMING
3.Timer Mode Register (TMOD)
• It is used to set the various timer operation modes.
• It is a 8-bit register and bit-addressable.

(MSB) (LSB)
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
GATE – Gating control when set. The timer/counter is enable only while the
INTx pin is high and the TRx control pin is set. When cleared, the timer is
enabled whenever the TRx control bit is set.
C/T – Timer or counter selected. Cleared for timer operation (input from
internal system clock) and Set for counter operation (input from Tx input pin)
M1 & M0 – Mode bits Y Aruna Suhasini 64
Associate Professor
 TIMER PROGRAMMING

M1 & M0 – Mode bits

M1 M0 Mode Operating Mode
0 0 0 13-bit timer/counter mode
Timer value range from 0000H to 1FFFH in TH - TL
0 1 1 16-bit timer/counter mode
Timer value range from 0000H to FFFFH in TH - TL
1 0 2 8-bit auto reload timer/counter mode
THx holds a value that is to be reloaded into TLx each
time it overflows.
1 1 3 Split timer mode

Modes 1 & 2 are used most widely.

Y Aruna Suhasini
Associate Professor 65
Y Aruna Suhasini
Associate Professor
66
Timer / Counter Mode 0 : 13 Bit Counter using
Timer 1

Y Aruna Suhasini
67
Associate Professor
Timer / Counter Mode 1 : 16 Bit Counter
using Timer 1

Timer value range from 0000H to FFFFH in TL1 – TH1

Y Aruna Suhasini 68
Associate Professor
Timer / Counter Mode 2 : 8 Bit Auto reload

Y Aruna Suhasini
69
Associate Professor
Timer:
:

Y Aruna Suhasini
70
Associate Professor