Computer System

Comparison of Computer Organization & Architecture:

1. Computer Organization and Architecture
∙ Computer Architecture refers to those attributes of a system that have a direct
impact on the logical execution of a program.
Examples:
o the instruction set
o the number of bits used to represent various data types
o I/O mechanisms
o memory addressing techniques
∙ Computer Organization refers to the operational units and their interconnections
that realize the architectural specifications.
Examples are things that are transparent to the programmer:
o control signals
o interfaces between computer and peripherals
o the memory technology being used
∙ So, for example, the fact that a multiply instruction is available is a computer
architecture issue. How that multiply is implemented is a computer organization issue.
• Architecture is those attributes visible to the programmer o Instruction set, number
of bits used for data representation, I/O mechanisms, addressing techniques. o e.g. Is
there a multiply instruction?
• Organization is how features are implemented o Control signals, interfaces, memory
technology. o e.g. Is there a hardware multiply unit or is it done by repeated addition?
• All Intel x86 family share the same basic architecture
• The IBM System/370 family share the same basic architecture
• This gives code compatibility o At least backwards
• Organization differs between different versions
2. Computer Components and Functions
1.What is meant by the function of computers? Explain with a suitable diagram.
Function is the operation of individual components as part of the structure
Functions of computer are:
1. Data processing: computer must be able to process data which may take a wide
variety of forms and the range of processing
2. Data storage: Computer stores data either temporarily or permanently.
3. Data movement: Computers must be able to move data between itself and the
outside world.
4. Control: There must be a control of the above three functions.

Figure: Functional view of a computer

What is meant by the structure of a computer? Explain with a suitable diagram.

Structure is the way in which components related to each other
Four main structural components:
o Central processing unit (CPU)
o Main memory
oI/O
o System interconnections
CPU structural components:
o Control unit
o Arithmetic and logic unit (ALU)
o Registers
o CPU interconnections
 3. Explain execution of the instruction in the computer with a suitable
diagram.

The basic function performed by a computer is execution of a program, which

consists of a set of instructions stored in memory.
• Two steps of Instructions Cycle:
o Fetch
o Execute
Fetch Cycle
o Program Counter (PC) holds address of next instruction to fetch
o Processor fetches instruction from memory location pointed to by PC
o Increment PC Unless told otherwise
o Instruction loaded into Instruction Register (IR)
Execute Cycle
o Processor interprets instruction and performs required actions, such as:
Processor - memory :
data transfer between CPU and main memory
Processor - I/O
Data transfer between CPU and I/O module
Data processing
o Some arithmetic or logical operation on data
Control
o Alteration of sequence of operations
o e.g. jump
Combination of above

4. Give an example of execution of a computer instruction cycle.

The PC contains 300, the address of the first instruction. The instruction (the
value 1940 in hex) is loaded into IR and PC is incremented. This process
involves the use of MAR and MBR.
• The first hexadecimal digit in IR indicates that the AC is to be loaded. The
remaining
three hexadecimal digits specify the address (940) from which data are to be
loaded.
The next instruction (5941) is fetched from location 301 and PC is
incremented.
The old contents of AC and the contents of location 941 are added and the
result is stored in the AC.
The next instruction (2941) is fetched from location 302 and the PC is
incremented. The contents of the AC are stored in location 941

5. Draw an instruction cycle state diagram and explain it .

3. Bus interconnection:
Draw bus interconnection diagram and explain each bus working.
A bus is a communication pathway connecting two or more devices
Usually broadcast (all components see signal)
Often grouped
A number of channels in one bus
e.g. 32 bit data bus is 32 separate single bit channels
Power lines may not be shown
There are a number of possible interconnection systems
Single and multiple BUS structures are most common
e.g. Control/Address/Data bus (PC)
e.g. Unibus (DEC-PDP)
Lots of devices on one bus leads to:
Propagation delays
Long data paths mean that co-ordination of bus use can adversely affect
performance
If aggregate data transfer approaches bus capacity
Most systems use multiple buses to overcome these problems
Data Bus
o Carries data
Remember that there is no difference between “data” and “instruction” at this
level
o Width is a key determinant of performance
8, 16, 32, 64 bit
Address Bus
o Identify the source or destination of data
o e.g. CPU needs to read an instruction (data) from a given location in memory
o Bus width determines maximum memory capacity of system
e.g. 8080 has 16 bit address bus giving 64k address space
mention the control signals and meaning of the control signal.
Control Bus
o Control and timing information
Memory read
Memory write
I/O read
I/O write
Transfer ACK
Bus request
Bus grant
Interrupt request
Interrupt ACK
Clock
Reset
4. Input output Module:
What is i/o architecture of a computer system? List i/o modules and explain with the
help of a block diagram.
The computer system’s i/o architecture is its interface to the outside world. Each I/O
module interfaces to the system bus and controls one or more peripheral devices.
There are several reasons why an I/O device or peripheral device is not directly
connected to the system bus.
There are wide variety of peripherals with various methods of operations. It would be
impractical to include the necessary logic within the processor to control several
devices.
The data transfer rate of peripherals is often much slower than that of the memory or
processor. Thus, it is impractical to use the high-speed system bus to communicate
directly with a peripheral.
Peripheral often use different data formats and word lengths than the computer to
which they are attached.
Thus an I/O module is required
Input/ Output Modules:
The major functions of an I/O module are:
1. Control and timing
2. Processor communication
3. Device communication
4. Data buffering
5. Error detection
There will be many I/O devices connected through I/O modules to the system. Each device
will be identified by a unique address.
When the processor issues an I/O command, the command contains the address of the
device that is used by the command. The I/O module must interpret the address lines
to check if the command is for itself.
Generally in most of the processor, the processor, main memory and I/O shares a
common bus
5. I/O Interface:
What do you mean by i/o interface? List the data transfer ways between computer and
i/o devices.
The method that is used to transfer information between internal storage and external
I/O devices is known as I/O interface. The CPU is interfaced using special
communication links by the peripherals connected to any computer system. These
communication links are used to resolve the differences between CPU and peripheral.
There exist special hardware components between CPU and peripherals to supervise
and synchronize all the input and output transfers that are called interface units.
The binary information that is received from an external device is usually stored in the
memory unit. The information that is transferred from the CPU to the external device
is originated from the memory unit. CPU merely processes the information but the
 source and target are always the memory unit. Data transfer between CPU and the I/O
devices may be done in different modes.
Data transfer to and from the peripherals may be done in any of the three possible
ways
1. Programmed I/O.
2. Interrupt- initiated I/O.
3. Direct memory access( DMA).
6. Programmed I/O:
Explain programmed i/o with example.
It is due to the result of the I/O instructions that are written in the computer program.
Each data item transfer is initiated by an instruction in the program. Usually the
transfer is from a CPU register and memory. In this case it requires constant
monitoring by the CPU of the peripheral devices.
Example of Programmed I/O: In this case, the I/O device does not have direct
access to the memory unit. A transfer from I/O device to memory requires the
execution of several instructions by the CPU, including an input instruction to
transfer the data from device to the CPU and store instruction to transfer the data
from CPU to memory. In programmed I/O, the CPU stays in the program loop
until the I/O unit indicates that it is ready for data transfer. This is a time
consuming process since it needlessly keeps the CPU busy. This situation can be
avoided by using an interrupt facility. This is discussed below.

7. Interrupt- initiated I/O:

What is need of interrupt i/o? write working of it. Also mention advantage and
disadvantage of it.
Since in the above case we saw the CPU is kept busy unnecessarily. This situation can
very well be avoided by using an interrupt driven method for data transfer. By using
interrupt facility and special commands to inform the interface to issue an interrupt
request signal whenever data is available from any device. In the meantime the CPU
can proceed for any other program execution. The interface meanwhile keeps
monitoring the device. Whenever it is determined that the device is ready for data
transfer it initiates an interrupt request signal to the computer. Upon detection of an
external interrupt signal the CPU stops momentarily the task that it was already
 performing, branches to the service program to process the I/O transfer, and then
return to the task it was originally performing.
Both the methods programmed I/O and Interrupt-driven I/O require the active
intervention of the
processor to transfer data between memory and the I/O module, and any data transfer
must transverse a path through the processor. Thus, both these forms of I/O suffer
from two inherent drawbacks.

● The I/O transfer rate is limited by the speed with which the processor can
test and service a device.

● The processor is tied up in managing an I/O transfer; a number of

instructions must be executed for each I/O transfer.
8. Direct Memory Access:
Explain direct memory access with suitable block diagram.
The data transfer between a fast storage media such as magnetic disk and memory
unit is limited by the speed of the CPU. Thus we can allow the peripherals directly
communicate with each other using the memory buses, removing the intervention of
the CPU. This type of data transfer technique is known as DMA or direct memory
access. During DMA the CPU is idle and it has no control over the memory buses.
The DMA controller takes over the buses to manage the transfer directly between the
I/O devices and the memory unit.

Bus Request : It is used by the DMA controller to request the CPU to relinquish the
control of the buses.
Bus Grant : It is activated by the CPU to Inform the external DMA controller that the
buses are in high impedance state and the requesting DMA can take control of the
buses. Once the DMA has taken the control of the buses it transfers the data. This
transfer can take place in many ways.
Types of DMA transfer using DMA controller:
Burst Transfer :
DMA returns the bus after complete data transfer. A register is used as a byte count,
being decremented for each byte transfer, and upon the byte count reaching zero, the
DMAC will
release the bus. When the DMAC operates in burst mode, the CPU is halted for the
duration of the data
transfer.
Steps involved are:
a. Bus grant request time.
b. Transfer the entire block of data at transfer rate of device because the device is
usually slow than the
speed at which the data can be transferred to CPU.
c. Release the control of the bus back to CPU
So, total time taken to transfer the N bytes
= Bus grant request time + (N) * (memory transfer rate) + Bus release control
time.
Where,
X µsec =data transfer time or preparation time (words/block)
Y µsec =memory cycle time or cycle time or transfer time (words/block)
% CPU idle (Blocked)=(Y/X+Y)*100
% CPU Busy=(X/X+Y)*100
Cyclic Stealing :
An alternative method in which DMA controller transfers one word at a time after
which it must return the control of the buses to the CPU. The CPU delays its
operation only for one memory cycle to allow the direct memory I/O transfer to
“steal” one memory cycle.
Steps Involved are:
d. Buffer the byte into the buffer
e. Inform the CPU that the device has 1 byte to transfer (i.e. bus grant request)
 f. Transfer the byte (at system bus speed)
g. Release the control of the bus back to CPU.
Before moving on transfer next byte of data, device performs step 1 again so
that bus isn’t tied up and
the transfer won’t depend upon the transfer rate of device.
So, for 1 byte of transfer of data, time taken by using cycle stealing mode (T).
= time required for bus grant + 1 bus cycle to transfer data + time required to
release the bus, it will be
NxT
In cycle stealing mode we always follow pipelining concept that when one byte is
getting transferred then Device is parallel preparing the next byte. “The fraction of
CPU time to the data transfer time” if asked then cycle stealing mode is used.

Where,
X µsec =data transfer time or preparation time
(words/block)
Y µsec =memory cycle time or cycle time or transfer
time (words/block)
% CPU idle (Blocked) =(Y/X)*100
% CPU busy=(X/Y)*100