Fund.

of Circuits 𝑑𝑓(𝑡) 𝑑 2 𝑓(𝑡) 𝑑 𝑛 𝐹(𝑠)

↔ 𝑠𝐹(𝑠) − 𝑓(0) ↔ 𝑠 2 𝐹(𝑠) − 𝑠𝑓(0) − 𝑓 ′ (0) 𝑡 𝑛 𝑓(𝑡) ↔ (−1)𝑛
𝑑𝑞 𝑡
𝑑𝑤 𝑡 𝑡 𝑑𝑡 𝑑𝑡 𝑑𝑠 𝑛
𝑖≜ 𝑄 = ∫ 𝑖 𝑑𝑡 𝑣𝑎𝑏 = 𝑤 = ∫ 𝑝 𝑑𝑡 = ∫ 𝑣𝑖 𝑑𝑡 = 𝑣𝑞 1 1
𝑑𝑡 𝑡0 𝑑𝑞 𝑡0 𝑡0 Impedance (𝑍𝑅 , 𝑍𝐶 , 𝑍𝐿 ): 𝑅, 𝑅, 𝑅; 𝐶, , ; 𝐿, 𝑗𝜔𝐿, 𝑠𝐿
𝑗𝜔𝐶 𝑠𝐶

𝑑𝑤 𝑑𝑤 𝑑𝑞 Initial energy: Capacitor add 𝑉0 /𝑠 (- to +); Inductor add 𝐿𝐼0 (- to -); (con. C/L to s)
𝑝= = ⋅ = 𝑣𝑖 𝑞 = 𝐶𝑣
𝑑𝑡 𝑑𝑞 𝑑𝑡 IVT: lim+ 𝑓(𝑡) = lim 𝑠𝐹(𝑠) FVT: lim 𝑓(𝑡) = lim 𝑠𝐹(𝑠)
𝑡→0 𝑠→∞ 𝑡→∞ 𝑠→0

Resistor (R) Capacitor (C) Inductor (L) Analog Circuit

𝑉 𝑘𝐵 𝑇
𝑣 = 𝑖𝑅 1 𝑡 𝑑𝑖 Real diode: 𝑣 = 0.7 V 𝑖 = 𝐼𝑠 [exp ( ) − 1] 𝑉𝑇 =
𝑉𝑇 𝑞
𝑣 = ∫ 𝑖(𝜏) 𝑑𝜏 + 𝑣(𝑡0 ) 𝑣=𝐿 𝛽
𝐶 𝑡0 𝑑𝑡 BJT: 𝑃 → 𝑁; → 𝐸, 𝐸 → 𝐼𝐶 = 𝛽𝐼𝐵 𝐼𝐸 = 𝐼𝐵 + 𝐼𝐶 = (1 + 𝛽)𝐼𝐵 𝐼𝐶 = 𝐼
1+𝛽 𝐸

𝑖 = 𝑣/𝑅 𝑑𝑣 1 𝑡 Check (NPN):

𝑖=𝐶 𝑖 = ∫ 𝑣(𝜏) 𝑑𝜏 + 𝑖(𝑡0 )
𝑑𝑡 𝐿 𝑡0 Active: 𝑉𝐶𝐵 > 0, 𝑉𝐶𝐸 > 0.7, 𝐼𝐵 > 0
Saturation: 𝐼𝐶 < 𝛽𝐼𝐵 , 𝑉𝐵𝐸 > 0.7, −𝑉𝐶𝐵 > 0.7
𝑣2 1 1
𝑝 = 𝑖2𝑅 = 𝑤 = 𝐶𝑣 2 𝑤 = 𝐿𝑖 2
𝑅 2 2 Cutoff: 𝐼𝐵 < 0, 𝑉𝐵𝐸 < 0, 𝑉𝐶𝐵 > 0

Se.: 𝑅𝑒𝑞 = 𝑅1 + 𝑅2 𝐿𝑒𝑞 = 𝐿1 + 𝐿2 Small signal model:

𝐶1 𝐶2
𝐶𝑒𝑞 =
𝐶1 + 𝐶2 𝑈̇ −𝛽𝐼𝑏 (𝑅𝑐 ||𝑅𝐿 ) 𝛽(𝑅 ||𝑅 ) 𝛽𝑅 ′
𝐴̇𝑢 = ̇𝑜 = ̇
= − 𝑐 𝐿 = − 𝐿 , 𝑅𝐿′ = 𝑅𝑐 ||𝑅𝐿
𝑅1 𝑅2 𝑈𝑖 𝐼𝑏 𝑟𝑏𝑒 𝑟𝑏𝑒 𝑟𝑏𝑒
Para.: 𝑅𝑒𝑞 = 𝐶𝑒𝑞 = 𝐶1 + 𝐶2 𝐿1 𝐿2
𝑅1 +𝑅2
𝐿𝑒𝑞 =
𝐿1 + 𝐿2 26mV 𝑈̇𝑖 𝑈̇𝑜
𝑟𝑏𝑒 = 300Ω + (1 + 𝛽) , 𝑅𝑖 = = 𝑅𝑏1 ||𝑅𝑏2 ||𝑟𝑏𝑒 , 𝑅𝑜 = | = 𝑅𝑐
𝐼𝐸 (mA) 𝐼𝑖̇ 𝐼𝑜̇ 𝑈̇𝑆 =0
𝑅𝐿 =∞

Op. amp.:
𝑅𝑏 𝑅𝑐 𝑅𝑐 𝑅𝑎 𝑅𝑎 𝑏
Δ → Y: 𝑅𝐴 = 𝑅𝐵 = 𝑅𝐶 = Inverting: 𝑣𝑜 = −
𝑅2
𝑣 Non-inverting: 𝑣𝑜 = (1 +
𝑅2
) 𝑣𝑠
𝑅𝑎 + 𝑅𝑏 + 𝑅𝑐 𝑅𝑎 + 𝑅𝑏 + 𝑅𝑐 𝑅𝑎 + 𝑅𝑏 + 𝑅𝑐 𝑅1 𝑠 𝑅1
𝑅𝑓 𝑅𝑓 𝑅𝑓
Summing: 𝑣𝑜 = − ( 𝑣 + 𝑣2 + 𝑣3 )
𝑅𝐴 𝑅𝐵 + 𝑅𝐵 𝑅𝐶 + 𝑅𝐶 𝑅𝐴 𝑅𝐴 𝑅𝐵 + 𝑅𝐵 𝑅𝐶 + 𝑅𝐶 𝑅𝐴 𝑅1 1 𝑅2 𝑅3
Y → ∆: 𝑅𝑎 = 𝑅𝑏 = Differencing: 𝑣𝑜 =
𝑅2 (1+𝑅1 /𝑅2 )
𝑣 −
𝑅2
𝑣1
𝑅𝐴 𝑅𝐵 𝑅 (1+𝑅 /𝑅 ) 2
1 3 4 𝑅1

𝑅𝐴 𝑅𝐵 + 𝑅𝐵 𝑅𝐶 + 𝑅𝐶 𝑅𝐴
Digital Circuit
𝑅𝑐 =
𝑅𝐶 Logic gates:

1st source free: RC: 𝑣(𝑡) = 𝑉0 𝑒 −𝑡/𝜏 RL: 𝑖(𝑡) = 𝐼0 𝑒 −𝑡/𝜏 NOT: 𝑌 = 𝐴̅ 𝑖𝑛𝑣𝑒𝑟𝑠𝑒
𝜏 = 𝑅𝐶
1st step resp.: RC: 𝑣(𝑡) = 𝑣(∞) + [𝑣(0) − 𝑣(∞)]𝑒 −𝑡/𝜏 AND: 𝑌 = 𝐴. 𝐵 = 𝐴𝐵 ∀in true ⟹ 1, otherwise 0
𝜏 = 𝐿/𝑅
RL: 𝑖(𝑡) = 𝑖(∞) + [𝑖(0) − 𝑖(∞)]𝑒 −𝑡/𝜏 OR: 𝑌 = 𝐴 + 𝐵 ∃in0 true ⟹ 1, otherwise 0

Source transf.: 𝑣𝑠 = 𝑖𝑠 𝑅 or 𝑖𝑠 = 𝑣𝑠 /𝑅 XOR: 𝑌 = 𝐴⨁𝐵 = 𝐴𝐵̅ + 𝐴̅𝐵 ∃in0 ≠ in1 ⟹ 1, otherwise 0

NAND: 𝑌 = ̅̅̅̅̅
𝐴. 𝐵 = ̅̅̅̅
𝐴𝐵 AND then NOT
2
𝑉Th
Max. of power transf.: 𝑝max =
4𝑅Th NOR: 𝑌 = ̅̅̅̅̅̅̅̅
𝐴+𝐵 OR then NOT

2nd source free: (𝛼, ω0 >, =, <, for each) Boolean algebra:
𝑎. 0 = 0 𝑎. 𝑎 = 𝑎 𝑎. 1 = 𝑎 𝑎. 𝑎̅ = 0 𝑎 + 0 = 𝑎 𝑎 + 𝑎 = 𝑎 𝑎 + 1 = 1 𝑎 + 𝑎̅ = 1
Se.: Para.:
Priority: AND > OR
𝑖(𝑡) = 𝐴1 𝑒 𝑠1 𝑡 + 𝐴2 𝑒 𝑠2 𝑡 𝑣(𝑡) = 𝐴1 𝑒 𝑠1 𝑡 + 𝐴2 𝑒 𝑠2 𝑡
Commutation: 𝑎 + 𝑏 = 𝑏 + 𝑎 𝑎. 𝑏 = 𝑏. 𝑎
𝑖(𝑡) = (𝐴2 + 𝐴1 𝑡)𝑒 −𝛼𝑡 𝑣(𝑡) = (𝐴1 + 𝐴2 𝑡)𝑒 −𝛼𝑡
Association: (𝑎 + 𝑏) + 𝑐 = 𝑎 + (𝑏 + 𝑐) (𝑎. 𝑏). 𝑐 = 𝑎. (𝑏. 𝑐)
𝑖(𝑡) = 𝑒 −𝛼𝑡 (𝐵1 cos 𝜔𝑑 𝑡 + 𝐵2 sin 𝜔𝑑 𝑡) 𝑣(𝑡) = 𝑒 −𝛼𝑡 (𝐵1 cos 𝜔𝑑 𝑡 + 𝐵2 sin 𝜔𝑑 𝑡)
Distribution: 𝑎. (𝑏 + 𝑐 + ⋯ ) = (𝑎. 𝑏) + (𝑎. 𝑐) + ⋯
𝑎 + (𝑏. 𝑐.⋅⋅⋅) = (𝑎 + 𝑏). (𝑎 + 𝑐).⋅⋅⋅

2nd step resp.: (𝛼, ω0 >, =, <, for each) Absorption: 𝑎 + (𝑎. 𝑐) = 𝑎 𝑎. (𝑎 + 𝑐) = 𝑎

Se.: Para.: ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅

𝑎 + 𝑏 + 𝑐 + ⋯ = 𝑎̅. 𝑏̅. 𝑐̅.⋅⋅⋅ ̅̅̅̅̅̅̅̅̅̅̅
𝑎. 𝑏. 𝑐.⋅⋅⋅= 𝑎̅ + 𝑏̅ + 𝑐̅ + ⋯
𝑠1 𝑡 𝑠2 𝑡
𝑣(𝑡) = 𝑉𝑠 + 𝐴1 𝑒 + 𝐴2 𝑒 𝑖(𝑡) = 𝐼𝑠 + 𝐴1 𝑒 𝑠1 𝑡 + 𝐴2 𝑒 𝑠2 𝑡 ̅̅̅̅̅̅̅̅̅̅̅
̅. 𝑏̅. 𝑐̅.⋅⋅⋅
𝑎+𝑏+𝑐+⋯ =𝑎 𝑎. 𝑏. 𝑐.⋅⋅⋅= ̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅̅
𝑎̅ + 𝑏̅ + 𝑐̅ + ⋯
𝑣(𝑡) = 𝑉𝑠 + (𝐴1 + 𝐴2 𝑡)𝑒 −𝛼𝑡 𝑖(𝑡) = 𝐼𝑠 + (𝐴1 + 𝐴2 𝑡)𝑒 −𝛼𝑡
NAND replacement:
𝑣(𝑡) = 𝑉𝑠 + 𝑒 −𝛼𝑡 (𝐵1 cos 𝜔𝑑 𝑡 + 𝐵2 sin 𝜔𝑑 𝑡) 𝑖(𝑡) = 𝐼𝑠 + 𝑒 −𝛼𝑡 (𝐵1 cos 𝜔𝑑 𝑡 + 𝐵2 sin 𝜔𝑑 𝑡)
𝐴̅ = ̅̅̅̅̅
𝐴. 𝐴 𝐴. 𝐵 = ̅̅̅̅̅
𝐴. 𝐵 𝐴 + 𝐵 = ̅̅̅̅̅
𝐴̅. 𝐵̅

For 2nd above: Binary to decimal:

Se.: 𝛼 =
𝑅
, 𝜔0 =
1
Para.: 𝛼 =
1
, 𝜔0 =
1 (𝑎𝑏𝑐𝑑)2 = (𝑎 × 103 + 𝑏 × 102 + 𝑐 × 101 + 𝑑 × 100 )10
2𝐿 √𝐿𝐶 2𝑅𝐶 √𝐿𝐶
Decimal to binary:
All: 𝑠1,2 = −𝛼 ± √𝛼 2 − 𝜔02 𝜔𝑑 = √𝜔02 − 𝛼 2
LAPLACE: (𝑥)10 ÷ 2 = (𝑞1 )10 ⋅⋅⋅⋅⋅⋅ 𝑚1
(𝑞1 )10 ÷ 2 = (𝑞2 )10 ⋅⋅⋅⋅⋅⋅ 𝑚2 (𝑥)10 = (mn ⋅⋅⋅ m2 m1 )2 simply laid by digits
1 1 2 1
ℒ{𝛿(𝑡)} = 1 ℒ{𝑢(𝑡)} = ℒ{𝑡} = ℒ{𝑡 2 } = ℒ{𝑒 −𝑎𝑡 } = ⋅⋅⋅ Each remainder is either 1 or 0
𝑠 𝑠2 𝑠3 𝑠+𝑎
K-maps:
𝜔 𝑠
ℒ{sin 𝜔𝑡} = ℒ{cos 𝜔𝑡} =
𝑠2 + 𝜔2 𝑠2 + 𝜔2 4 var.s ~ 20 1 3 var.s ~ 21 1’s 2 var.s ~ 22 1’s

𝜔 𝑠+𝑎 𝑘𝐵 = 1.38 × 10−23 J/K 𝑞 = 1.602 × 10−19 C 𝑉𝑇 ≈ 25 mV R. T. = 27 ℃

ℒ{𝑒 −𝑎𝑡 sin 𝜔𝑡} = ℒ{𝑒 −𝑎𝑡 cos 𝜔𝑡} =
(𝑠 + 𝑎)2 + 𝜔 2 (𝑠 + 𝑎)2 + 𝜔 2