zynq-ultrascale-plus-product-brief
zynq-ultrascale-plus-product-brief
zynq-ultrascale-plus-product-brief
PROCESSING SYSTEM
Up to 8K @ 15fps
Video Codec Unit – –
Supports H.264/H.265
Embedded: 256KB On-Chip Memory w/ECC; 32KB L1 I/D Caches; 1MB L2 Cache
Embedded and External Memory
External: DDR4/3/3L & LPDDR4/3 w/ECC; Quad-SPI; NAND w/ECC; eMMC
PROGRAMMABLE LOGIC*
44 @ 16Gb/s
Transceivers 24 @ 16Gb/s 24 @ 16Gb/s
28 @ 32Gb/s
PCIe® Gen3 2 5 2
High-Speed Connectivity PCIe Gen2 x4; 2x USB3.0; SATA 3.1; DisplayPort; 4x Tri-mode Gigabit Ethernet
FEATURES OVERVIEW
> Up to 10MB of internal local memory for co-processors and custom accelerators
Custom Memory Hierarchy > Built-in DDR controller for low latency memory access
> Tightly coupled memory enables isolated design ows or saety-critical applications
Deep Learning Processing Unit (DPU) > Congurable computation engine dedicated to convolutional neural networks
Compatible > Accelerate AI/ML functions easily with reference designs and pre-built AI models
*Maximum for each device family
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The information contained herein is for informational purposes only and is subject to change without notice. While every precaution has been taken in the preparation of this document, it may contain technical
inaccuracies, omissions and typographical errors, and AMD is under no obligation to update or otherwise correct this information. Advanced Micro Devices, Inc. makes no representations or warranties with
respect to the accuracy or completeness o the contents o this document, and assumes no liability o any kind, including the implied warranties o noninringement, merchantability or ftness or purposes, with
respect to the operation or use of AMD hardware, software or other products described herein. No license, including implied or arising by estoppel, to any intellectual property rights is granted by this document.
Terms and limitations applicable to the purchase or use of AMD’s products are as set forth in a signed agreement between the parties or in AMD’s Standard Terms and Conditions of Sale.
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© Copyright 2023 Advanced Micro Devices, Inc. All rights reserved. Xilinx, the Xilinx logo, AMD, the AMD Arrow logo, Alveo, Artix, Kintex, Kria, Spartan, Versal, Vitis, Virtex, Vivado, Zynq, and other designated
brands included herein are trademarks o Advanced Micro Devices, Inc. Other product names used in this publication are or identifcation purposes only and may be trademarks o their respective compa-
nies. AMBA, AMBA Designer, ARM, ARM1176JZ-S, CoreSight, Cortex, and PrimeCell are trademarks o ARM in the EU and other countries. PCIe, and PCI Express are trademarks o PCI-SIG and used under license.
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