Chapter 234
Chapter 234
2
RELEVANT TOOLS
➢ Simulation Tools:
Simulation tools enable engineers to model and simulate the behavior of
computer systems. They provide insights into system performance, timing,
and functionality before the physical implementation.
3
RELEVANT TOOLS
➢ Debugging Tools:
Debugging tools aid in identifying and resolving issues in computer architecture
designs. They help engineers trace and analyze the behavior of hardware and
software components.
➢ Performance Analysis Tools:
Performance analysis tools assist in evaluating the performance characteristics
of computer systems. They measure parameters such as execution time,
memory usage, and cache behavior.
➢ Profiling Tools:
Profiling tools provide insights into the runtime behavior of computer systems.
They help identify performance bottlenecks, hotspots, and areas for
optimization. Profilers collect data on program execution, CPU usage, memory
usage, and I/O operations.
4
STANDARDS
➢ Network Protocols: Network protocols define the rules and procedures for
communication between networked devices. They enable data
exchange, routing, addressing, and error handling in computer networks.
6
ENGINEERING CONSTRAINTS
➢ Power Consumption: As more and more
computing devices are being
developed, it is becoming increasingly
important to design systems that are
energy-efficient. This involves using low-
power components, optimizing
algorithms, and developing power
management techniques.
7
REFERENCES
https://www.studocu.com/ph/document/technological-university-of-the-
philippines/computer-engineering-technology/coet-9-relevant-tools-standards-and-or-
engineering-constraints/13996558
https://www.techtarget.com/searchnetworking/definition/protocol
https://www.studypool.com/documents/10054952/cppc-7-topic-2-1-relevant-tools-
standards-and-engineering-constraints
https://en.wikipedia.org/wiki/Communication_protocol
8
THANK YOU!
9
CHAPTER III:
INSTRUCTION ARCHITECTURE
Topics:
1. Data Representation
2. Register Sets
3. Machine Instruction Characteristics
3.1. Elements of Machine Instruction
3.2. Parts of Machine Instruction
4. Types of Operands
5. Types of Instruction
6. Addressing Techniques
7. RISC
8. CISC
9. MIPS
Data Representation
• Digitization is the process of converting information, such as text, numbers, photo, or music,
into digital data that can be manipulated by electronic devices.
• Data can be anything like a number, a name, notes in a musical composition, or the color in a
photograph. Data representation can be referred to as the form in which we stored the data,
processed it and transmitted it. In order to store the data in digital format, we can use any
device like computers, smartphones, and iPads. Electronic circuitry is used to handle the
stored data
DECIMAL BINARY
(BASE 10) (BASE 2)
Representing Numbers 0 0
1 1
• Numeric data consists of numbers that
2 10
can be used in arithmetic operations.
• Digital devices represent numeric data 3 11
Types of Registers
Arithmetic instructions – add, subtract, increment, decrement, convert byte/word and compare.
ADD, SUB: Add, subtract byte or word
ADC, SBB: Add, subtract byte or word and carry (borrow).
INC, DEC: Increment, decrement byte or word.
NEG: Negate byte or word (two’s complement).
CMP: Compare byte or word (subtract without storing).
MUL, DIV: Multiply, divide byte or word (unsigned).
IMUL, IDIV: Integer multiply, divide byte or word (signed)
CBW, CWD: Convert byte to word, word to double word
AAA, AAS, AAM ,AAD: ASCII adjust for add, sub, mul, div .
DAA, DAS: Decimal adjust for addition, subtraction (BCD numbers)
Extended Example 1.0
Logic instructions - AND, OR, exclusive OR, shift/rotate and test
NOT: Logical NOT of byte or word (one’s complement)
AND: Logical AND of byte or word
OR: Logical OR of byte or word.
XOR: Logical exclusive-OR of byte or word
TEST: Test byte or word (AND without storing).
SHL, SHR: Logical Shift rotate instruction shift left, right byte or word? by 1or CL
SAL, SAR: Arithmetic shift left, right byte or word? by 1 or CL
ROL, ROR: Rotate left, right byte or word? by 1 or CL.
RCL, RCR: Rotate left, right through carry byte or word? by 1 or CL.
String manipulation instruction – load, store, move, compare and scan for byte/word
MOVS: Move byte or word string
MOVSB, MOVSW: Move byte, word string.
CMPS: Compare byte or word string.
SCAS S: can byte or word string (comparing to A or AX)
LODS, STOS: Load, store byte or word string to AL.
Control transfer instructions – conditional, unconditional, call subroutine and return from subroutine.
JMP: Unconditional jump .it includes loop transfer and subroutine and interrupt instructions.
JNZ: jump till the counter value decreases to zero. It runs the loop till the value stored in CX
becomes zero
Extended Example 2.0
Loop control instructions - LOOP: Loop unconditional, count in CX, short jump to target address.
LOOPE (LOOPZ): Loop if equal (zero), count in CX, short jump to target address.
LOOPNE (LOOPNZ): Loop if not equal (not zero), count in CX, short jump to target address.
JCXZ: Jump if CX equals zero (used to skip code in loop).
Subroutine and Interrupt instructions-
CALL, RET: Call, return from procedure (inside or outside current segment).
INT, INTO: Software interrupt, interrupt if overflow.IRET: Return from interrupt.
Every instruction will carry the information need by the processor for execution.
Operation Code is the Code which is used to specifies the operation that will be going to be
performed. This code is also in the form of binary numbers and it is known as opcode.
Source Operand reference are the inputs for the process and it will be one or more than one
operations.
Result Operand Reference produces a result.
Next instruction reference tells the processor where to send the next instruction.
Addressing Modes: Addressing modes describe how operands are located in memory. Different CPU
architectures support various addressing modes, such as direct addressing (using a specific memory
address), indirect addressing (using the value at a memory address as the operand), and relative
addressing (using a displacement from a base address).
Condition Codes/Flags: Many instructions set or update condition codes or flags in the CPU's status
register. These flags indicate the result of the operation and are often used in conditional branches or
jumps.
Control Flow Instructions: These instructions control the flow of execution. They include branching
instructions (e.g., jump, conditional jump), subroutine call and return instructions, and interrupt-
related instructions.
Elements of Machine Instruction
Arithmetic and Logic Instructions: These instructions perform mathematical and logical
operations on data. Common operations include addition, subtraction, multiplication,
division, bitwise AND, OR, and XOR.
Shift and Rotate Instructions: These instructions shift or rotate the bits of a value in a
register.
Input/Output Instructions: In some architectures, there are instructions for input and
output operations, which allow communication with external devices.
Types of Operands
1. The Register
• Registers that is located in CPU. The instruction in registers can be accessed quickly.
Typically, the register comes with the symbol $ before their name. For example, we read the symbol $0 in
“register zero”, “dollar zero”. The registers are used for specific purposes. The register $0 always holds the
constant value 0. The saved registers, $s0 - $s7, are used to hold variables. The temporary registers, $t0 - $t9,
are used to hold intermediate values during a larger computation process. The following table show the
register usage in MIPS assembly system.
Table . Register Usage
2.The Memory
• Memory is located outside of CPU in the computer. It provides large capacity but
operate slowly.
When we execute instructions, there are too much data to fit in only 32 registers. The
memory has a lot of capacities to store data. The register file is small and fast, whereas
memory is large and slow, because the memory is located outside the CPU. Only
commonly used variables are kept in registers. The rest of them are kept in memory for a
future processing. As shown in the below, each 32-bit data word has a unique 32-bit
address. This is called word-addressable memory. Both the 32-bit word address and the
32-bit data value are written in hexadecimal.
3. The Constant
• Constant (also called immediate) expressions indicate inline values of the
instruction.
The maximum value of an immediate operand varies among instructions, but it can
never be greater than 232. The maximum size of an immediate on RISC architecture
is much lower; for example, on the ARM architecture the maximum size of an
immediate is 12 bits as the instruction size is fixed at 32 bits.
Types of Instruction
1. Memory Reference Instruction
This type of instruction is divided into three parts-mode, opcode and address. The first
12 bits of memory (0-11) specify an operation address. The next three bits (12-14) specify an
opcode, and the last bit (I) specifies the addressing mode. If I is 0, it specifies a direct
addressing mode, and if I is 1, it specifies an indirect addressing mode.
The operands specified by memory reference instructions are:
• AND
• ADD
• LDA
• STA
• BUN
• BSA
• ISZ
2. Register Reference Instruction
This type of instruction is divided into three parts – mode, opcode, and register
operation.The first 12 bits of memory (0-11) specify a register operation. The next three bits (12-
14) specify an opcode. The opcode for a register reference instruction is always 111. The last bit
specifies the addressing mode. This bit is always zero.
The different types of register operations are as follows:
Importance of RISC
• The importance of RISC lies in its streamlined approach to processing. By
focusing on a limited set of instructions, RISC architectures can execute
operations more quickly and efficiently, which is particularly beneficial for
applications requiring high performance with lower power consumption.
CISC
CISC stands for Complex Instruction Set Computer
MIPS can be used as a measure of a computer's processing speed, indicating how many
instructions a computer can execute in one second. It's a performance metric used to
compare the speed of different computer systems. Higher MIPS values typically indicate
faster processing capabilities. However, it's important to note that MIPS alone doesn't
provide a complete picture of a computer's performance, as the efficiency of instruction
execution and the type of instructions being executed also play crucial roles. MIPS as
Microprocessor without Interlocked Pipeline Stages:
MIPS also refers to a specific RISC (Reduced Instruction Set Computing) architecture
designed by MIPS Computer Systems (now MIPS Technologies), which was popular in
the 1980s and 1990s. MIPS is known for its simplicity and efficiency. It follows the RISC
philosophy of using a small, highly optimized set of instructions, which are executed in a
pipeline fashion for faster and more efficient processing.
Stages commonly found in a MIPS architecture
diagram:
• Instruction Memory (IMEM)
• Instruction Fetch (IF)
• Instruction Decode (ID)
• Register File
• ALU (Arithmetic Logic Unit)
• Data Memory (DMEM)
• Memory Access (MEM)
• Write-Back (WB)
• Program Counter (PC)
• Control Unit
Advantages of MIPS:
• It is easy to understand and measure
• It helps in the calculation of CPU processor speed (cycles per second), CPI
(average clock cycles per instruction) and Execution time.
• It handles when the amount of work is large.
Disadvantages of MIPS:
• It may not reflect real execution, since simple instructions do way better.
• It is an older, obsolete measure of a computer’s speed and power.
Any Questions?
Thank you for listening <3
CHAPTER 4:
MEASURING PERFORMANCE
Performance in computer architecture can be measured
using a variety of metrics, including:
• Instruction throughput: The number of instructions executed per
second.
• Latency: The amount of time it takes to execute a single instruction.
• Memory bandwidth: The pace at which data may be transmitted
between the CPU and memory.
• Energy efficiency: the quantity of energy spent per unit of effort
done.
• Scalability: a computer system's capacity to manage rising
workloads.
INSTRUCTION THROUGHPUT
• Running a benchmark application that performs a
range of activities, such as arithmetic, memory
access, and branching, can be used to test a CPU's
instruction throughput. The benchmark application
counts the number of instructions performed over
time, and instruction throughput is computed by
dividing the number of instructions executed by the
time elapsed.
LATENCY
• The latency of a CPU instruction can be measured by
running a benchmark program that measures the
time it takes to execute a single instruction. The
benchmark program typically executes the
instruction multiple times and averages the results
to reduce the effect of noise.
MEMORY BANDWIDTH
• A computer system's memory bandwidth may be
tested by running a benchmark application that
moves data between memory and the CPU. The
benchmark application counts the amount of data
transferred over time, and the memory bandwidth is
derived by dividing the amount of data copied by the
time elapsed.
ENERGY EFFICIENCY
• The amount of power utilized by a computer system
while running a benchmark application may be used
to determine its energy efficiency. The quantity of
work done divided by the amount of electricity
consumed yields the energy efficiency.
SCALABILITY
• A computer system's scalability may be determined
by running a benchmark application on computers
with varying numbers of processors or cores.
Scalability is determined by comparing the
performance of systems with various numbers of
processors or cores.
REFERENCES
• Hennessy, J. L., & Patterson, D. A. (2019). Computer Architecture a
quantitative approach. Morgan Kaufmann.
• / GeeksforGeeks. (2023, October 4). Performance of computer in
Computer Organization. GeeksforGeeks.
https://www.geeksforgeeks.org/computer-organization-
performance-of-computer
• Lilja, D. J. (n.d.). Measuring Computer Performance. Cambridge
Core. https://www.cambridge.org/core/books/measuring-
computer-performance/946D068B22B9333DE321112DE61712DD