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Chapter 234

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0% found this document useful (0 votes)
10 views50 pages

Chapter 234

Uploaded by

Errol Lopez
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CHAPTER 2:

RELEVANT TOOLS, STANDARDS AND/OR ENGINEERING


CONSTRAINTS
Maricar Millon, Reyna Eristingcol
WHAT ARE RELEVANT TOOLS, STANDARDS,
AND ENGINEERING CONSTRAINTS?

2
RELEVANT TOOLS

➢ Logic Design Software:


Logic design software tools assist in designing and simulating digital circuits at
the gate level. They allow engineers to create and analyze complex
combinational and sequential logic circuits.

➢ Simulation Tools:
Simulation tools enable engineers to model and simulate the behavior of
computer systems. They provide insights into system performance, timing,
and functionality before the physical implementation.

3
RELEVANT TOOLS

➢ Debugging Tools:
Debugging tools aid in identifying and resolving issues in computer architecture
designs. They help engineers trace and analyze the behavior of hardware and
software components.
➢ Performance Analysis Tools:
Performance analysis tools assist in evaluating the performance characteristics
of computer systems. They measure parameters such as execution time,
memory usage, and cache behavior.
➢ Profiling Tools:
Profiling tools provide insights into the runtime behavior of computer systems.
They help identify performance bottlenecks, hotspots, and areas for
optimization. Profilers collect data on program execution, CPU usage, memory
usage, and I/O operations.
4
STANDARDS

➢ Network Protocols: Network protocols define the rules and procedures for
communication between networked devices. They enable data
exchange, routing, addressing, and error handling in computer networks.

➢ System Interfaces: System interfaces define the connections and protocols


for interacting with peripheral devices and external systems. They provide
standardized interfaces for connecting storage devices, displays, audio
devices, and other peripherals.

➢ Communication Protocols: Communication protocols facilitate the


exchange of data between different components or systems. They define
rules and formats for data transmission, synchronization, error detection,
and flow control. 5
ENGINEERING CONSTRAINTS

➢ Cost: Designers need to balance


performance with affordability, taking into
account factors such as component costs,
manufacturing costs, and development
costs. They also need to consider the target
market and the competition, in order to offer
a product that is both competitive and
profitable.

➢ Heat Dissipation: As computer components


become smaller and more densely packed,
they generate more heat, which can lead to
overheating and system failure.

6
ENGINEERING CONSTRAINTS
➢ Power Consumption: As more and more
computing devices are being
developed, it is becoming increasingly
important to design systems that are
energy-efficient. This involves using low-
power components, optimizing
algorithms, and developing power
management techniques.

➢ Compatibility: the ability of a system,


component, or technology to work
effectively and seamlessly with other
systems, components, or technologies.

7
REFERENCES
https://www.studocu.com/ph/document/technological-university-of-the-
philippines/computer-engineering-technology/coet-9-relevant-tools-standards-and-or-
engineering-constraints/13996558

https://www.techtarget.com/searchnetworking/definition/protocol

https://www.studypool.com/documents/10054952/cppc-7-topic-2-1-relevant-tools-
standards-and-engineering-constraints

https://en.wikipedia.org/wiki/Communication_protocol

8
THANK YOU!

9
CHAPTER III:
INSTRUCTION ARCHITECTURE
Topics:
1. Data Representation
2. Register Sets
3. Machine Instruction Characteristics
3.1. Elements of Machine Instruction
3.2. Parts of Machine Instruction
4. Types of Operands
5. Types of Instruction
6. Addressing Techniques
7. RISC
8. CISC
9. MIPS
Data Representation
• Digitization is the process of converting information, such as text, numbers, photo, or music,
into digital data that can be manipulated by electronic devices.
• Data can be anything like a number, a name, notes in a musical composition, or the color in a
photograph. Data representation can be referred to as the form in which we stored the data,
processed it and transmitted it. In order to store the data in digital format, we can use any
device like computers, smartphones, and iPads. Electronic circuitry is used to handle the
stored data
DECIMAL BINARY
(BASE 10) (BASE 2)
Representing Numbers 0 0
1 1
• Numeric data consists of numbers that
2 10
can be used in arithmetic operations.
• Digital devices represent numeric data 3 11

using the binary number system, also 4 100


called base 2. 5 101
• The binary number system only has two 6 110
digits: 0 and 1. 7 111
• No numeral like 2 exists in the system, so 8 1000
the number “two” is represented in binary 9 1001
as 10 (pronounced “one zero”).
10 1010
11 1011
Data Representation
• Digital devices employ several types of
codes to represent character data,
including ASCII, Unicode, and their
variants.
• ASCII (American Standard Code for
Information Interchange, pronounced
“ASK ee”) requires seven bits for each
character.
• The ASCII code for an uppercase A is
01000001.
• Character data is composed of letters,
symbols, and numerals that are not used
in calculations.
• • Examples of character data include
your name, address, and hair color.
• • Character data is commonly referred to
as “text.”
Character data can be formed with the help of symbols, letters, and
numerals, but they can’t be used in calculations. Using the character data,
we can form our address, hair colour, name, etc. Character data normally
takes the data in the form of text.
Unicode is also known as the universal character encoding standard.
Unicode provides a way through which an individual character can be
represented in the form of web pages, text files, and other documents.
Using ASCII, we can only represent the basic English characters, but with
the help of Unicode, we can represent characters from all languages
around the World.
Microsoft word is used to create formatted text and documents. It uses
the DOCX format to do this. If we create a new document using the
Microsoft Word 2007 or later version, then it always uses DOCX as the
default file format. As compared to Microsoft Word, it is simpler to create
and edit documents using page format. Adobe Acrobat uses the PDF
format to create the documents. The files that saved in the PDF format
cannot be modified. But we can easily print and share these files. If we
save our document in PDF format, then we cannot change that file into
the Microsoft Office file or any other file without specified software.
HTML is the hypertext markup language. It is used for document
designing, which will be displayed in a web browser. It uses HTML format
to design the documents. In HTML, hypertext is a type of text in any
document containing links through which we can go to other places in
the document or in other documents also.
Bits and Bytes
● All of the data stored and transmitted
by digital devices is encoded as bits.
Terminology related to bits and bytes is
extensively used to describe storage
capacity and network access speed.
● The word bit, an abbreviation for binary
digit, can be further abbreviated as a
lowercase b. A group of eight bits is
called a byte and is usually abbreviated
as an uppercase B.
● Kilo, mega, giga, tera, and similar terms
are used to quantify digital data.
● Use bits for data rates, such as Internet
connection speeds, and movie
download speeds. Use bytes for file
sizes and storage capacities.
To reduce file size and transmission times, digital data can be
compressed. Data compression refers to any technique that
recodes the data in a file so that it contains fewer bits.
Compression is commonly referred to as “zipping.”
Compression techniques divided into two categories: lossless
and lossy
• Lossless compression provides a way to compress data and
reconstitute it into its original state; uncompressed data stays
exactly the same as the original data
• Lossy compression throws away some of the original data
during the compression process; uncompressed data is not
exactly the same as the original
Register Sets
Register Sets are small, high-speed
storage locations within the CPU.
They are used to temporarily hold
data, operands, and addresses during
instruction execution.
Registers provide a fast and efficient
means for the CPU to manipulate
data.
Why Register Sets Matter
Register Sets are essential for efficient instruction execution for several reasons:
• Speed: Registers are much faster to access than main memory, leading to faster
instruction execution.
• Data Manipulation: They enable quick data manipulation, reducing the need for
memory fetch/store operations.
• Temporary Storage: Registers serve as temporary storage for data, operands, and
addresses.
• Reducing Bottlenecks: Minimizing data movement between registers and
memory helps avoid bottlenecks.

Types of Registers

There are several types of registers in a typical computer architecture, including:


• General-Purpose Registers: Used for various data manipulation tasks.
• Special-Purpose Registers: Serve specific functions like program counter (PC) and
instruction register (IR).
• Floating-Point Registers: Used for floating-point arithmetic operations.
Machine Instruction Characteristics
Machine Instructions are commands or programs written in the machine code of a
machine (computer) that it can recognize and execute. A machine instruction consists of
several bytes in memory that tell the processor to perform one machine operation.
The processor looks at machine instructions in main memory one after another and performs
one machine operation for each machine instruction. A machine language program is the
collection of machine instructions in the main memory
Machine code or machine language is a set of instructions executed directly by a
computer’s central processing unit (CPU). Each instruction performs a very specific task, such
as a load, a jump, or an ALU operation on a unit of data in a CPU register or memory. Every
program directly executed by a CPU is made up of a series of such instructions. The general
format of a machine instruction is:
• Brackets indicate that a field is optional
• The label is an identifier that is assigned the address of the first byte of the instruction
in which it appears. It must be followed by “:”
• The inclusion of spaces is arbitrary, except that at least one space must be inserted; no
room would lead to ambiguity.
• Comment field begins with a semicolon “ ; ”
EXAMPLE:
Here: MOV R5,#25H;load 25H into R5

Data transfer instructions– move, load exchange, input, output.


MOV: Move byte or word to register or memory .
IN, OUT: Input byte or word from port, output word to port.
LEA: Load effective address
LDS, LES Load pointer using data segment, extra segment .
PUSH, POP: Push word onto stack, pop word off stack.
XCHG: Exchange byte or word.
XLAT: Translate byte using look-up table.

Arithmetic instructions – add, subtract, increment, decrement, convert byte/word and compare.
ADD, SUB: Add, subtract byte or word
ADC, SBB: Add, subtract byte or word and carry (borrow).
INC, DEC: Increment, decrement byte or word.
NEG: Negate byte or word (two’s complement).
CMP: Compare byte or word (subtract without storing).
MUL, DIV: Multiply, divide byte or word (unsigned).
IMUL, IDIV: Integer multiply, divide byte or word (signed)
CBW, CWD: Convert byte to word, word to double word
AAA, AAS, AAM ,AAD: ASCII adjust for add, sub, mul, div .
DAA, DAS: Decimal adjust for addition, subtraction (BCD numbers)
Extended Example 1.0
Logic instructions - AND, OR, exclusive OR, shift/rotate and test
NOT: Logical NOT of byte or word (one’s complement)
AND: Logical AND of byte or word
OR: Logical OR of byte or word.
XOR: Logical exclusive-OR of byte or word
TEST: Test byte or word (AND without storing).
SHL, SHR: Logical Shift rotate instruction shift left, right byte or word? by 1or CL
SAL, SAR: Arithmetic shift left, right byte or word? by 1 or CL
ROL, ROR: Rotate left, right byte or word? by 1 or CL.
RCL, RCR: Rotate left, right through carry byte or word? by 1 or CL.

String manipulation instruction – load, store, move, compare and scan for byte/word
MOVS: Move byte or word string
MOVSB, MOVSW: Move byte, word string.
CMPS: Compare byte or word string.
SCAS S: can byte or word string (comparing to A or AX)
LODS, STOS: Load, store byte or word string to AL.

Control transfer instructions – conditional, unconditional, call subroutine and return from subroutine.
JMP: Unconditional jump .it includes loop transfer and subroutine and interrupt instructions.
JNZ: jump till the counter value decreases to zero. It runs the loop till the value stored in CX
becomes zero
Extended Example 2.0
Loop control instructions - LOOP: Loop unconditional, count in CX, short jump to target address.
LOOPE (LOOPZ): Loop if equal (zero), count in CX, short jump to target address.
LOOPNE (LOOPNZ): Loop if not equal (not zero), count in CX, short jump to target address.
JCXZ: Jump if CX equals zero (used to skip code in loop).
Subroutine and Interrupt instructions-
CALL, RET: Call, return from procedure (inside or outside current segment).
INT, INTO: Software interrupt, interrupt if overflow.IRET: Return from interrupt.

Processor control instructions-Flag manipulation:


STC, CLC, CMC: Set, clear, complement carry flag.
STD, CLD: Set, clear direction flag.STI, CLI: Set, clear interrupt enable flag.
PUSHF, POPF: Push flags onto stack, pop flags off stack.
Elements of Machine Instruction
Elements of a machine instructions includes operation code, source operand reference, result operand
reference and next instruction. These four instructions referred and executes to as computer
instructions and also as machine instructions.

Every instruction will carry the information need by the processor for execution.
Operation Code is the Code which is used to specifies the operation that will be going to be
performed. This code is also in the form of binary numbers and it is known as opcode.
Source Operand reference are the inputs for the process and it will be one or more than one
operations.
Result Operand Reference produces a result.
Next instruction reference tells the processor where to send the next instruction.

Parts of a Machine Instructions


Here are some common components of machine instructions:
Opcode: The opcode (operation code) is a binary code that specifies the operation to be performed,
such as addition, subtraction, branching, or data movement. It determines the basic operation that the
CPU should carry out.
Operands: Operands are the data values or memory locations on which the operation is performed.
Some instructions might have no operands, while others may have one or more operands. The
operands can be registers, memory addresses, or immediate values.
Elements of Machine Instruction
Register Specifiers: In many machine instructions, source and destination registers are specified.
These are typically small, fast storage locations within the CPU that hold data. The registers can be
used to store data temporarily during computation or to hold addresses for memory operations.
Immediate Values: Some instructions include immediate values, which are constants or data that are
part of the instruction itself rather than being stored in memory. For example, an instruction might
add an immediate value to a register.

Addressing Modes: Addressing modes describe how operands are located in memory. Different CPU
architectures support various addressing modes, such as direct addressing (using a specific memory
address), indirect addressing (using the value at a memory address as the operand), and relative
addressing (using a displacement from a base address).

Condition Codes/Flags: Many instructions set or update condition codes or flags in the CPU's status
register. These flags indicate the result of the operation and are often used in conditional branches or
jumps.

Control Flow Instructions: These instructions control the flow of execution. They include branching
instructions (e.g., jump, conditional jump), subroutine call and return instructions, and interrupt-
related instructions.
Elements of Machine Instruction

Data Movement Instructions: These instructions copy data between registers or


between memory and registers. Examples include load (copy data from memory to a
register) and store (copy data from a register to memory) instructions.

Arithmetic and Logic Instructions: These instructions perform mathematical and logical
operations on data. Common operations include addition, subtraction, multiplication,
division, bitwise AND, OR, and XOR.

Shift and Rotate Instructions: These instructions shift or rotate the bits of a value in a
register.

Input/Output Instructions: In some architectures, there are instructions for input and
output operations, which allow communication with external devices.
Types of Operands
1. The Register
• Registers that is located in CPU. The instruction in registers can be accessed quickly.
Typically, the register comes with the symbol $ before their name. For example, we read the symbol $0 in
“register zero”, “dollar zero”. The registers are used for specific purposes. The register $0 always holds the
constant value 0. The saved registers, $s0 - $s7, are used to hold variables. The temporary registers, $t0 - $t9,
are used to hold intermediate values during a larger computation process. The following table show the
register usage in MIPS assembly system.
Table . Register Usage
2.The Memory
• Memory is located outside of CPU in the computer. It provides large capacity but
operate slowly.
When we execute instructions, there are too much data to fit in only 32 registers. The
memory has a lot of capacities to store data. The register file is small and fast, whereas
memory is large and slow, because the memory is located outside the CPU. Only
commonly used variables are kept in registers. The rest of them are kept in memory for a
future processing. As shown in the below, each 32-bit data word has a unique 32-bit
address. This is called word-addressable memory. Both the 32-bit word address and the
32-bit data value are written in hexadecimal.
3. The Constant
• Constant (also called immediate) expressions indicate inline values of the
instruction.
The maximum value of an immediate operand varies among instructions, but it can
never be greater than 232. The maximum size of an immediate on RISC architecture
is much lower; for example, on the ARM architecture the maximum size of an
immediate is 12 bits as the instruction size is fixed at 32 bits.
Types of Instruction
1. Memory Reference Instruction
This type of instruction is divided into three parts-mode, opcode and address. The first
12 bits of memory (0-11) specify an operation address. The next three bits (12-14) specify an
opcode, and the last bit (I) specifies the addressing mode. If I is 0, it specifies a direct
addressing mode, and if I is 1, it specifies an indirect addressing mode.
The operands specified by memory reference instructions are:
• AND
• ADD
• LDA
• STA
• BUN
• BSA
• ISZ
2. Register Reference Instruction
This type of instruction is divided into three parts – mode, opcode, and register
operation.The first 12 bits of memory (0-11) specify a register operation. The next three bits (12-
14) specify an opcode. The opcode for a register reference instruction is always 111. The last bit
specifies the addressing mode. This bit is always zero.
The different types of register operations are as follows:

Symbol Description Hexadecimal code

HLT Halt computer 7001

SZE Skip if E is zero 7002

SZA Skip if accumulator is zero 7004

SNA Skip if accumulator is negative 7008

SPA Skip if accumulator is positive 7010

INC Increment accumulator 7020

CIL Circulate left 7040

CIR Circulate right 7080

CME Complement E 7100

CMA Complement accumulator 7200

CLE Clear E 7400


3. Input-output instruction
This type of instruction is divided into three parts – mode, opcode, and input/output
operation.The first 12 bits of memory (0-11) specify an input/output operation. The
next three bits (12-14) specify an opcode. The opcode for an I/O reference instruction
is always 111. The last bit specifies the addressing mode. This bit is always 1.

The different types of I/O operations are as follows:


Symbol Description Hexadecimal code

IOF Interrupt off F040

ION Interrupt on F080

SKO Skip on flag output F100

SKI Skip on flag input F200

OUT Output the contents from an accumulator F400

INP Input a character to accumulator F800


Addressing Techniques
What are Addressing Techniques?
Addressing techniques are methods used by a computer's instruction set architecture
(ISA) to specify the location of operands (data items) used in the execution of
instructions. They play a crucial role in ISA because they determine how effectively a
processor can access data and instructions, impacting the overall efficiency and
complexity of the processor design.
Common Addressing Techniques:
Immediate Addressing: The operand is directly specified in the instruction.
Direct Addressing: The address of the operand is directly specified.
Indirect Addressing: The address of the operand is given by an address held in a
register.
Register Addressing: The operand is held in a register.
Indexed Addressing: The address is determined by adding a constant value to a base
address.
Base-Register Addressing: Uses a register to hold the base address and a fixed offset
to calculate the actual address.
Scaled Addressing: Similar to indexed addressing but includes a scaling factor.
RISC
What is RISC?
RISC, or Reduced Instruction Set Computer, is a type of microprocessor
architecture that uses a small, highly optimized set of instructions, rather than a
more complex set of instructions typically found in other types of architectures (like
CISC - Complex Instruction Set Computers).

Common uses of RISC


• Embedded systems
• Smartphones
• Tablets
• Networking hardware

Importance of RISC
• The importance of RISC lies in its streamlined approach to processing. By
focusing on a limited set of instructions, RISC architectures can execute
operations more quickly and efficiently, which is particularly beneficial for
applications requiring high performance with lower power consumption.
CISC
CISC stands for Complex Instruction Set Computer

It is a type of computer architecture that emphasizes a large set of complex


instructions for performing various operations. In CISC architectures, a single
instruction can perform several low-level operations, allowing complex tasks to be
executed with a single instruction. This approach contrasts with RISC (Reduced
Instruction Set Computer) architectures, which have a smaller set of simpler
instructions.
You can use three columns
CISC architectures were developed in the early days of computing when the
emphasis was on making it easier for programmers to write code without worrying
too much about the underlying hardware complexity. However, with advancements
in technology and the need for faster and more efficient processing, RISC
architectures gained popularity. RISC architectures simplify the processor design and
often lead to better performance and energy efficiency.
The complex architecture of CISC is below:
Advantages of CISC processors
• Memory requirement is minimized due to code size.
• The execution of a single instruction will also execute and complete several low level tasks.
• Memory access is more flexible due to the complex addressing mode.
• Memory locations can be directly accessed by CISC instructions.
• Microprogramming is easy to implement and less expensive than wiring a control unit.
• If new commands are to be added to the chip, the structure of the instruction set does not
need to be changed. This is because the CISC architecture uses general purpose hardware to carry out
commands.
• The compiler doesn’t have to be complicated, as the microprogram instruction sets can be
written to match the high-level language constructs.

Disadvantages of CISC processors


• Although the code size is minimized, the code requires several clock cycles to execute a single
instruction. There decreasing the efficiency of the system.
• The implementation of pipelining in CISC is regarded to be complicated.
• In order to simplify the software, the hardware structure needs to be more complex.
• CISC was designed to minimize the memory requirement when memory was smaller and
more expensive. However nowadays memory is inexpensive and the majority of new computer systems
have a large amount of memory, compared to the 1970’s when CISC first emerged.
MIPS
MIPS as Million Instructions Per Second:

MIPS can be used as a measure of a computer's processing speed, indicating how many
instructions a computer can execute in one second. It's a performance metric used to
compare the speed of different computer systems. Higher MIPS values typically indicate
faster processing capabilities. However, it's important to note that MIPS alone doesn't
provide a complete picture of a computer's performance, as the efficiency of instruction
execution and the type of instructions being executed also play crucial roles. MIPS as
Microprocessor without Interlocked Pipeline Stages:

MIPS also refers to a specific RISC (Reduced Instruction Set Computing) architecture
designed by MIPS Computer Systems (now MIPS Technologies), which was popular in
the 1980s and 1990s. MIPS is known for its simplicity and efficiency. It follows the RISC
philosophy of using a small, highly optimized set of instructions, which are executed in a
pipeline fashion for faster and more efficient processing.
Stages commonly found in a MIPS architecture
diagram:
• Instruction Memory (IMEM)
• Instruction Fetch (IF)
• Instruction Decode (ID)
• Register File
• ALU (Arithmetic Logic Unit)
• Data Memory (DMEM)
• Memory Access (MEM)
• Write-Back (WB)
• Program Counter (PC)
• Control Unit
Advantages of MIPS:
• It is easy to understand and measure
• It helps in the calculation of CPU processor speed (cycles per second), CPI
(average clock cycles per instruction) and Execution time.
• It handles when the amount of work is large.

Disadvantages of MIPS:
• It may not reflect real execution, since simple instructions do way better.
• It is an older, obsolete measure of a computer’s speed and power.
Any Questions?
Thank you for listening <3
CHAPTER 4:

MEASURING PERFORMANCE
Performance in computer architecture can be measured
using a variety of metrics, including:
• Instruction throughput: The number of instructions executed per
second.
• Latency: The amount of time it takes to execute a single instruction.
• Memory bandwidth: The pace at which data may be transmitted
between the CPU and memory.
• Energy efficiency: the quantity of energy spent per unit of effort
done.
• Scalability: a computer system's capacity to manage rising
workloads.
INSTRUCTION THROUGHPUT
• Running a benchmark application that performs a
range of activities, such as arithmetic, memory
access, and branching, can be used to test a CPU's
instruction throughput. The benchmark application
counts the number of instructions performed over
time, and instruction throughput is computed by
dividing the number of instructions executed by the
time elapsed.
LATENCY
• The latency of a CPU instruction can be measured by
running a benchmark program that measures the
time it takes to execute a single instruction. The
benchmark program typically executes the
instruction multiple times and averages the results
to reduce the effect of noise.
MEMORY BANDWIDTH
• A computer system's memory bandwidth may be
tested by running a benchmark application that
moves data between memory and the CPU. The
benchmark application counts the amount of data
transferred over time, and the memory bandwidth is
derived by dividing the amount of data copied by the
time elapsed.
ENERGY EFFICIENCY
• The amount of power utilized by a computer system
while running a benchmark application may be used
to determine its energy efficiency. The quantity of
work done divided by the amount of electricity
consumed yields the energy efficiency.
SCALABILITY
• A computer system's scalability may be determined
by running a benchmark application on computers
with varying numbers of processors or cores.
Scalability is determined by comparing the
performance of systems with various numbers of
processors or cores.
REFERENCES
• Hennessy, J. L., & Patterson, D. A. (2019). Computer Architecture a
quantitative approach. Morgan Kaufmann.
• / GeeksforGeeks. (2023, October 4). Performance of computer in
Computer Organization. GeeksforGeeks.
https://www.geeksforgeeks.org/computer-organization-
performance-of-computer
• Lilja, D. J. (n.d.). Measuring Computer Performance. Cambridge
Core. https://www.cambridge.org/core/books/measuring-
computer-performance/946D068B22B9333DE321112DE61712DD

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