SD Express (SD7.

x)
Host Implementation Guideline

Design Guide | May 2020

SD Express (SD7.x) Host Implementation Guideline

1 www.sdcard.org | ©2020 SD Association. All rights reserved
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Table of Contents
1. Purpose And Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. SD Express Card – Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. SD Host Types That May Accept SD Express Card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5. SW Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6. Power and Thermal Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7. SD Express and microSD Express Test Fixtures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Appendix A: Common Thermal Conducting Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Appendix B: Off-The-Shelf SD Express Host Solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 1 microSD Express and full size SD Express cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2 SD Express Card Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3 SD Express Host = SD and PCIe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 4 SD Host . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 5 M.2/PCIe to SD7.x Adapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 6 SD Express Host – Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 7 Block Diagram of SD Express Host with new Control lines . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 8 A Practical Example of Mux/De-Mux circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 9 SD Host Controller Register Map with added SD Express Support . . . . . . . . . . . . . . . . . . . . 11
Figure 10 Flow Chart of Initialization process starts from PCIe drivers first . . . . . . . . . . . . . . . . . . . . . 13
Figure 11 Flow Chart of Initialization process starts from SD drivers first . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12 SD Express – Android Host Driver Layers Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13 Flow Chart of the updated SD Drivers Operation during Initialization . . . . . . . . . . . . . . . 16
Figure 14 microSD Card and Host test adapters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15 microSD Express Test Adapter installed on standard CBB as PCIe add-in card . . . . . . . 18
Figure 16 microSD Express and SD Express Host Test Adapters may be inserted to
related SD Express hosts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17 Recommended PCB high level design concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18 Heat Pipe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19 Graphene Tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Table of Tables
Table 1 Voltage Ranges and Max Currents Allowed in SD Express card at PCIe mode . . . . . . . . . 12
Table 2 NVMe Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 3 Existing SD Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4 Pros and Cons of Initialization options: SD-First or PCIe-First . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5 PCIe Power Substates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6 Card’s Maximum Card Case Temperature (Tc) allowed at each Power State . . . . . . . . . . . 17
SD Express (SD7.x) Host Implementation Guideline
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1. Purpose And Scope

The SD Association (SDA) introduced SD Express via the 1.1 Referenced Documents
SD7.0 and microSD SD7.1 specifications in anticipation of
new market demands for high performance applications 1.1.1 SDA Specifications:
such as mobile computing, gaming and Internet of • Part 1 Physical Layer Specification Ver 7.0 (SD Express
Things (IoT) as well as opening new opportunities for full size introduced) referred hereafter as SD7.0 and its
removable memory cards usage. SD Express integrates Standard Size Mechanical Addendum Ver7.0.
PCIe/NVMe interface to the legacy SD interface for SD and • Part 1 Physical Layer Specification Ver 7.1 (microSD
microSD memory cards while maintaining full backward Express added) referred hereafter as SD7.1 and the
compatibility. microSD Card Addendum Ver 7.0. Note: When SD7.x
specification is mentioned, it relates to both SD7.0
The SDA prepared this document to provide
and SD7.1.
recommendations on how to implement SD Express into
• Part A2 Standard Host Controller Ver 6.0 – Referred
host products to maximize the specification’s capabilities
also as SHC. Note that SHC Ver 7 that will include
of the new PCIe/NVMe interface and maintain backwards
SD Express interface is under release process and is
compatibility.
expected to be available by mid-2020.

Note that only SDA members and host or card licensees may
get an access to the official SDA specifications. In order to
become a member – please refer to this link.

Also, the SDA published a simplified version of the above

mentioned specifications that non-members may download
for general study usage or drivers development. The
simplified specifications are not intended for product (card
or host) developments. Physical layer Simplified Specification
Figure 1 microSD Express and full size SD Express cards
Ver 7.1 can be downloaded from the following link.

1.1.2 PCI-SIG Specifications

• PCI Express Base Specification Revision 3.1a

PCI-SIG specifications may be downloaded from PCI-SIG site

through this link.

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 2. SD Express Card – Description

SD Express and microSD Express memory cards are based The functional interface:
on SD Physical spec version 7.0 and 7.1, respectively. For • In PCIe mode of operation, the card introduces itself
simplicity sake, we will refer to them both as SD Express to the host as a standard “NVM Express Device” (PCIe
hereafter. Both have the same general block diagram, as Class ID: 01h->08h->02h; as shown in PCI Code ID
shown in Figure 2. spec). This is the same as other NVMe devices like SSD
or M.2 devices, so standard PCI/NVMe drivers can be
To simplify the concept, an SD Express card can be
used to access the card in PCIe mode.
considered a traditional UHS-I memory card with the PCIe
• SD Express card may be initialized either through
interface and NVMe protocol.
the SD interface or through the PCIe interface. The
SD Express Card Block Diagram card may automatically recognize the PCIe mode of
VDD1 3.3v
SD/PCIe Mode indication CPU operation upon VDD2 supply from the host.
VDD2 1.8v
CLK
SD_CLK
SD_CMD
SD Host • If a host operates in PCIe mode, it may either:
CMD Interface
PCIe/SD
Module A. SD-First: Initialize the SD Express card through SD
Mode SD_DAT3
interface first after power up of VDD1, check if card
Memory management

SD_DAT2
Mux/De-Mux
Bi-directional

SD_DAT1
Memory device

SD_DAT3/PCIe_PERST#
DAT3
SD_DAT2/PCIe_CLKREQ# SD_DAT0
supports PCIe, if it support PCIe it will switch to
DAT2
DAT1
SD_DAT1/PCIe_REFCLK_N PCIe mode by supplying VDD2.
SD_DAT0/PCIe_REFCLK_P PCIe_PERST#
DAT0 PCIe/NVMe
PCIe_CLKREQ#
Interface
B. PCIe-First: Access the card directly in PCIe mode
PCIe_REFCLK_N
PCIe_REFCLK_P right after power up of VDD1 followed by VDD2.
PCIe_TX+ PCIe_RX_P • Starting with SD interface initialization is recommended
PCIe_TX- PCIe_RX_N
PCIe_RX+ PCIe_TX_P because it allows faster initialization if a legacy
PCIe_RX- PCIe_TX_N
SD memory card is inserted. It is also the most
Figure 2 SD Express Card Block Diagram straightforward implementation without changing PCIe
or NVMe drivers and has minimal effect on the overall
The physical interface: initialization time versus initializing through PCIe
• The PCIe physical interface is as defined by PCI-SIG: interface (as further explained in section 5.4 below).
PCIe 3.1 specification, single lane.
Bottom line:
• The SD Express adopted the PCIe 3.1 spec using the
Implementation of SD Express host is simple, because:
following side band signals: PERST# and CLKREQ#.
1. Existing PCIe interface may be used as is and existing
• Power Supply of VDD2 = 1.8v (in addition to
SD interface with minimal addition may be used.
VDD1=3.3v) is mandatory for the PCIe interface to
2. A relatively simple hardware mux/de-mux unit needs
operate.
to be added at the front end allowing the separation
• Due to the limitation of space, the two side band
of the PCIe side band and REFCLK+/- signals from the
signals and the REFCLK+/- signals are muxed with the
SD DAT lines. There are readily available off-the-shelf
SD DATA lines.
dedicated units designed to perform mux/de-mux in
the market today, making implementation easy.

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 3. As for software drivers, existing PCIe/NVMe drivers may be used. The only addition needed
is the switching mechanism between SD drivers to PCIe and the control of VDD2 supply for
PCIe mode of operation that may be used also as the SD/PCIe mode selection for the front end
mux circuit. The SD drivers will require an update to support the new interface. That update is
expected to be contributed to the open source community (see the drivers section below).
4. Host vendors interested in implementing SD Express into host devices without having SD
Express cards may complete major portions of design verification processes by using SD
Express demonstration cards available from some card manufacturers. They can use the
existing PCIe interface for their PCIe interface mode tests along with legacy SD cards for their
SD mode tests. To complete host device electrical tests of the PCIe interface the existing
SD Express Card Load Boards that are available from SDA for the PCIe host electrical testing
may be used (as described in chapter 7). These tests may serve as preliminary host tests and
may complete a large amount of verification work until SD Express cards are released in the
marketplace. Additional details are provided in the following sections.

3. SD Host Types That May Accept SD Express Card

Any of the following hosts can use SD Express cards:
May operate in
SD Express Host either SD or PCIe
SD Express Card
(SD+PCIe support) 1. Host supporting both SD and PCIe interface (Figure 3):
• Host and card can use either SD or PCIe interface operating the
May operate in SD Express card in either SD mode or PCIe mode.
FigureHost
SD Express 3 SD Express
either
May SD Card
or in Block
PCIe
operate SD Diagram
Express Card
SD support)
(SD+PCIe Host
SD mode only
SD Express Card 2. Host supporting only SD interface (Figure 4):
• Host and card will use SD pins operating the SD Express card in
May operate in
SD mode.
SD Host
SD mode only
SD Express Card
3. Host supporting only PCIe interface:
This type of implementation is not backward compatible to legacy
Figure 4 SD Host SD cards that use only the SD interface for access. Therefore, SDA is
not recommending implementation of such hosts, even though SD Express cards use a standard
PCIe/NVMe interface and it may be initialized through its PCIe interface. It can operate in such
host by operating the SD Express card in PCIe mode only. Such operation option is possible to
be used during development process and such option is described in section 3.2.

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3.1 SD Express Host • Host may manage power and thermal conditions
3.1.1 Pin out using card’s three power states: 0.72W, 1.44W and
• SD 7.0: Refer to Table 3.7.3-1 of SD7.0 Specification. 1.8W (default) through the NVMe protocol.
• microSD 7.1: Refer to Figure 2-4, and Table 2-5 of
3.1.3 Interface Detection and Initialization sequence
microSD Card Addendum Version 7.10 Specification.
Refer to Section 3.17.2 in SD7.x for the initialization sequence
3.1.2 Recommended Features shown from host and card sides that covers all the cases. A
Refer to Section 8.1.3 to 8.1.6 of SD7.0 Specification for SD more detailed description of each specific case along with
7.x card supported, optional, not supported, and partially signal diagrams can be found in Section 8.3.2 of SD7.x.
supported features. SD 7.x Host is highly recommended
to support at least all mandatory SD 7.x card supported
3.1 SD Host
features (Section 8.1.3 in SD7.0) on host side.
Any legacy SD host in the market may support the operation
of an SD Express card. In such a host, the SD interface of
When designing an SD Express host device, consider the
the SD Express card will be used as guaranteed by the
following recommendations to best utilize SD Express card
specification. Speeds of SDR50 and DDR50 for microSD
capabilities.
Express will be supported while DDR50 in full size cards and
SD Mode: SDR104 may also be supported if implemented by the cards.
• Allow maximum power in default speed mode of SDXC Refer to section 3.17.2 in SD7.0 Specification for the SD
and SDUC cards by setting power control bit in ACM41, Express card internal state diagram. Initializing the card with
XPC, to 1 as this is the maximum performance mode. legacy SD host will move the card to its SD mode of operation
• Send Power off notification to the card before turning at the moment that SD CLK will be provided by the host.
OFF the power to the card during idle time.
3.2 PCIe Host
PCIe Mode: 3.2.1 Interface Selection and Pinout
• The SD Express PCIe interface uses CLKREQ# and • As mentioned earlier – SDA is not recommending
PERST# sideband signals only. The initialization implementation of PCIe host that does not support
process/conditions should conform to the PCIe and SD, as this host will not be backward compatible to
SD Express standard. existing legacy SD cards.
• Support Single Lane (x1). • There is no issue to operate SD Express cards in PCIe
• Support hot pluggable feature. host because it supports initialization directly through
• Host should allow SD Express card to work in full the PCIe interface. Therefore, it can be used in such
swing operation mode (800mV) even though PCIe ways for non-retail usage and for the development
allows full swing operation and half swing operation. process.
• Host should support the latest available NVMe 1.3+ • A standard PCIe 3 interface may be used on host side
(e.g., 1.3d at the publication of this document) to with the following considerations:
assure full backward compatibility and interoperability - Side band signals used with SD Express card are
to all cards in the market. PERST# and CLKREQ#.
• Support 1 namespace. - Card Present Detect (PRSNT#) input shall be
• L1.1 and L1.2 power sub-states to be supported in supported (as should be provided by any PCIe
PCIe for power saving during standby. interfaces supporting hot plug in/out).

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 - In order for SD Express card to operate in PCIe 3.2.3 Interface Detection and Initialization Sequence
mode, it needs VDD1 (3.3v) and VDD2. (1.8v) power Refer to section 3.17.2 in the SD7.0 specification for the
sources to be supplied plus VDD2 must be supplied initialization sequence shown from host and card sides that
to the SD Express card after VDD1 is set to ON. covers all the cases. Use the PCIe direct path, not through
- SD Express card does not have internal AC coupling SD interface first. For the configuration shown in Figure 5,
capacitors on its PCIe output lines. The two AC host may use the existing standard PCIe/NVMe initialization
caps (176nF to 265nF as defined in PCIe standard) process and drivers. The card, as mentioned, will conform to
need to be added on host within a distance of up PCIe specification and introduce itself as standard NVMe
to 12.5mm from the SD connector’s PCIe RX lane memory device.
contacts. Those caps are in addition to the AC
coupling caps already connected at the TX lane of 3.2.4 Recommended Features
the PCIe lines of the host side. • SD Express host initialization process and conditions
• Refer to Section 3.7.3 and Table 3.7.3-1 of SD 7.0 should conform to the PCIe specification.
Specification for SD form factor pin out. • The host should support up to PCIe 3.1 with up to 985
• Refer to Section 2.4 and Table 2-5 of microSD Card MB/s and CLKREQ# + PERST# side band signals.
Addendum Ver 7.1 Specification for microSD pin out. • Support Single Lane (x1).
• Support hot pluggable feature.
3.2.2 M.2/PCIe to SD 7.x Card Adapter • SD Express host should allow SD Express card to work
A practical example of PCIe Host usage for test and/or in full swing operation mode (800mV).
development of PCIe interface of SD Express card may be • Host should support the latest available NVMe 1.3+
done through a M.2/PCIe Card to SD Express card adapter. (e.g., 1.3d at the publication of this document) to assure
Such a solution may allow operation of SD Express card in full backward compatibility and interoperability to all
existing host that includes PCIe card or M.2 card slot. Figure cards in the market.
5 shows an example of an adapter card. • Support 1 namespace.
• L1.1 and L1.2 power sub-states to be supported in PCIe
for power saving during standby.
PCIe RX_lane_P/N AC caps • Host may manage power and thermal conditions using
PCIe TX_lane_P/N card’s three power states: 0.72W, 1.44W and 1.8W
PREST#, CLKREQ# SD/uSD Express
M.2 or PCIe slot

Socket (default) through the NVMe protocol.

PCIe_REF_CLK_100MHz

47uF Note: SD Express host is not required to recognize that the

22uF
inserted card is an SD Express type of card. As mentioned, the
1.8V card appears as standard NVM Express device. However, in
3.3V DC-DC
Converter cases where the host is aware of the existence of SD, and it
wants to read some of the unique SD registers information, it
may access it through some of the NVMe registers. For further
Figure 5 M.2/PCIe to SD7.x Adapter
information, refer to Section 8.1.7 of SD7.0 Specification for
Note that the 1.8V can be derived from 3.3V on the adapter board register mapping SD → NVMe/ PCIe.
using DC-DC converter as shown above (optional). The 1.8V supply
must be delivered to the card after the 3.3V supply is on.

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4. Hardware
4.1 SD and PCIe Host Interface with would be the handling of the switched signals. There are
SD Express Socket various ways to implement such switching considering the
nature of the combined signals, especially if it is implemented
This section provides an overview of how a host may within a SoC. In this document a straight forward example of
utilize an existing SD host controller and existing PCIe Bi-Directional Analog Switch is shown. Any type of solution
interface to implement the interface necessary to support that meets the SD Express interface requirements is correct.
SD Express cards.
PCIe/NVMe_
To PRSNT# of PCIe host interface SD Express
The PCIe interface used in SD Express card includes the Interface_Enable
New VDD2_ON
VDD2_ON Card Socket
following three signal groups: Card Detect
1.8v VDD2

System IO Registers
SD_CLK
• Differential interfaces SD_CMD CLK
CMD
- PCIe_TX_P and PCIe_TX_N – Inputs to the card SD Host SD_DAT3
PCIe/SD
Mode
- PCIe_RX_P and PCIe_RX_N – Outputs from the card Controller SD_DAT2

Analog Switch
Bi-directional
(At least 3.0) SD_DAT1 SD_DAT3/PCIe_PERST#
DAT3
• Differential CLK Interface SD_DAT0 SD_DAT2/PCIe_CLKREQ#
DAT2
SD_DAT1/PCIe_REFCLK_N
- PCIe_REFCLK_P and PCIe_REFCLK_N – Inputs PRSNT#
PCIe_PERST# SD_DAT0/PCIe_REFCLK_P
DAT1
DAT0
to the card PCIe_CLKREQ#
PCIe/NVMe Sys IO

PCIe/NVMe PCIe_REFCLK_N
These lines are muxed in the card with DAT0 Interface PCIe_REFCLK_P
New
and DAT1 of the SD interface (legacy with PCIe_TX_P PCIe_TX+
hot plugin PCIe_TX_N PCIe_TX-
PCIe_RX_P
• Sideband Signals support) PCIe_RX+
PCIe_RX_N PCIe_RX-
- PERST# – logic output from host to the card,
muxed in the card with DAT3 of the SD interface Figure 6 SD Express Host – Block Diagram
- CLKREQ# – Open drain I/O for both card and host
with pullup on host side, muxed in the card with The block diagram example of an SD Express host in Figure
DAT2 of the SD interface 6 shows a case in which host vendor, or chip-set vendor,
utilizes the existing PCIe host IP that supports hot plugin with
In addition, there is a VDD2 (1.8v) supply to the card that
card presence detect PRSNT# input and SD Host Controller
is required only for the PCIe mode. A possible solution is
with at least SD Host Controller (SHC) V3 specification
to use an existing PCIe host module and existing PCIe/
interface with minimal addition of two new control registers
NVMe drivers along with minimum changes in the SD host
to implement a unified SD Express card interface.
controller with an added analog switch for the front end, is
recommended by SDA and described in the next paragraph. The Bi-Directional Analog Switch shown is a functional
Note that there are other solutions allowing use of existing representation of various possible practical solutions that
circuitry of PCIe interface from different vendors available may be implemented. Its functionality is to do the switching
in the marketplace today. An example of such off-the-shelf between SD_DAT(3:0) lines and the side band signals + PCIe
solution is provided in Appendix B. REFCLK, allowing a single functionality, at a single time,
The SD Express interface was defined in a way that existing towards the SD Express card – either as PCIe or as SD. It is
PCIe IP (supporting hot plugin) and SD host controller V3 assumed that the PCIe/SD functionality is selected through a
may be used to implement the SD Express interface with control line.
minimal additions. The only challenge on the host side
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 The VDD2 line supplied to the SD Express only for PCIe Figure 8 shows a straightforward example of usage of
operation mode may be used to switch the Analog Switch external discrete component serving as Bi-Directional Analog
to PCIe mode. Note that the PCIe/SD Mode control signal, Switch. Any type of solution that will meet the SD Express
used for the Switch, and VDD2 may be implemented as interface requirements is acceptable.
separate control lines; however, it may be Card Detect Card Detect SW
GPIO2
VDD2_ON
simplified if VDD2 is used for the front end
SD_CLK 5 SD_CLK
PCIe/SD mode selection (see example as SD_CMD 3 SD_CMD

SD Host
well as the initialization flow charts shown in SD_DATA0 7 SD_DATA0/PCIe_REFCLK_P
8 SD_DATA1/PCIe_REFCLK_N
Chapter 5). SD_DATA1

EN
SD_DATA2 1.8V
DC-DC 9 VDD2 ( 1.8V)
Regulator 22uF
The Card Detection Mechanism in Figure SD_DATA3
Off-the-shelf analog switch
PCIe/NVMe_Interface_Enable#
GPIO1
6 shows an existing SD socket card detect
switch connected to an existing SHC and the PRSNT# 1 SD_DATA2/PCIe_CLKREQ#
2 SD_DATA3/PCIe_PERST#
REFCLK_P

card presence detect of the PCIe interface uSD Express

Socket
REFCLK_N 3V3
PCIe Host

(PRSNT#) is connected to the output of the CLKREQ#

R 4 VDD1 (3.3V)
47uF
new SHC register (controlled by a new PCIe/ PERST#
Off-the-shelf analog switch
6, 10,13,16 VSS

NVMe_Interface_Enable bit), allowing over all TX_P

AC Caps
11 PCIe_TX_P
TX_N 12 PCIe_TX_N
AC Caps
control of the drivers operations through the RX_P
220nF
15 PCIe_RX_P
14 PCIe_RX_N
RX_N
SD drivers. Detailed description of new control 220nF

Figure 8 A Practical Example of Mux/De-Mux circuit

bits of registers (VDD2_ON, PCIe/NVMe_Interface_Enable and
PCIe/NVMe support) is provided in section 4.1.1 below.
The following are a few hardware considerations when
Figure 7 describes the SD Express Host connections with implementing the above example:
emphasis on the new control lines and ability to perform • Parasitic capacitance of multiplexer device should be
the switching between SD and PCIe modes with their considered while selecting the multiplexer device and
associated drivers usage. A detailed flow chart of the designer should make sure the design meets the SI
updated SD drivers that can support the given example is requirements like jitter, insertion loss etc. for SD/PCIe
shown in Section 5.4. interface as per SD Express specification.
• To support hot insertion of SD Express cards, host
SD Express Host product design should provide enough capacitance
on host board on both VDD1 and VDD2 power rails
Standard
to reduce influence of voltage drop caused by hot
PCIe driver PCIe interface
PRSNT#
PCIe/NVMe
insertion. See Host Power Deliver Network (PDN)
Card
PCIe/NVMe
Interface Enable PCIe/NVMe
Interface Enable#
present Design Guide in Appendix E of SD 7.0 Specification for
VDD2_ON VDD2_ON VDD2_ON control
VDD2_ON
SD Express
Card_Detect
(Card
more details.
Special SD Control added to Insertion/Removal
Express SDHC 3.0 PCIe/SD mode Indication from
Driver Card connector’s switch)
Detect PCIe/SD
Mux unit
SD Interface

Figure 7 Block Diagram of SD Express Host with new Control lines

SD Express (SD7.x) Host Implementation Guideline
10 www.sdcard.org | ©2020 SD Association. All rights reserved
 • The given components such as the analog Switch are proposed register bit locations dedicated for SD Express are
provided as an example for reference only. It is the shown in Figure 9 as well. Additional details on the added
implementers responsibility to meet all the interface register bits are as follows:
electrical characteristics as defined in SD Express • VDD2_ON: Support of VDD2_ON was introduced in
specification. SHC V4.0 (originally dedicated for the UHS-II interface)
• Updated SD drivers should take care of the selection and is described in the Power Control Register,
between the modes of operation by enabling/ mapped as bit D04 in offset 29h. The same control bit
disabling of VDD2 supply and indication to the PCIe may be used for SD Express card. Turning on this bit
host unit about card insertion/removal. will connect VDD2 supply to the card as well as set the
• AC caps value can be from 176nF to 256nF for PCIe front end Analog Switch in the host to PCIe mode.
Gen3 speed and these caps must be placed very close • PCIe/NVMe_Interface_Enable: A new register area
to SD Express socket (< 12.5mm from Socket). is used for this new control bit – mapped as bit D00
in offset 55h. This bit, if set to “1,” will assert PRSNT#
4.1.1 Proposed Additions to SD Host (to “0”) line connected to the PCIe host interface. The
Controller – In Detail PRSNT# line is available in PCIe host interfaces that
support hot plugin used originally as indication for
Additions to existing SD Host Controller that enable the card insertion. Therefore, assertion of PRSNT# tells the
solution shown in Figure 6 are given below. Figure 9 shows PCIe drivers to take the control and start to initiate
the lower range of the SD Host Controller Register Map (as the card using the PCIe interface. The same way, if
provided in detail in the SD Host Controller Specification PCIe/NVMe_Interface_Enable bit is set to “0”, PRSNT#
available for SDA members in SDA Website). The newly is de-asserted (to “1”) which will indicate to the PCIe
host interface and drivers about
card removal.
• SD Express Support Indication:
Allowing the updated SD drivers
VDD2_ON: Use existing bit register
definition as appears in SHC ver 6.0 for to know whether the given SHC
“SD BUS Power for VDD2”
(just change the bit description to: supports SD Express interface the
“VDD2 Power On”)
Capabilities Register will be updated
PCIe/NVMe Support: Using reserved to include a new bit indicating
bit D20 in capabilities register to
indicate SHC supporting SD Express. PCIe/NVMe Interface Support –
If this bit is set to 1, it also means
1.8V VDD2 Support (D60) is set to 1 mapped as bit D20 in offset 40h.
PCIe/NVMe_Interface_Enable: Define If this bit indicates “1” (supporting
new register using this reserved area.
SD Express) then bit 1.8V VDD2
Support (D60) in Capabilities
PCIe/NVMe_
Interface_Enable Register is set to “1” as well.

Figure 9 SD Host Controller Register Map with added SD Express Support

SD Express (SD7.x) Host Implementation Guideline

11 www.sdcard.org | ©2020 SD Association. All rights reserved
 4.2 Power Supply 4.5 PCIe REFCLK guidelines
Table 1 describes the voltage ranges and max current levels Refer to Section 8.2.3 and Table 8-3 of SD 7.0 Specification for
for SD Express card in PCIe mode of operation. REFCLK specification.

Note that in any case, the card is not allowed to consume 4.6 PCIe Sideband signals CLKREQ# and PERST#
more than 1.80W in total. Guidelines
Refer to Section 8.2.4 of SD 7.0 Specification for CLKREQ#
Peak Current [Max Normal Current [Max
Power Rail Voltage Range Avg at 25usec (mA)] Avg at 1sec (mA)] and PERST# electrical specification.
VDD1 (3.3) 2.7 - 3.6V 600 400
4.7 PCIe AC Coupling Capacitors
VDD2 (1.8) 1.7 – 1.95V 600 400
Refer to Section 8.2.5 of SD 7.0 Specification for A.C.
Table 1 Voltage Ranges and Max Currents coupling capacitors placement guidelines.
Allowed in SD Express card at PCIe mode
4.8 PCIe TX/RX PHY Protection
4.3 Hot Plug-in/Removal and Card Detection Refer to Section 8.2.6 of SD 7.0 Specification for 3.3v IO tolerance
The PCIe host should support Hot plug-in and removal. on PCIe TX/RX PHY.
It is highly recommended to turn off the power supplies
before card removal. An SD Express host should use the 4.9 ESD Recommendations
card detection switch of the connector as the SD Express Refer to Section 6.8 of SD 7.0 Specification ESD Guidelines.
card presence detection mechanism, which is the same as
used by the existing SD Host Controller. The card presence 4.10 SD Express and microSD Express
detection of the PCIe interface (PRSNT#) is connected to the Connectors Suppliers
output of SHC, allowing the SD drivers to inform the PCIe 4.10.1 SD Express Full Size Card Connector
interface about card insertion/removal. The SD Express pads layout/location is identical to UHS-II;
therefore, any existing full-size SD UHS-II connectors that
VDD2 shall be OFF while card is inserted. VDD2 should operate in the desired speeds will work. It is recommended to
be turned on only if PCIe interface is to be initiated and check with the connector vendors for availability and supported
always only after VDD1 was turned ON. VDD2 is used to frequencies.
switch the front-end Analog Switch of the host to PCIe
mode as well as is one of the factors that will trigger card SDA members offering UHS-II connectors suppliers include:
to switch into PCIe mode. • Yamaichi - Link1 Link2
• Amphenol ICC - Link
4.4 PCIe Differential Voltage Swing • Others1
Refer to Section 8.2.2 of SD 7.0 Specification for differential
4.10.2 microSD Express Connector
voltage swing details.
The microSD Express Card requires new connectors to be used
_____________ because the location and size of the second row is different from
(1) The listed sources are the companies known to the author at the publication the microSD UHS-II cards.
date. Any other SDA member that supply such connectors are welcome to microSD Express (SD7.1) connector suppliers:
contact SDA office to be added in the given list.
• Amphenol ICC - www.amphenol-icc.com/micro-sd-express
(2) The listed sources are the companies known to the author at the publication
• Others2
date. Any other SDA member that supply such connectors are welcome to
contact SDA office to be added in the given list.
SD Express (SD7.x) Host Implementation Guideline
12 www.sdcard.org | ©2020 SD Association. All rights reserved
 5. SW Drivers

Before discussing the actual drivers - a flow

Card Insertion Detect
chart of two possible initialization processes
as defined in SD specification is shown in a
Start SD CLK and initialization up
simplified manner. Figure 10 shows a case to CMD8
where the SD Express host initializes the SD
Express card through the PCIe interface. If the
Check whether PCIe is supported
initialization fails, it defaults to SD interface. PCIe is supported Stop SD CLK
(R7 of CMD8)
Figure 11 shows a case where the SD Express
host initializes the SD Express card first through Assure PERST# asserted
PCIe Not supported
and pullup on CLKREQ#
SD interface, checking if the card supports (both done by PCIe
Continue SD initialization and Indicate to PCIe drivers to start
interface) and turn
PCIe then switches to PCIe mode. operation in SD mode
VDD2 ON its initialization process

The example flows are simplified to assume that Proceed in PCIe/NVMe

operation
PCIe and SD drivers can both be updated and
may control the transfer of control to the other Figure 11 Flow Chart of Initialization process starts from SD drivers first
driver. It is shown just for the sake of understanding the
general init flow. The solution provided in this document As shown, SD Express host or chipset providers can use
allows change only of SD drivers while keeping the PCIe its existing PCIe and SD interfaces and combine them
drivers as is. The actual new flows that consider the with front end circuitry, that can be implemented either
proposed HW above is given in section 5.4 below. externally to existing SoCs or inside a future SoC.

Card Insertion Detect

Regardless of the actual HW implementation, the host will
Assert PERST# and pullup on need to update its SW drivers to support the new SD Express
CLKREQ# (as defined in PCIe training
process) and turn on VDD2 Interface. Assuming that the host supports standard PCIe
and NVMe drivers the only required update is to the SD
CLKREQ not asserted within 1mS
Wait for CLKREQ# Or PCIe Linkup failed Turn VDD2 Off (not required by SD drivers as follows:
asserted by card
express spec but required for the SD
and PCIe linkup
Express Host Example shown
• Updated SD drivers supporting the new registers
success
Indicate to SD drivers to start proposed for the SHC that detect the SD Express card
Linkup process passed its initialization process
Proceed with SD Initialization and
type and perform the switch between the interfaces
Proceed in PCIe/NVMe operation operation (controls the VDD2 _ON and PCIe/NVMe_Interface_
Figure 10 Flow Chart of Initialization process Enable).
starts from PCIe drivers first • In case that the host does not support NVMe, add
standard NVMe drivers above the PCIe, supporting a
standard NVMe device interface.

SD Express (SD7.x) Host Implementation Guideline

13 www.sdcard.org | ©2020 SD Association. All rights reserved
A description of the drivers layering in Android based
system is shown in Figure 12.

References to existing NVMe drivers and SD are

discussed in the following sections.

IMPORTANT: The proposed solution assumes usage

of standard PCIe drivers (supporting hot plugin) while
the SD drivers need to be updated to support the new
init flow and switch control to/from SD/PCIe interface
as shown in section 5.4.

5.1 NVMe Drivers

Table 2 includes a list of a few available drivers for
NVMe for the various operating systems as provided in
http://www.nvmexpress.org/drivers/

Figure 12 SD Express – Android Host Driver Layers Overview

5.2 PCIe Drivers

Standard PCIe drivers providing hot plugin are supported
by most of the OSs including Windows and Android (Linux/
Kernel). The Linux drivers can be found in the standard
Linux-Kernel code package: https://www.kernel.org/. The PCIe
Hotplug support is part of the whole package and can be
Table 2 NVMe Drivers found in the following kernel file tree: drivers/pci/hotplug/
pciehp_hpc.c.

SD Express (SD7.x) Host Implementation Guideline

14 www.sdcard.org | ©2020 SD Association. All rights reserved
5.3 Existing SD Drivers (for legacy cards)
Table 3 describes operating systems that support
existing SD drivers for SHC v3.0. SD Express updated
drivers will be required as described in section 5.4.
These new drivers are expected to be contributed to
the open source community and hopefully adopted
Table 3 Existing SD Drivers
by Windows.

5.4 The New SD Drivers Functionality Note that fallback option (switch PCIe mode to SD mode) in
both cases is not shown because it requires, for example, a
As mentioned earlier, in order to support the SD Express special OS Sys application that tracks the PCIe initialization
Host example shown in Figure 7 only the SD drivers need failure and provides the information to the SD drivers, and
to be updated, in comparison to the SD-mode-only SHC such information may not be provided directly from the
v3 drivers. Standard PCIe drivers that support hot plugin standard PCIe drivers. This application is not defined because
and standard NVMe drivers may be used as-is. Figure 13 the fallback method relies on host system implementation.
below shows more detail of the init flow of the SD Express
supported SD driver for SD-First case. The green blocks Table 4 describes the advantages of one initialization process
relate to the SD driver and the blue to the PCIe drivers. over the other.

Inserted standard SD SD Express

Case# card Pros Cons Pros Cons
#1 SD-First No delay --- --- Few mS delay due to SDs
in init 74clks+CMD0+CMD8
#2 PCIe-First --- 1ms of PCIe training OR Linkup No ----
time(in case that CLKREQ# ignored delay in
by host) + OS App time if needed* Init
(*) If we assume no change in PCIe driver then external OS Sys App is required to monitor for PCIe failure and inform the SD driver
The response time of such App is not so predictable, might take more significant time and therefore this option will not be discussed here

Table 4 Pros and Cons of Initialization options: SD-First or PCIe-First

SD Express (SD7.x) Host Implementation Guideline

15 www.sdcard.org | ©2020 SD Association. All rights reserved
 Enable the Card Insertion/Removal
interrupts
A
Sleep
(wait for interrupt)
Flow Chart of New SD Driver Process related to SD Express
Card Card
Insertion Removal

- De-assert PCIe_PRSNT#
- Turn Off VDD2
Start SD CLK and Init up to CMD8

Check whether PCIe PCIe supported - Stop SD CLK

is supported
(R7 of CMD 8) - Turn on VDD2 and assert PCIe/NVMe_Interface_Enable

PCIe Not supported Assertion of PCIe/NVMe_Interface_Enable asserts

A
PRSNT# to PCIe that initiate the PCIe driver

Continue in PCIe mode

Continue SD Init and operation in SD PCIe interface initialized:

mode Assure PERST# is asserted and pullup
on CLKREQ# - as defined in PCIe
training process
Continue PCIe training

Figure 13 Flow Chart of the updated SD Drivers Operation during Initialization

Host vendors should be aware that this interface supports prevents SD Cards without the PCIe interface to go through
either legacy SD cards or SD Express cards. But for SD the trial of PCIe and the subsequent time consuming
Express cards, there is no fallback to SD option proposed re-tries. As long as standard PCIe drivers are used – the
in the rare chance of a malfunctioning PCIe interface. option of SD-First (without fallback option) is both the
safest and fastest solution.
SDA recommends implementation of the SD-First option
using an updated SD driver that can handle the switch
between either SD mode or PCIe/NVMe mode. This

SD Express (SD7.x) Host Implementation Guideline

16 www.sdcard.org | ©2020 SD Association. All rights reserved
6. Power and Thermal Management

Power consumption affects two main aspects: Consumed by the card. SD Express specification defined three power
Energy, or power over time, which impacts battery life; and levels supported by any SD Express card as following: 1.8W
thermal issues arising from high power generating heat (default), 1.44W and 0.72W (Refer to Section 8.1.8 in SD7.x
that needs to be controlled and kept under the maximum specification for further information).
allowed temperatures.
The detailed description of the Power States structure and
Following are the main two PCIe/NVMe features that should usage by NVMe is provided in the NVMe Specification, Section 8.4.
be used by the host to take control over the above two issues. For SD Express card operates in SD mode the same power
levels (1.8W, 1.44W and 0.72W) are supported and controlled
6.1 PCIe Power Management
through the existing SD power modes control mechanism.
PCIe interface supports several Power Modes (PM) that
A SD Express host will use the NVMe power states for thermal
control the consumed power in idle state by setting internal
management assuming that limiting the card’s power
various configurations of the differential interface as shown
consumption should reduce the card’s case temperature.
in Table 5. Each state might have different power vs. wake-
Refer to the thermal management feature in NVMe Protocol
up time characteristics.
Section 8.4.5 for more information.
For longer battery life host should support L1.0 and its
substates (L1.1 and L1.2) along with the control of CLKREQ#
signal (as introduced by PCIe 3.1) for maximum power
saving during idle mode.
Table 6 Card’s Maximum Card Case Temperature (Tc)
allowed at each Power State

Host need to maintain card case temperature at a given

power state as shown in Table 6 (as shown in section 3.7 of
microSD Card Addendum version 7.1 and section 3.6 of Standard
Size SD Card Mechanical Addendum version 7.0 )

In order to utilize best performance capabilities of the card,

it is recommended for host vendors to conduct a full system
Table 5 PCIe Power Substates level thermal simulation to arrive at optimized thermal design.

Following are some of the ways to counter thermal challenges:

For more information, refer to power management feature
• Host PCB/s design • Connector design
using L1.1 and L1.2 PM substates recommended in PCI-SIG
• Heat pipe • Heat sink and fan
V3.1a Chapter 5.5.
• Graphene tape
6.2 NVMe Power States This document includes some commonly used ideas for
NVMe specification supports the Power States feature thermal solutions in Appendix A.
allowing the host to control the maximum consumed power
SD Express (SD7.x) Host Implementation Guideline
17 www.sdcard.org | ©2020 SD Association. All rights reserved
7. SD Express and microSD Express Test

Since SD Express is using a standard PCIe interface and

introduces itself as a standard NVMe device, any standard
off the shelf test equipment used for PCIe electrical and
protocol tests and NVMe protocol tests may be used to test
the PCIe/NVMe interface of the card side or host side.

SDA has built SD Express test fixtures that serve as adapters

to existing PCI SIG Compliance Load Board as well as
adapters for host testing. Those test fixtures are available by
SDA or any of our approved test labs.

Figure 14 to Figure 16 show pictures of the available test

fixtures. Card and host manufacturers may use them in the
test labs or in their own facilities and utilize existing PCIe/ Figure 15 microSD Express Test Adapter installed
NVMe test equipment to perform compliance tests used by on standard CBB as PCIe add-in card
PCI SIG.

Figure 16 microSD Express and SD Express Host Test Adapters

may be inserted to related SD Express hosts

Figure 14 microSD Card and Host test adapters

SD Express (SD7.x) Host Implementation Guideline

18 www.sdcard.org | ©2020 SD Association. All rights reserved
Appendix A: Common Thermal Conducting Solutions

In addition to the power throttling mechanism

mentioned in section 6.2, a thermal management
and control require also a proper mechanical system
design considering the thermal issues. There are
various methods used today in the industry. Some
of the commonly used methods are provided in this
Appendix.

A.1 Host PCB/s Design

Proper thermal isolation from other heat dissipating Figure 17 Recommended PCB
elements and more PCB area around socket, in general, high level design concepts
helps in heat spreading.

A.2 Heat Pipe

Host may use heat pipe for their processors.
Research shows use of exclusive heat pipe helps
to reduce card temperatures considerably.

Figure 18 Heat Pipe

Source: https://commons.wikimedia.org/wiki/File:Heat_Pipe_Mechanism.png

Note: Careful routing of heat pipes required, to take the

heat away from hotspot to the colder regions in the system.

SD Express (SD7.x) Host Implementation Guideline

19 www.sdcard.org | ©2020 SD Association. All rights reserved
 A.3 Graphene Tape
Heat spreader tapes are used often in all electronic
devices to lower the hotspot temperature. In similar
lines, it is recommended to use graphene tape that
showed temperature drop of few degrees as per
related research. Thicknesses ranging from 20-50
um are available in the market. Two methods of
using graphene tape may be considered. First,
it may be applied on the card itself. Second, the
more beneficial method is to apply the tape on
the connector and PCB covering as much large
area as possible. It can be used as layer above card Figure 19 Graphene Tape
connector to uniformly distribute heat.

Reference: https://www.researchgate.net/publication/271551161_Characterization_for_
graphene_as_heat_spreader_using_thermal_imaging_method

A.4 Connector Design

Minimizing thermal resistance between card/connector and between connector/host is critical.
Changing connector material from stainless steel to brass or copper and having better thermal
contact between connector and PCB to reduce air cavities helps to reduce card temperature.

A.5 Heat Sink and Fan Assembly

The proven heat sink and fan assembly is a go-to option in case there are no space constraints.
Recommended to use blower type fan to get focused jet of air over the heat sink.

SD Express (SD7.x) Host Implementation Guideline

20 www.sdcard.org | ©2020 SD Association. All rights reserved
 Appendix B:
Off-The-Shelf SD Express Host Solution

There are existing off-the-shelf SD Express host solutions available in the market that product
manufacturers may choose to adopt in case it fits their needs.

BayHub Technology provides a solution for SD Express (SD7.x) Host Controller implementation
as described in the following here: http://www.bayhubtech.com/upload/Image/20200414/202
00414013403_92715.jpg

Other off-the-shelf solutions may be available in the future3.

_____________

(3) The listed resources are companies known to the author at the publication date. Any other SDA
member that supply such solutions are welcome to contact SDA office to be added in the given list.

SD Express (SD7.x) Host Implementation Guideline

21 www.sdcard.org | ©2020 SD Association. All rights reserved