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    5fcb3d1f-9587-4491-9555-5a812eb78f27

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    5fcb3d1f-9587-4491-9555-5a812eb78f27

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    5fcb3d1f-9587-4491-9555-5a812eb78f27

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    of 1

    3 mW, 100 kSPS,

    16-Bit ADC in 6-Lead SOT-23


    AD7680
    FEATURES FUNCTIONAL BLOCK DIAGRAM
    Fast throughput rate: 100 kSPS VDD
    Specified for VDD of 2.5 V to 5.5 V
    Low power
    16-BIT SUCCESSIVE
    3 mW typ at 100 kSPS with 2.5 V supply VIN T/H APPROXIMATION
    ADC
    3.9 mW typ at 100 kSPS with 3 V supply
    16.7 mW typ at 100 kSPS with 5 V supply
    SCLK
    Wide input bandwidth AD7680 CONTROL
    SDATA
    LOGIC
    86 dB SNR at 10 kHz input frequency CS

    03643-0-001
    Flexible power/serial clock speed management
    No pipeline delays GND

    High speed serial interface


    Figure 1.
    SPI®/QSPI™/μWire/DSP compatible
    Standby mode: 0.5 μA max
    6-Lead SOT-23 and 8-Lead MSOP packages Table 1. MSOP/SOT-23 16-Bit PulSAR ADC
    APPLICATIONS Type/kSPS 100 kSPS 250 kSPS 500 kSPS
    Battery-powered systems: True Differential AD7684 AD7687 AD7688
    Personal digital assistants Pseudo Differential AD7683 AD7685 AD7686
    Medical instruments Unipolar AD7680
    Mobile communications
    Instrumentation and control systems
    Remote data acquisition systems
    High speed modems
    Optical sensors
    GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
    The AD7680 is a 16-bit, fast, low power, successive 1. First 16-bit ADC in a SOT-23 package.
    approximation ADC. The part operates from a single 2.5 V to
    2. High throughput with low power consumption.
    5.5 V power supply and features throughput rates up to 100 kSPS.
    The part contains a low noise, wide bandwidth track-and-hold 3. Flexible power/serial clock speed management. The
    amplifier that can handle input frequencies in excess of 7 MHz. conversion rate is determined by the serial clock, allowing
    the conversion time to be reduced through the serial clock
    The conversion process and data acquisition are controlled speed increase. This allows the average power consumption
    using CS and the serial clock, allowing the devices to interface to be reduced when a power-down mode is used while not
    with microprocessors or DSPs. The input signal is sampled on converting. The part also features a shutdown mode to
    the falling edge of CS and the conversion is also initiated at this maximize power efficiency at lower throughput rates.
    point. There are no pipeline delays associated with the part. Power consumption is 0.5 μA max when in shutdown.

    The AD7680 uses advanced design techniques to achieve very 4. Reference derived from the power supply.
    low power dissipation at fast throughput rates. The reference for
    5. No pipeline delays.
    the part is taken internally from VDD, which allows the widest
    dynamic input range to the ADC. Thus, the analog input range This part features a standard successive approximation ADC
    for this part is 0 V to VDD. The conversion rate is determined by with accurate control of the sampling instant via a CS input and
    the SCLK frequency. once-off conversion control.

    Rev. A
    Information furnished by Analog Devices is believed to be accurate and reliable.
    However, no responsibility is assumed by Analog Devices for its use, nor for any
    infringements of patents or other rights of third parties that may result from its use.
    Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
    or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com
    registered trademarks are the property of their respective owners. Fax: 781.326.8703© 2004-2011 Analog Devices, Inc. All rights reserved.

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