The Tri-State Buffer

• This circuit has two inputs and one output.

– The first input behaves like the normal input for
the circuit.
– The second input is an “enable”.
• If it is set high, the output follows the proper circuit
behavior.
• If it is set low, the output looks like a wire connected to
nothing.

Input Output OR Input Output

Enable Enable

Dr. Mehfuza Holia 2EL11: 1

Microcontrollers
 The Basic Memory Element
• The basic memory element is similar to a D latch.
• This latch has an input where the data comes in.
It has an enable input and an output on which
data comes out.

Data Input Data Output

D Q

Enable
EN

Dr. Mehfuza Holia 2EL11: 2

Microcontrollers
 The Basic Memory Element
• However, this is not safe.
– Data is always present on the input and the output
is always set to the contents of the latch.
– To avoid this, tri-state buffers are added at the
input and output of the latch.

Data Input Data Output

D Q

WR RD
Enable
EN

Dr. Mehfuza Holia 2EL11: 3

Microcontrollers
 The Basic Memory Element
• The WR signal controls the input buffer.
– The bar over WR means that this is an active low
signal.
– So, if WR is 0 the input data reaches the latch
input.
– If WR is 1 the input of the latch looks like a wire
connected to nothing.
• The RD signal controls the output in a similar
manner.

Dr. Mehfuza Holia 2EL11: 4

Microcontrollers
 A Memory “Register”
• If we take four of these latches and connect them
together, we would have a 4-bit memory register

I0 I1 I2 I3

WR
D D D D
Q Q Q Q

EN EN EN EN
EN

RD O0 O1 O2 O3

Dr. Mehfuza Holia 2EL11: 5

Microcontrollers
 A group of memory registers
D0 D1 D2 D3

o o o o
WR

D Q D Q D Q D Q

EN EN EN EN

– Expanding on this D Q D Q D Q D Q

scheme to add more EN EN EN EN

memory registers we get

the diagram to the right. D Q D Q D Q D Q

EN EN EN EN

D Q D Q D Q D Q

EN EN EN EN

o o o o
RD

D0 D1 D2 D3

Dr. Mehfuza Holia 2EL11: 6

Microcontrollers
 A group of Memory Registers
– If we represent each memory location (Register)
as a block we get the following
I0 I1 I2 I3

WR Input Buffers

EN0 Memory Reg. 0

EN1 Memory Reg. 1

EN2 Memory Reg. 2

EN3 Memory Reg. 3

RD Output Buffers

O0 O1 O2 O3

Dr. Mehfuza Holia 2EL11: 7

Microcontrollers
 The Design of a Memory Chip
• Using the RD and WR controls we can determine
the direction of flow either into or out of memory.
Then using the appropriate Enable input we
enable an individual memory register.

• What we have just designed is a memory with 4

locations and each location has 4 elements (bits).
This memory would be called 4 X 4 [Number of
location X number of bits per location].

Dr. Mehfuza Holia 2EL11: 8

Microcontrollers
 The Enable Inputs
• How do we produce these enable line?
– Since we can never have more than one of these
enables active at the same time, we can have
them encoded to reduce the number of lines
coming into the chip.
– These encoded lines are the address lines for
memory.

Dr. Mehfuza Holia 2EL11: 9

Microcontrollers
 The Design of a Memory Chip
– So, the previous diagram would now look like the
following:
I0 I1 I2 I3

WR Input Buffers

A D Memory Reg. 0
d e
A1 d c Memory Reg. 1
r o
e Memory Reg. 2
A0 d
s e Memory Reg. 3
s r

RD Output Buffers

O0 O1 O2 O3

Dr. Mehfuza Holia 2EL11: 10

Microcontrollers
 The Design of a Memory Chip
• Since we have tri-state buffers on both the inputs
and outputs of the flip flops, we can actually use
one set of pins only.
– The chip would now look like this:

WR Input Buffers

A D Memory Reg. 0 D0 D0
d e
A1 d c Memory Reg. 1 D1 A1 D1
r o
e Memory Reg. 2 D2 D2
A0 d A0
s e Memory Reg. 3
s r D3 D3

RD Output Buffers
RD WR

Dr. Mehfuza Holia 2EL11: 11

Microcontrollers
 The steps of writing into Memory
• What happens when the programmer issues the
STA instruction?
– The microprocessor would turn on the WR control
(WR = 0) and turn off the RD control (RD = 1).
– The address is applied to the address decoder
which generates a single Enable signal to turn on
only one of the memory registers.
– The data is then applied on the data lines and it is
stored into the enabled register.

Dr. Mehfuza Holia 2EL11: 12

Microcontrollers
 Dimensions of Memory
• Memory is usually measured by two numbers: its
length and its width (Length X Width).
• The length is the total number of locations.
• The width is the number of bits in each location.

– The length (total number of locations) is a function

of the number of address lines.
# of memory locations = 2( # of address lines)

• So, a memory chip with 10 address lines would have

210 = 1024 locations (1K)

• Looking at it from the other side, a memory chip with 4K

locations would need
Log2 4096=12 address lines
Dr. Mehfuza Holia 2EL11: 13
Microcontrollers
 The 8085 and Memory
• The 8085 has 16 address lines. That means it
can address
216 = 64K memory locations.
– Then it will need 1 memory chip with 64 k
locations, or 2 chips with 32 K in each, or 4 with
16 K each or 16 of the 4 K chips, etc.

• how would we use these address lines to control

the multiple chips?

Dr. Mehfuza Holia 2EL11: 14

Microcontrollers
 Chip Select
• Usually, each memory chip has a CS (Chip
Select) input. The chip will only work if an active
signal is applied on that input.

• To allow the use of multiple chips in the make up

of memory, we need to use a number of the
address lines for the purpose of “chip selection”.
– These address lines are decoded to generate the
2n necessary CS inputs for the memory chips to
be used.

Dr. Mehfuza Holia 2EL11: 15

Microcontrollers
 Chip Selection Example
– Assume that we need to build a memory system
made up of 4 of the 4 X 4 memory chips we
designed earlier.

– We will need to use 2 inputs and a decoder to

identify which chip will be used at what time.

– The resulting design would now look like the one

on the following slide.

Dr. Mehfuza Holia 2EL11: 16

Microcontrollers
 Chip Selection Example

RD

WR

D0
D1
RD WR RD WR RD WR RD WR

A0 A0 A0 A0
A1 A1 A1 A1
CS CS CS CS

A0
A1

A2 2 X4

A3 Decoder

Dr. Mehfuza Holia 2EL11: 17

Microcontrollers
 Memory Map and Addresses
• The memory map is a picture representation of
the address range and shows where the different
memory chips are located within the address
range.
0000 0000
EPROM Address Range of EPROM Chip
3FFF
4400
RAM 1 Address Range of 1st RAM Chip
5FFF
Address Range

6000
RAM 2 Address Range of 2nd RAM Chip
8FFF
9000
RAM 3 Address Range of 3rd RAM Chip
A3FF
A400

RAM 4 Address Range of 4th RAM Chip

F7FF
FFFF

Dr. Mehfuza Holia 2EL11: 18

Microcontrollers
 Address Range of a Memory Chip
• The address range of a particular chip is the list
of all addresses that are mapped to the chip.

– An example for the address range and its

relationship to the memory chips would be the
Post Office Boxes in the post office.
– Each box has its unique number that is assigned
sequentially. (memory locations)
– The boxes are grouped into groups. (memory chips)
– The first box in a group has the number immediately after
the last box in the previous group.

Dr. Mehfuza Holia 2EL11: 19

Microcontrollers
 Address Range of a Memory Chip
– The above example can be modified slightly to
make it closer to our discussion on memory.
– Let’s say that this post office has only 1000 boxes.
– Let’s also say that these are grouped into 10 groups of 100
boxes each. Boxes 0000 to 0099 are in group 0, boxes
0100 to 0199 are in group 1 and so on.

– We can look at the box number as if it is made up

of two pieces:
– The group number and the box’s index within the group.
– So, box number 436 is the 36th box in the 4th group.

The upper digit of the box number identifies the group and the
lower two digits identify the box within the group.

Dr. Mehfuza Holia 2EL11: 20

Microcontrollers
 The 8085 and Address Ranges
• The 8085 has 16 address lines. So, it can
address a total of 64K memory locations.
– If we use memory chips with 1K locations each,
then we will need 64 such chips.
– The 1K memory chip needs 10 address lines to
uniquely identify the 1K locations. (log21024 = 10)
– That leaves 6 address lines which is the exact
number needed for selecting between the 64
different chips (log264 = 6).

Dr. Mehfuza Holia 2EL11: 21

Microcontrollers
 The 8085 and Address Ranges
• Now, we can break up the 16-bit address of the
8085 into two pieces:

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Chip Selection Location Selection within the Chip

– Depending on the combination on the address lines

A15 - A10 , the address range of the specified chip is
determined.

Dr. Mehfuza Holia 2EL11: 22

Microcontrollers
 Chip Select Example
• A chip that uses the combination A15 - A10 =
001000 would have addresses that range from
2000H to 23FFH.
– Keep in mind that the 10 address lines on the chip gives a range of
00 0000 0000 to 11 1111 1111 or 000H to 3FFH for each of the
chips.
– The memory chip in this example would require the following circuit
on its chip select input:
A10

A11

A12 CS
A13

A14

A15

Dr. Mehfuza Holia 2EL11: 23

Microcontrollers
 Chip Select Example
• If we change the above combination to the
following: A 10

A 11

A 12 CS

A 13

A 14

A 15

– Now the chip would have addresses ranging from:

2400 to 27FF.
– Changing the combination of the address bits
connected to the chip select changes the address
range for the memory chip.

Dr. Mehfuza Holia 2EL11: 24

Microcontrollers
 Chip Select Example
– To illustrate this with a picture:
• in the first case, the memory chip occupies the piece of
the memory map identified as before.
• In the second case, it occupies the piece identified as
after.

Before After
0000 0000

2000
23FF 2400
27FF

FFFF FFFF

Dr. Mehfuza Holia 2EL11: 25

Microcontrollers
 High-Order vs. Low-Order Address Lines
• The address lines from a microprocessor can be
classified into two types:
– High-Order
• Used for memory chip selection
– Low-Order
• Used for location selection within a memory chip.

– This classification is highly dependent on the

memory system design.

Dr. Mehfuza Holia 2EL11: 26

Microcontrollers
 Data Lines
• All of the above discussion has been regarding
memory length. Lets look at memory width.
• We said that the width is the number of bits in
each memory word.
– We have been assuming so far that our memory
chips have the right width.
– What if they don’t?
• It is very common to find memory chips that have only 4
bits per location. How would you design a byte wide
memory system using these chips?
• We use two chips for the same address range. One chip
will supply 4 of the data bits per address and the other
chip supply the other 4 data bits for the same address.

Dr. Mehfuza Holia 2EL11: 27

Microcontrollers
 Data Lines

CS

A0
…
A9

CS CS

D0
…
D3
D4
…
D7

Dr. Mehfuza Holia 2EL11: 28

Microcontrollers