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Computer Architecture_Lecture 05 (1)

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11 views

Computer Architecture_Lecture 05 (1)

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fariha1117
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Architecture

Lecture 05
Cache Memory

Instructor: Sultana Jahan Soheli


Assistant Professor, ICE, NSTU
Reference Books
• Computer Organization and Architecture:
Designing for Performance- William Stallings
(8th Edition)
– Any later edition is fine
Overview
• Computer memory is organized into a hierarchy
• At the highest level (closest to the processor) are the
processor registers
• Next comes one or more levels of cache
– When multiple levels are used, they are denoted L1, L2,
and so on
• Next comes main memory
• The hierarchy continues with external memory
• Next level typically is a fixed hard disk, and one or more levels
below that consisting of removable media such as optical
disks and tape
Overview

Table:
Key
Characteristics
of Computer
Memory
Systems
Performance of Memory
• Based on three performance parameters
• Access time (latency): For random-access memory, this is the time
it takes to perform a read or write operation
– For non-random-access memory, access time is the time it takes
to position the read–write mechanism at the desired location
• Memory cycle time: This concept is primarily applied to random-
access memory and consists of the access time plus any additional
time required before a second access can commence
– This additional time may be required for transients to die out on
signal lines or to regenerate data if they are read destructively
• Transfer rate: This is the rate at which data can be transferred into
or out of a memory unit
– For random-access memory, it is equal to 1/(cycle time)
Performance of Memory
• For non-random-access memory, the following relationship
holds:
݊
𝑇𝑁 = 𝑇𝐴 +
𝑅
• where
TN = Average time to read or write N bits
TA = Average access time
n = Number of bits
R = Transfer rate, in bits per second (bps)
• Several physical characteristics of memory are also important
The Memory Hierarchy
Depends on:
a. Faster access time, greater cost
per bit
b. Greater capacity, smaller cost per
bit
c. Greater capacity, slower access
time
Cache Memory Principles
Cache Memory Principles
• The cache contains a copy of portions of main memory
• When the processor attempts to read a word of
memory, a check is made to determine if the word is in
the cache. If so, the word is delivered to the processor
• If not, a block of main memory, consisting of some
fixed number of words, is read into the cache and then
the word is delivered to the processor
• When a block of data is fetched into the cache to
satisfy a single memory reference, it is likely that there
will be future references to that same memory location
or to other words in the block
– Locality of reference
Cache Memory Structure
Cache Read Operation
Typical Cache Organization
Elements Of Cache Design
Cache Addresses
Direct Mapping
• The mapping is expressed as:
݊ = ݊݊‫݊݋݊𝑢𝑑݋‬
• where
i = cache line number
j = main memory block number
m = number of lines in the cache
Mapping Mechanisms
Mapping Mechanisms
Direct Mapping Technique
Direct Mapping Example
Direct Mapping Example

• Advantage and Disadvantage?

– Refer to text book

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