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CADD Project Based Assignments

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Vandana Ch
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18 views

CADD Project Based Assignments

Uploaded by

Vandana Ch
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Project Based Assignments

1.Develop a Verilog Code to Design a ALU which Performs arithmetic Operation by using case statement

2. Develop a Verilog Code to Design a ALU which Performs arithmetic Operation by using If else
Statement
3. Develop a Verilog Code to Design a ALU which Performs logic Operation by using If else Statement.
4. Develop a Verilog Code to Design a ALU which Performs logic Operation by using If else Statement.
5. Implement a 4-bit shift register with right and left shifting capabilities.
6. Develop a Verilog Code to design digital clock to count hours, minutes, and seconds.
7. Develop a Verilog code for Carry Look adder
8. Design a FSM for Elevator and Develop a Verilog for same
9. Design a RAM 1MB memory and implement using FPGA
10. Design a ROM 1MB memory and implement using FPGA
11. Develop a Verilog code for Carry Skip adder
12. Develop a Verilog code for sequence detector 1010 Moore state machine
13. Develop a Verilog code for sequence detector 1010 Mealy sate machine
13. Develop a Verilog code for the following LFSR Diagram

14. Generate a Verilog code for 10khz frequency


15. Develop a Verilog Code for traffic Light Controller
16. Develop a Verilog code clk divider for 500 Hz
17. Develop a Verilog code for 7 segment LED
18. Develop a verilog code for the following case statement
Grade lies between <40 display F
Grade lies between >40 and <60 display D
Grade lies between >61 and <70 display C
Grade lies between >70 and <80 display B
Grade lies between >81 and <100 display A
19. Develop a Verilog code for 100-bit counter
20. Generate PWM signal with 50% duty cycle of 20khz frequency.
21 Design a 64 to I Mux using structural Modelling
22. Develop a Verilog code ring counter
23. Develop a Verilog code a Synchronous counter and a synchronous Counter
24. Develop a verilog code for Keypad matrix
25. Develop a verilog code for twisted ring counter

S. No Roll. No Question No
1 22211A0404 23215A0406 11
2 22211A0405 22211A0469 2
3 22211A0407 22211A0476 1
4 22211A0409 22211A0480 12
5 22211A0414 22211A0483 5
6 22211A0416 22211A0485 3
7 22211A0420 22211A0488 21
8 22211A0421 22211A0489 4
9 22211A0424 22211A0495 24
10 22211A0431 22211A0497 22
11 22211A0438 22211A0498 6
12 22211A0445 22211A0499 25
13 22211A0446 22211A04A0 8
14 22211A0447 22211A04A3 23
15 22211A0449 22211A04A4 9
16 22211A0451 22211A04A6 20
17 22211A0452 22211A04B7 16
18 22211A0453 22211A04B8 15
19 22211A0457 22211A04B9 17
20 22211A0458 22211A04C0 14
21 22211A0461 22211A04C1 18
22 23215A0401 22211A04C4 19
23 23215A0402 23215A0409 13
24 23215A0404 23215A0412 10
22211A0460
25 23215A0415 7
23215A0403

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