Chapter 8

ADVANCED IMAGING : NOISE AND SMEAR

As learned from the preceding chapter, where the signal-to-noise ratio was stated
to be one of the key performance factors, the noise behavior of a solid-state imager
is a very important parameter. It determines the lower limit of the imager’s operational
range. But the noise of a charge-coupled device is more than just the denominator
of the S/N ratio. The overall noise figure is a combination of different noise sources
which all have their own specific frequency spectrum and temperature dependence.
This means that, depending on the frequency range or temperature range of interest,
one or other of these noise sources will predominate. Because of this behavior,
optimization of charge-coupled devices so far as noise performance is concerned
becomes a difficult task. An imager optimally performing at room temperature may
have a noisy output at elevated temperatures. And to design a device which has
a low noise level at all temperatures, several developments dedicated to decreasing
the noise level of the sensors have to be applied.

In this chapter the most important insight into noise performance of charge-coupled
devices will be described. Starting with the technology-related noise sources, the
origin of white and black point defects, column defects, transfer noise, striations,
pixel non-uniformities and dark-current shot-noise will be explained. Some specific
measures taken to lower these artifacts will also be included in the section dealing
with technology-related noise sources. Extra noise electrons are added to the CCD
output signal at the output node and in the output amplifier. This addition is on
account of the thermal noise of the MOS transistors and the 1/f noise of the devices
but mainly on account of the reset operation of the reset transistor. Optimized
design and balanced technology can lower these noise effects at the output stage.
The reset noise in particular, can be drastically reduced by dedicated signal
processing. A couple of video-processing techniques are also discussed in this
chapter, together with a few completely new designs which tackle the problem of
output-amplifier noise.

An interesting phenomenon encountered in solid-state imagers is smear. Although

this effect is not a typical noise source, it is dealt with in this chapter because it
shows up as an artefact on the monitor, especially when the image sensors are
used in situations where highlights are included in the scene. Smear depends very
much on technology, on design, on driving method and even on the device’s
architectures. All these connections are also covered in this chapter.
220 CHAPTER 8

8.1. Decreasing noise levels

One way of increasing the signal-to-noise ratio is to optimize the sensitivity of the
devices as discussed in chapter 7. At extremely low-light input, the detection limit
of any signal is determined by the remaining noise floor. This is very clearly illustrated
by Figure 8.1, which gives an overview of the various noise levels showing up in
a typical CCD imager. The noise figures are given in relation to the level of the
input signal. The amplifier noise and the noise generated in the CCD itself are
independent of the amount of incident light. But the photon shot noise is proportional
to the square root of the number of electrons generated, which depends on the
quantum efficiency of the device.
Also included in Figure 8.1 is the definition of the dynamic range of the imager,
namely the ratio of the saturation level or full-well content to the minimum signal

FIGURE 8.1. Illustration of the different noise sources of a CCD imager, in terms of number of electrons
and as a function of the incident light intensity.

level at the output stage, i.e. the noise floor of the CCD itself and its output amplifier.
Reducing the various noise sources is equally as important as increasing the light
sensitivity of the devices. Because most kinds of noise sources also have different
origins, it is not possible to tackle them all at once. Moreover, several mechanisms
are technology-related while others have to do with the design of the device, and
some can be minimized by the video-processing circuitry or technique, others not.
 ADVANCED IMAGING : NOISE AND SMEAR 221

WORTH MEMORIZING

CCD and output amplifier noise are independent of the intensity

of light impinging on the imager. The photon shot noise is
proportional to the square root of the quantity of electrons generated
by the optical input.

8.2. Technology-related noise

The noise sources which have to do with technology-related aspects are probably
the most difficult to deal with. In some cases the generation sites of all types of
noise are already present in the starting material on which the imagers are fabricated
(Jastrzebski 87). In other situations, the noise sources are introduced during the
processing of the CCDs, e.g. by dust particles. In all cases it is very difficult to
overcome these problems, but, in general, ultraclean processing is of vital importance.
Everything in the clean room, the apparatus, the gases and the liquids, has to be
as pure as possible, and the processing has to be carried out by a very disciplined
operating team. Only with these extremely exacting parameters it is possible to
fabricate high-quality image sensors with low noise levels.

In this section not all but only a few of the technology-related noise sources will
be discussed. For most of those mentioned, a possible means of minimizing the
particular noise source will also be presented. In most cases it is impossible to
totally eliminate them.

8.2.1. POINT DEFECTS

White point defects or spots visible on the display or monitor are the result of a
local (electron-) generation site which in all cases causes additional electrons in
the charge packet integrated near it. The origin of the white spots can be :
- a local crystal defect in the silicon substrate (dislocation, O-precipitate,
stacking fault) (Ogino 83);
- mechanical damage;
- a local gate dielectric problem;
- the inclusion of a metal atom, e.g. Fe, Cu, Au (Jastrzebski 90).

Extremely clean processing techniques can keep the number of defects as low
as possible. A special processing method, known as gettering can attract the
(charge-) generation sites to the back of the wafer. Their influence will then not
be "seen" at the front of the wafer. Gettering can be done by means of heavy
phosphorus doping on the back of the wafer or by means of a "damaged" back-side
already present on the wafers when they enter the clean room. Another well-known
gettering technique is internal gettering. Special temperature treatments of the
222 CHAPTER 8

wafers in the early stages of processing attract the oxygen atoms to the center
of the wafers and create a defect-free toplayer (denoted zone).

Black point defects are associated in most cases with dust on the sensor surface
itself, or even incorporated in one of the layers on top of the silicon wafer. The
incoming light information is disturbed and cannot reach the pixels in the silicon.
Cleaning the sensor surface (if still possible after packaging) may help to overcome
the problem of black pixel defects.

8.2.2. COLUMN DEFECTS

If the generation of excess electrons at a point defect is so great that the potential
wells are filled with dark current, even during the transport phase of the CCD, the
point defects will result in a column defect.
Column defects can, however, also be generated by local transport problems :
channel narrowing, gate shorts, and gate interruptions, can all give rise to a local
obstruction in the CCD transport channel and can be seen on the monitor as a
column defect. To keep artifacts of this kind as insignificant as possible, clean
chemicals during the lithographical and etching processes are of vital importance.

8.2.3. TRANSFER NOISE

Any inhomogeneity in transport efficiency can be seen on the monitor as a fixed

disturbance pattern. Although a locally changing transport efficiency can also result
in a column defect, not all do. This type of noise source can be caused by
irregularities in the gate definition or in the definition of the CCD channel itself.

8.2.4. STRIATIONS

The saturation level or the onset of antiblooming may not be equal for the pixels
across a sensor. A possible source can be inhomogeneities in the substrate doping.
These effects are known as striations (Senda 85). The homogeneity of the substrate
doping can be sufficiently increased to overcome the striation effect by means of
an epitaxial toplayer on the starting material, e.g. an n-type layer on top of the n+-type
substrate.

8.2.5. PIXEL NONUNIFORMITIES

Any nonuniformity in geometry, layer thickness, doping level or doping profile, on

gate definition, can change the response from pixel to pixel and can introduce
nonuniformities in sensitivity, saturation level, and dark-current generation. These
noise sources cannot be reduced by changing or optimizing layers, implantations,
or doping levels. Again, it is entirely a matter of strict processing discipline : cleanness
in all stages and of all materials involved in the fabrication of the CCDs.
 ADVANCED IMAGING : NOISE AND SMEAR 223

8.2.6. DARK-CURRENT SHOT NOISE

The generation of dark current is, like the generation of electrons by photons, a
stochastic process. Variation on this generation process is the source of dark-current
shot noise. The level is equal to the square root of the total number of electrons
involved in the dark-current charge packet. Dark-current shot noise can only be
reduced by decreasing the dark current itself. Again, this parameter is greatly
influenced by the processing conditions in the clean room. Discipline by everyone
and cleanness of everything involved can limit the amount of dark current.

Dark-current generation sites are interface states located at the Si-SiO2 interface
or bulk states in the silicon substrate. Generation of dark current by interface states
is greater than the generation by bulk states by at least a factor of ten. As already
pointed out in section 3.3, it is not the dark current itself, but the temperature-
dependence and the nonuniformities of the dark current that pose difficulties in
handling dark-current effects.

A few interesting techniques are introduced for shielding the electrons in the CCD
channels from these interface states. With these techniques, generation from the
most important source of dark current can be drastically reduced and the amount
of dark current remaining is mainly due to the presence of bulk states. Figure 8.2
illustrates how a shallow p+ laver shields the photodiode of a (frame-) interline-transfer

FIGURE 8.2. Shielding interface states in an interline-

transfer or frame-interlinetransfer image cell by means
of a shallow p+ layer.

device from the interface states (Teranishi 82). The latter are all filled by holes in
the inverted top layer of the silicon. This simple construction of a p+ -n+-p- photodiode
224 CHAPTER 8

has a second attractive advantage : it increases the storage capacity of the

photodiode.
(This method of shielding the interface by means of a very thin p+-type layer is
known by the name of Hole-Accumulation Device or HAD.)

The above-mentioned technique is not possible in a frame-transfer device, because

a p+ layer shields the CCD channel not only from the influence of the interface states,
but also from that of the gate voltages. An alternative based on gate pinning can
be applied to frame-transfer imagers and also to the vertical registers of a (frame-)
interline-transfer device to fill all interface states with holes and make them more
or less inactive with respect to their interaction with the CCD channels. These gate-
pinning suppressing methods are more extensively described in the section on
scientific imaging (10.1.5).

WORTH MEMORIZING

Technology-related noise sources are manifested by white and

black point defects, column defects, transfer noise, striations, pixel
nonuniformities, dark-current shot noise, and dark-current
nonuniformities. Technology-related noise sources are very hard
to tackle. Only optimized processing steps, first-class starting
material, very pure chemicals, clean gases and a very disciplined
operating team can minimize the effects of this type of noise
sources.

8.3. Output amplifier noise

The other important noise source, besides the noise sources in the CCD itself,
is the output amplifier. The small analog circuitry used to convert the electrons
into a voltage and to buffer the output voltage toward the outside world, adds some
uncertainty to the signals in the form of noise electrons. The overall noise from
the output amplifier can be split up into various elements depending on the
mechanisms by which they are generated.

To enable these items to be studied separately, Figure 8.3 schematically shows

the most commonly used output amplifier : a double or triple source-follower stage
together with a reset transistor (the operating principle of the output amplifier with
reset has been explained in section 2.4.1). In the example of Figure 8.3, all transistors
are of the depletion type. This is not necessary, neither is the on-chip load of the
last stage. In almost all practical applications, the load is placed off-chip to decrease
the power dissipation on-chip. The noise characteristics of these kinds of output
stages can be separated into thermal noise, reset noise, and 1/f noise.
 ADVANCED IMAGING : NOISE AND SMEAR 225

FIGURE 8.3. A commonly used output stage for CCD imagers : a double or triple source-follower
connected to the floating diffusion with a reset transistor.

8.3.1. THERMAL NOISE

The thermal noise of the complete system is mainly due to noise generation in
the inversion channels of the MOS transistors. An optimized design and a well-
considered choice of the transistor areas and their ratio of channel width W and
channel length L, both for the drivers and for the loads of the output stage (Heidtmann
87), can keep the noise figure of the output amplifier as low as possible. In general,
the power spectrum of the thermal noise will be inversely proportional to the W/L
ratio (Ozaki 91). To illustrate this behavior, a common measure to express the
noise performance of a CCD is defined : the Noise Electron Density (NED).
This figure of merit is determined by the square root of the product of a noise level
(spectral density) and an equivalent noise bandwidth, and is simply given by (Centen
91) :

[8.1]

where :
- en(f) is the total equivalent noise voltage present at the detection node of
the output stage (= floating diffusion); this parameter depends to
a great degree on the transistor type and its geometry;
226 CHAPTER 8

- Ct is the total (physical) capacitance present at the detection node of the

output stage. It includes the floating diffusion capacitance, the gate
capacitance of the first driver transistor, and all parasitics.
(The NED is expressed in electron²/Hz.)

Figure 8.4 shows the dependence of NED as a function of the width W of the first

FIGURE 8.4. Influence of the width W and the length L of the first driver transistor on
the noise equivalent density of a CCD output stage.

driver transistor for two values of its length L (Centen 91). Changing the dimensions
of the transistor influences both NED parameters in [8.1] : increasing W while keeping
L constant also increases the total capacitance Ct but lowers the total noise voltage
en. This last effect is dominant for values of W smaller than about 15 µm. For greater
values of the width, NED is almost constant for a short channel, e.g. L = 3.2 µm,
but increases again for greater values of L, e.g. L = 8.7 µm. In Figure 8.4 the current
through the first source-follower stage is set to 100 µA, but the bias current itself
also influences the NED. This is shown in Figure 8.5, keeping W and L respectively
to 47 µm and 3.2 µm. Increasing the bias current lowers the noise equivalent density,
via the en parameter.
Realistic values for L, W, and the bias current can be deduced from these two figures.
Bearing conversion, bandwidth and power dissipation restrictions in mind, a value
for the bias current (through the first stage of the source-follower configurated
amplifier) might be 100 µA. The gain in noise performance by increasing this bias
current is marginal and higher values only increase the power dissipation. As far
 ADVANCED IMAGING : NOISE AND SMEAR 227

FIGURE 8.5. Influence of the bias current through the first source-follower stage on
the noise equivalent density of a CCD output stage.

as noise is concerned, a low value for L is favorable, e.g. L = 3.2 µm. This value
for L makes the choice of W more or less noise-performance independent as long
as W > 15 µm. A design including too wide a transistor lowers the conversion
factor (see section 8.4), so keeping W close to the value of 15 µm seems optimal.

8.3.2. 1/f NOISE

The 1 /f noise is mainly generated in the driver of the first follower stage of the output
amplifier. Interaction of the interface states, located at the Si-SiO2 interface of the
MOS transistor, with the electrons in the inversion channel causes fluctuations in
the voltage at the output of the first follower stage. The interactions between the
interface states and the charges can be kept to a low level by using a depletion
type MOS transistor because the inversion channel in this type of device, is pushed
somewhat deeper in the silicon. In general, the power spectrum of the 1 /f noise
will be inversely proportional to the channel area of the transistor or to the product
W.L (Ozaki 91).

8.3.3. RESET NOISE

Inherent to the reset action of the floating-diffusion capacitance is an uncertainty

about the voltage on the capacitor CFD. The uncertainty or reset noise can be
quantified and is equal to kTCFD (k represents Boltzmann’s constant, T the
228 CHAPTER 8

temperature). It is very difficult to minimize this reset noise, and even impossible
to get rid of it by adapted design or by technological optimizations.

An additional component in the reset noise is the "partitioning noise" : at the moment
the reset transistor is switched off, the charges from the inversion layer underneath
the gate of the transistor have to be directed to either the source or the drain side
of the device in order to diminish the inversion channel. Which charges will move
to the drain and which to the source or floating diffusion ? This uncertainty causes
some extra voltage fluctuation from one reset action to the other. The partitioning
noise can be minimized by an appropriate design of the reset transistor (Watanabe
84). For instance, its channel can be funnel-shaped with the "funnel output" as
the floating diffusion. If in this situation, during the switching-off of the reset transistor,
the channel width is narrow enough, the narrow-channel effect will push the electrons
out of the inversion channel in the direction of the widest side of the channel : the
reset-drain side. Partitioning will be minimized and the partitioning noise on the
floating diffusion will be as small as possible.

8.3.4. ELIMINATION OF THE RESET NOISE

The only way to deal with the reset noise is to "measure" its value and compensate
(electronically) for it afterwards. This is done with a method known as Correlated-
Double Sampling (CDS) and shown in Figure 8.6 (White 74). The output signal

FIGURE 8.6. Reset-noise reduction by means of correlared-double sampling.

 ADVANCED IMAGING : NOISE AND SMEAR 229

of the CCD is sampled twice : once for its reset-hold level and once for its actual
video output (for the explanation of the waveforms, see section 2.4.1). The first
sample, stored on CSH1, is used to measure the reset noise because the reset-hold
level is equal to a preset DC voltage with the reset noise kTCFD added to it. The
second sample, stored on CSH2, naturally measures the video signal which is
superimposed on the reset noise. If one of these samples is subtracted from the
other, the video signal remains, the reset noise being cancelled out.

The circuit shown in Figure 8.7 performs as described above in the CDS situation,

FIGURE 8.7. Reset-noise reduction using a clamping circuit.

but electronically in a slightly different way : during the reset-hold period, the CCD
output signal is clamped to a fixed clamping voltage VCL, and then the video signal
is sampled on CSH by means of the sample-and-hold circuit. The net result is the
same as with correlateddouble sampling : a video-preprocessing circuit compensates
electronically for the reset noise.
The CDS circuit can be integrated on-chip (Hynecek 86), which makes processing
by the end-user fairly straightforward.

However, due to the sampling-and-holding process, noise components with

frequencies exceeding the Nyquist limit fall into the baseband. Furthermore, as
a result of high clock-rate sampling, the clamping characteristic becomes flawed.
Problems of this kind can be avoided with a delay-line processing. The main idea
of delay-line processing (DDS) is illustrated in Figure 8.8. With this method the
230 CHAPTER 8

feedthrough period for the CCD output signal, delayed by the delay line, is adjusted
to the signal period for a nondelayed signal. The difference between the two levels
is detected by the operational amplifier and the differential signal is gated. The
degree of aliasing is much less than for the CDS method because the signal is
held in the hold capacitor.

FIGURE 8.8. Reset-noise reduction using video-preprocessing based on a delay line.

A comparison of the two video-preprocessing techniques is shown in Figure 8.9

(Ohbo 88) : the noise content in the CCD output signal as a function of frequency
is compared with the noise content in the correlated double-sampled signal and
the signal obtained after delay-line processing. The increase in S/N ratio resulting
from both video-preprocessing techniques is due to the lowering of the amplifier
and reset noise. The shot noise and the fixed-pattern noise remain.

Including a CDS circuit or a delay-line processing operation in the preprocessing

electronics also removes part of the 1/f noise, especially in the low-frequency range.
For high-frequency noise signals, a CDS circuit is not quite satisfactory. A solution
can be found by replacing the MOS transistor of the first follower stage by a junction
FET. It is well known that a JFET has better 1/f-noise characteristics than a MOS
device, due to less interaction between the interface states and the charges from
the transistor channel.
 ADVANCED IMAGING : NOISE AND SMEAR 231

FIGURE 8.9. Comparison between video-preprocessing with a CDS and a delay-line

circuit.

8.3.5. NEW OUTPUT-AMPLIFIER ARCHITECTURES

A new output architecture was launched in which the driver MOS transistor of the
first source-follower stage is replaced by a JFET. In previous structures the MOS
transistor was placed close to but next to the CCD. In the new structure, the JFET
is physically located in the output diffusion itself (Mutoh 89). This is shown in Figures
8.10a and 8.10b, in which respectively the top-view and the cross-section through
the JFET are shown. The structure looks very similar to a classical output structure
with a reset transistor. But characteristic of the architecture implementing the JFET
is the fact that the drain of the p-channel JFET (D in Figure 8.10a) is combined
with the stopper implantation around the floating diffusion, that the gate of the JFET
is the floating diffusion itself, and finally that the source of the JFET (S in Figure
8.10a) is a small p+ diffusion placed in the floating diffusion. Note that only the
source of the JFET is added to the classical design. All other transistor parts were
already available in the original floating-diffusion configuration. The structure is
extremely compact, minimizing parasitic capacitances and resistances. The electrons
are transferred toward the floating diffusion by a classical CCD transport system.
At the floating diffusion they are shifted on the gate of the JFET and are able to
modulate the hole current through the first source-follower stage. The resetting
of the floating diffusion is done in the classical way : by means of a simple reset
transistor.
232 CHAPTER 8

FIGURE 8.10. Top view (a) and cross section (b) of the output stage including a JFET as first follower,
constructed as part of the floating diffusion output node.

An alternative to the JFET transistor designed into the floating diffusion can be found
in the design of a MOS transistor across the floating diffusion (Brewer 80, Matsunaga
91, Roks 92). The basic configuration is illustrated in Figure 8.1 1. As in the foregoing
JFET idea, the hole current through the MOSFET is modulated with the electrons
put by the CCD on the floating diffusion located underneath the gate of the MOSFET.
The electrons are stored in the bulk of the MOSFET and the hole current through
the transistor can be a surface current or a bulk current (as indicated on Figure
8.1 1 b), depending on the bias of the sensing gate. The MOSFET operates as the
driver of a first source-follower stage. The transport of the electrons from the channel
of the driver transistor can be performed by a simple reset operation.

Further optimizations of this type of output-node configuration are possible, namely :

- the sensing gate can be covered by a second gate, which is negatively fed-
back to the output signal. This construction leads to extremely low noise
levels of 1 electron equivalent-noise signal and consequently a very high
dynamic range of, for instance, more than 90 dB (Matsunaga 91);
- a bipolar transistor can be incorporated of which the base current is equal
to the hole current supplied by the MOSFET across the output diffusion.
This construction ensures very low noise levels in combination with extreme
values for the conversion factor, e.g. 25 µV/electron (Roks 92).
 ADVANCED IMAGING : NOISE AND SMEAR 233

FIGURE 8.11. Top view (a) and cross section (b) of the output stage including a MOSFET as first
follower, constructed as part of the floating-diffusion output node.

WORTH MEMORIZING

Output-amplifier noise can be divided into different components :

thermal noise, 1/f noise, and reset noise. Thermal noise cannot
be eliminated, but can be considerably reduced by appropriate
design and layout of the driver of the first source-follower stage.
The same holds for 1/f noise : suitable design of a buried-channel
transistor can keep the1/f noise component to an acceptable limit.
On the other hand, it is very hard to get rid of the reset noise at
the CCD level because this is a fundamental process. Fortunately,
the reset-noise level can be compensated for by the video
processingcircuits. Techniquessuchascorrelated-doublesampling
or delay-line processing can drastically lower the influence of the
reset noise.
New output-amplifier architectures are being developed in order
to increase the overall noise figure of CCDs. An example is the
incorporation of a JFETor a MOStransistor at the site of the floating-
diffusion mode to minimize the thermal noise and 1/f noise
components.
234 CHAPTER 8

8.4. Output-amplifier sensitivity

Up till now, the discussion of S/N optimization has been limited to the S/N
performance of the image sensor, including some preprocessing to reduce the
noise components. But, in addition to the imager itself, the electronic circuit following
the CCD can also determine the signal-to-noise characteristics. Apart from the
noise of the output amplifier, the conversion factor or sensitivity (expressed in
µV/electron) is a very important parameter.
A large conversion factor prevents extra S/N reduction caused by peripheral signal-
processing circuits. The conversion of charges into voltages is done by dumping
the electrons on a floating-diffusion capacitor and subsequently sensing them by
means of the source followers. There are several methods to increase the sensitivity
of the output amplifier :
- boosting the gain of the source-follower stages by decreasing the channel
conductance of the transistors and suppressing the back-gate effect of
the driver transistor;
- decreasing the input capacitance of the first source-follower stage by
optimizing the gate length L and gate width W of the first-stage driver
transistor, bearing in mind short-channel effects and thermal-noise
performance when determining and designing L and W respectively;
- minimizing the parasitic capacitance of the output node of the horizontal
output register by careful layout and optimized design. An example of
an optimized design is shown in Figure 8.12, from left to right :
+ a classical output stage with floating-diffusion capacitance CFD, a reset
transistor controlled by its reset pulse ΦR, and a single output stage
with a current source I. The parasitic capacitance is denoted by
Cp;
+ an output amplifier with a reset transistor provided with a screening
gate. The screening gate shields the reset transistor from the floating
diffusion and drastically reduces the clock feedthrough from ΦR on
CFD.
The DC bias VDC has to be chosen such that part of the reset
transistor, underneath the screening gate, is always turned on. As
a consequence, part of the channel of the reset transistor is added
to CFD and, instead of increasing the sensitivity of the output stage,
the conversion factor is decreased because the capacitance on which
the charges were dumped has become higher;
+ to avoid the aforementioned effect, the screening gate is positively
fed-back using the voltage available at the source node of the first
source follower, and together with this the parasitic capacitance is
highly reduced too (Theuwissen 88, Akimoto 91).
The gain of the first source-follower stage ASF is close to unity, making
the added capacitance of the transistor channel negligible because
 ADVANCED IMAGING : NOISE AND SMEAR 235

the voltage in the channel itself is almost equal to the voltage at the
screening gate.
The same applies to the parasitic capacitance : if the interconnect
from the source of the first source follower to the screening gate
is physically located underneath the interconnect from the floating
diffusion to the gate of the first source follower, the remaining parasitic
C’p will be given by :

[8.2]

With this simple construction, reasonable high conversion factors

can be attained : 16.2 µV/electron with a total input capacitance
of 6.7 fF (Akimoto 91).

FIGURE 8.12. Three different output-stage constructions : the classical configuration (a), with a
screening gate (b), and with a positively fed-back screening gate (c).

WORTH MEMORIZING

The sensitivity of the output amplifier or conversion factor is

determined by the value of the floating-diffusion capacitance and
the parasitic capacitance in parallel with the former. An increase
of the conversion factor can be effected by optimizing the total
capacitance at the input of the first stage of the output amplifier.
236 CHAPTER 8

8.5. Smear

Smear is a spurious signal seen more or less as a bright vertical column on the
monitor. The artifact runs from top to bottom on the monitor (if no charge reset
is applied) and precisely through the highlight. Although the smear signal is generated
in different ways in different type of imagers, it takes the same form in all type of
devices. Because of its various sources, however, it cannot be counteracted in
the same way for all of them. This section describes the origin of smear and how
to eliminate or minimize its effect.

8.5.1. SMEAR IN FRAME-TRANSFER CCDS

Considering the basic operating principle of the frame-transfer CCD, smear is

inevitable. It is generated at the moment when the charge packets are transferred
from the image section to the storage section. The imager is not shielded from
the incoming light during this transfer, charge-carrier generation continues and
spurious signals are added to the charge packets in transport.

Figure 8.13 shows the situation where a white rectangle on a black background
is captured by the frame-transfer device. The height of the rectangle is 10 % of

FIGURE 8.13. Definition of smear measurement with a white rectangle

(10 % picture height) on a black background.

the total picture height. If Tint is the integration period, and Ttr the transport time,
the smear level Sm (in %) in the black portions of the scene is :

Sm = 10 * (Ttr / Tint) . [8.3]

 ADVANCED IMAGING : NOISE AND SMEAR 237

To minimize the smear signal, transport from the image section to the storage section
should be done as fast as possible, or in the complete absence of any further light
input. Fast transport can be ensured by high-frequency vertical clocks, but in most
cases the large RC values of the polycrystalline-silicon gates impose an upper limit
on the vertical transport frequency. New techniques making use of double-
metallization technologies, reduce the R values of the gates considerably by means
of a strapping method. This issue will be discussed in the section on high-speed
clocks for the vertical registers (9.4).

A second way to reduce smear is to provide the camera, which uses the image
sensor, with a mechanical or electro-optical light shutter which shields the sensor
completely from light during the frame shift. With this method operation of the frame-
transfer CCD can be made 100 % smear-free.

8.5.2. SMEAR IN (FRAME-) INTERLINE-TRANSFER CCDS

Although the origin of smear in the case of an interline-transfer CCD is completely

different from its generation in a frame-transfer device, it is visible in the same form
for both and, surprisingly their amplitudes are also about the same.

In the interline-transfer-imager situation, smear is caused by either :

- stray electrons generated underneath the photodiode area and diffused
into the vertical CCD shift registers, or;
- stray photons which arrive in the vertical CCD shift registers via, for instance,
light pipes (multiple reflections at the Si-SiO2 interface and at the lower
surface of the light shield) and generate electron-hole pairs locally.
These two mechanisms are illustrated in Figure 8.14, from which it can be concluded
that smear is generated in the vertical shift registers (directly or indirectly) by photons
originally "intended" to be converted into neighboring pixels.

Highlights can cause spurious smear electrons in the vertical CCD shift-register
cells so that each charge packet passing the highlighted photodiode receives some
extra electrons. Note that, during the readout of the video information, transport
in the vertical shift registers takes 20 msec or 16.7 msec, and each charge packet
belonging to such a CCD register can dwell quite a long time (= 1 active line time)
near a single highlighted photodiode.

There are three ways by which the smear in interline-transfer devices can be reduced :
- reducing the diffusion of stray electrons by the introduction of an optimized
n-p-n structure in the photodiode (Kuroda 86) and by adding an extra
diffusion barrier underneath the vertical CCD shift register (Sakakibara
91, Negishi 91). The latter is shown in Figure 8.15. Comparison of this
cross section with the original one in Figure 8.14 will show that a p+-
implanted buried-well structure has been added underneath the n-type
238 CHAPTER 8

FIGURE 8.14. Diagram showing the origin of smear in a (frame-)

interline-transfer device. The artifact is caused by stray electrons
(a), scattered photons (b), and light piping (c).

FIGURE 8.15. New techniques to reduce smear in IL and FIT

imagers : an extra p+ well under the CCD channel, and a thinner
dielectric underneath the light shield.

buried channel. This additional layer increases the charge-handling

capability but more important it increases the electric field which tends
to prevent the "indiffusion" of stray electrons;
- reducing the light piping by optimizing the light shield (Teranishi 87) and
locating it, for instance, as close as possible to the silicon surface, making
use of new tungsten technologies (Losee 89). This technique is also
 ADVANCED IMAGING : NOISE AND SMEAR 239

schematically shown in Figure 8.1 5. Comparison of this illustration with

Figure 8.14 illustrates that the dielectric layer between the poly-Si gates
and the light shield has been reduced. The result of this technique is
a strong reduction in light piping and consequently an increase in smear
performance;
- reducing the time during which smear electrons can be generated and added
to the charge packets by shortening the time the charge packets remain
in the vertical shift registers. This technique has also led to the introduction
of the frame-interline-transfer CCD (Horii 81, Horii 84). With this FIT
configuration the vertical transport of the charge packets is much faster
than in the classical interline-transfer device.

Although the smear level in interline-transfer devices can be reduced, its complete
elimination is never possible. The reduction of the smear by means of the frame-
interline-transfer CCD can be as high as 110 dB. This is an acceptable value for
consumer applications, but in professional and broadcast TV cameras, 110 dB
reduction is still not enough. Again, only a mechanical shutter in combination with
the FIT can make this device fully smear-free.

8.5.3. SMEAR COMPENSATION TECHNIQUES

Note that, for both frame-transfer and (frame-) interline-transfer devices, the total
amount of smear is generated in two parts :
- the first part before the start of the integration, in fact during the last clocking
cycles of the frame shift of the previous field;
- the second part after the end of the integration, during the frame shift of
the existing field, when the smear is added to the video signal.
The smear signal can thus be split into Smb, smear before the integration, and Sma,
smear after the integration. The Smb component is generated during the frame
shift of the previous field. When the video information of this field has been shifted
to the storage section, new empty image lines roll from the top of the image section
into the image section immediately after the video lines containing the information
of the previous picture. These empty image lines will capture smear signals during
the period when they are shifted downward to the integration sites which they will
occupy in the next field integration.
This typical smear-generation mechanism is responsible for a smear signal on the
monitor both below and above the highlight.

It is quite simple to get rid of the Smb signal by using the charge-reset technique.
With this method all integrated charges up to a certain moment in the integration
cycle are drained, including all smear signals generated before the actual video.
On the other hand charge-resetting does not affect the absolute value of the Sma
content, but may increase its relative value compared to the video amplitude. For
240 CHAPTER 8

extremely short integration times, the amount of smear can be of the same order
as the amount of video.

Much effort is put into eliminating the Sma signal to get rid of the complete smear
component after Smb is dumped by means of charge resetting. The only electronic
way reported up to now is to compensate the video output of the CCD for the Sma
signal. This can be done by "measuring" the Sma content of the video signal and
compensating it electronically. This measuring operation can be performed in two
extremely different ways :
- a single line in the two-dimensional CCD is shifted through the complete
image section, taking a sample of the overall and average value of the
smear across the complete device. During the normal active integration
time this "smear line" is shielded from incoming light to make sure it
contains only smear signals. When this CCD line containing the Sma
sample is moved out, it is stored in a line memory and each video line
of the CCD is compensated for it. The advantage of this system is its
compactness; its disadvantage is the "low temporal resolution" of the
sample : the smear correction is very sensitive to moving objects, and
if these are present in the picture, the corrected signal can look still worse
than the signal without smear compensation;
-the CCD takes a smear sample in the form of a CCD line after each video
line (Esser 88). This system is quite complex with regard to clocking
and it has to store twice as many CCD lines as the system without smear
compensation, but it has the great advantage of being practically insensitive
to moving objects.

The optimum compensating technique will be situated somewhere between the

two mentioned : one complete sample of the smear across a complete CCD line
for a few video lines. In all cases, however, the electronic smear-compensating
methods are severely limited when extreme overexposure occurs. For instance :
what happens if there are highlights in a scene with an intensity so high that even
the smear signal on its own has an amplitude comparable to a full well ?

8.5.4. SMEAR IN MOS-XY AND CID IMAGERS

In an MOS-XY imager, smear is generated in about the same way as it happens

in an interline-transfer device : stray electrons and stray photons also influence
the amount of electrons which are available on the capacitance of the sensing lines.
Figure 8.16 illustrates this phenomeron. To decrease the smear level in MOS-XY
devices, the same remedies are valid as have just been described for the interline-
transfer case : vertical n-p-n structures and optimized light shielding.

A breakthrough for MOS-XY devices was the introduction of the Transversal Signal
Line (TSL) architecture (Noda 86), which minimizes the amount of smear drastically.
 ADVANCED IMAGING : NOISE AND SMEAR 241

FIGURE 8.16. Illustrating the origin of smear in an MOS-XY : stray

electrons (a) and scattered photons (b),(c) cause the artifact.

The working principle of the MOS-TSL device is described with the aid of Figures
8.17a and 8.17b, in which a block of two-by-two pixels is shown for the classical
MOS-XY imager and the TSL device, respectively. In the conventional MOS imager,
the signal charge is transferred during the readout first from the photodiodes to
the vertical signal lines by the vertical scanner. All charge packets from one video
line are transferred at a time. The smear charge is then accumulated during a
complete line time of 64 µsec. In the TSL imager every pixel has a horizontal switch
and signal readout takes place directly in the horizontal direction. In this configuration
the horizontal signal line accumulates smear only during one pixel time, e.g. 200
nsec. The smear is therefore reduced drastically compared to the smear level of
conventional imagers.

In addition to this interesting smear feature, the TSL has some extra advantages
over the classical MOS-XY imager : the horizontal switch of the TSL switches a
capacitance which is much smaller than the capacitance switched by the horizontal
scanner of the conventional imager, and consequently the kTC noise is much lower.
Also, the fixed-pattern noise of the new device is different from the original : in the
conventional imager fixed-pattern noise was caused by nonuniform crosstalk and
leakage through the horizontal switches. The shape of the fixed-pattern noise was
a set of vertical lines because every pixel in a same column was read out through
the same switch (Noda 86).

CID imagers are fully smear-free. This ideal characteristic is due to the fact that
the output signal is a displacement current generated in a gate located on top of
the silicon and fully isolated from the silicon substrate. Stray electrons and stray
photons causing the trouble in the other type of imagers remain inside the substrate
242 CHAPTER 8

FIGURE 8.17. A block of two-by-two pixels for the classical

MOS-XY imager (a) and the TSL device (b), respectively.

and have no influence on the displacement current in the read-out lines/gates.

8.5.5. STATE OF THE ART IN SMEAR SUPPRESSION

The smear signal is spurious and degrades the video signal in all applications.
The fact that almost all solid-state imagers suffer from smear is a drawback compared
to the old imaging tubes. Tubes are also smear-free, although their performance
was vitiated by other highlight problems such as image lag and burn-in effects.
On the other hand, CIDs are also fully smear-free.
 ADVANCED IMAGING : NOISE AND SMEAR 243

FIGURE 8.18. Comparison of the various solid-state image sensor types so far as smear
is concerned (dotted line : video, solid lines : smear).

Much effort is being put into the development of different techniques to suppress
smear in charge-coupled devices when used as imagers. Smear levels nowadays
are quite low, but there is not a single solution at device level to fully eliminate smear
in FT, IL, FIT or MOS-XY image sensors. The "state of the art" so far as smear
is concerned is summarized in Figure 8.18. It shows the output voltage of a
hypothetical image sensor with a sensitivity of 10,000 electrons per lux of incoming
light energy and a saturation level of 100,000 electrons. In the case of a frame-
transfer imager with a frame shift at 1 MHz, the smear level can be calculated by
means with formula [8.3] to be - 60 dB. About the same value is valid for the MOS-XY
device. The smear performances of these two sensor types can be increased by
a faster frame shift and a new device concept, respectively. The architecture of
the MOS-XY imager can be redesigned to give a TSL device with a smear level
as low as -120 dB. In the case of the frame-transfer device, 20 dB can be gained
by increasing the vertical clocking of the device by afactor of 10. With the relatively
high frame shift the frame-transfer CCD is comparable in smear performance to
the standard interline-transfer imager. Lowering of the smear signal in an interline-
transfer imager can be achieved using the alternative device architecture, i.e. the
frame-interline-transfer CCD, in which the vertical clocking frequency is drastically
increased. The FIT performs as well as the TSL imager.
In the case of electronic smear suppression with a frame-transfer imager, the end
result is expected to be fully smear free. But what is shown in Figure 8.18 is not
244 CHAPTER 8

the resulting smear level, but the extra noise introduced due to the compensation
technique. This noise component is proportional to (2.Qn)0.5 : the original smear
signal as well as the smear copy have their photon shot noise proportional to Qn0.5.
Due to the uncorrelated nature between both, the previous relationship is valid (Esser
88).

WORTH MEMORIZING

Smear is a spurious signal running from top to bottom through

a highlight in the picture. The origin and also the countermeasures
vary according to the type of device :
- in frame-transfer CCDs, smear is generated by impinging
photons during the frame shift. A faster frame shift or
shielding the device from light by means of a shutter during
the frame shift lowers and may even obviate the smear
signal entirely;
- in interline-transfer CCDs, smear is generated by scattered
photons entering the vertical CCD shift registers or by stray
electrons collected in the vertical shift registers instead
of collected in the photodiodes. Countermeasures include
optimized photodiode design, optimized doping profile
of the vertical registers, and the introduction of theframe-
interline-transfer device;
- in MOS-XY sensors, smear is generated in the same way as
in interline-transfer CCDs. The same countermeasures
are also used, or an adapted architecture may be
introduced : the transversal signal line;
- of all the solid-state imagers, only CID sensors are completely
smear-free.

8.6. Conclusions

In this chapter attention has been paid to noise sources present in the CCD itself
or in the output amplifier and to smear. To complete the overall discussion of noise,
the conversion factor or sensitivity of the output amplifier has been also described.

The noise characteristic of a solid-state imager is one of the latter’s most important
parameters because it defines the lower limit of light input at which the device can
be operated. When working with a camera in very poor light conditions, noise
should be kept as low as possible. It is not surprising that a good deal of R&D
effort is put into lowering the noise level of the CCD imagers. The overall noise
figure of a charge-coupled device is composed of several components. Some
noise-generation mechanisms are typically CCD-bound while others are associated
 ADVANCED IMAGING : NOISE AND SMEAR 245

with the output amplifier. CCD noise and output-amplifier noise are independent
of the light intensity impinging on the imager, but another noise component, the
photon shot noise, is proportional to the square root of the amount of electrons
generated by the optical input.

The CCD noise sources themselves are very much technology-related. They show
up as, for instance, white and black point defects, column defects, transfer noise,
striations, pixel nonuniformities, dark-current shot noise and dark-current
nonuniformities. Technology-related noise sources are very hard to tackle. Their
origin may be situated in the starting material used to process the devices. But
even silicon substrates of the highest quality only yield defect-free imagers if the
wafers are processed in an ultraclean room and if processing is done by a very
disciplined team. Other possible methods of tackling defects in the wafer are gettering
techniques : locating defects at appropriate places in the wafer (at the back or
in the center) so as to attract all the impurities.

Output-amplifier noise can also be divided into different components : thermal noise,
1 /f noise, and reset noise. Thermal noise, which has a flat frequency spectrum,
cannot be eliminated but it can be considerably reduced by a suitable design and
layout of the driver of the first source-follower stage. The same is true of 1 /f noise,
with its typical dependence on the inverse of the frequency. With proper design
and the incorporation of a buried-channel transistor, the 1 /f-noise component can
be kept to an acceptable limit.

On the other hand, however, it is very hard to get rid of the reset noise at CCD
level because it is a fundamental process. Charging and discharging a capacitor
through a resistor always add some uncertainty to the voltage level across the
capacitor. Fortunately, the reset noise level can be compensated for by the video-
preprocessing circuits. Techniques such as correlated-double sampling or delay-line
processing drastically lower the effect of reset noise.

As technology-related noise sources diminish, the noise level of the output amplifier
becomes more and more predominant. To deal with this effect, new output-amplifier
architectures are being developed to increase the overall noise figure of CCDs.
In some cases incorporation of a JFET or a MOS transistor at the site of the floating
diffusion further decreases the thermal noise and 1 /f-noise components.

The sensitivity of the output amplifier or conversion factor is determined by the

value of the floating diffusion capacitance and the parasitic capacitance in parallel
with the former. Increasing the conversion factor can be done by optimizing the
total capacitance at the input of the first stage of the output amplifier. Although
the conversion factor or the sensitivity of the output amplifier has no direct relation
to the noise performance of the latter, it can influence the noise performance of
the video-processing circuitry placed behind the imager. If a high conversion factor
246 CHAPTER 8

can give rise to a low gain in the processing electronics, the overall S/N ratio of
solid-state imager plus processing board can be further optimized.

Smear is a spurious signal running from top to bottom through a highlight in the
image on the display. Depending on the device type smear may be from totally
different origins. In frame-transfer CCDs, smear is generated by photons impinging
during the frame shift. A faster frame shift or shielding the device from light during
the frame shift by means of a shutter lowers and may even eliminate the smear
signal completely. Although a frame-transfer device can never be made smear-free,
it is the only charge-coupled device which can be operated in a completely smear-free
camera by the incorporation of a mechanical or electro-optical shutter.
In interline-transfer CCDs, smear is generated by scattered photons entering the
vertical CCD shift registers or by stray electrons collected in the vertical shift registers
and not in the photodiodes. Countermeasures are optimized photodiode design,
optimized doping profile of the vertical registers, and the introduction of the frame-
interline-transfer device. As regards smear, MOS-XY sensors look very similar to
interline-transfer CCDs because smear is generated in the same way in both cases.
Methods to minimize the smear are also identical. Even an adapted architecture has
been developed : the transversal signal line.
Charge-injection devices are fully smear-free. They are operated via measurement
of an induced gate current. The gates of the device are located on top of the silicon
and are fully separated from the silicon bulk where the photons generate the electron-
hole pairs.