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MCA Assignment-2

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6 views2 pages

MCA Assignment-2

Uploaded by

Frency Butani
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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(Established under Gujarat Private Universities Act 2009)

Shroff S.R. Rotary Institute of Chemical Technology

Branch: DE Electrical Engg. [B2022] Course: MCA [EE1316]


Sem: 5th

Assignment-2
MCQ:
1) Perform operation on specific data is known as ____
a. Machine cycle b. Instructions c. T- State d. Opcode
2) Operation performed in one clock period is known as______
a. Machine cycle b. Instruction Cycle c. T- State d. Clock Period
3) How many T-state are require for execution of MOV A, B?
a. 10 b. 7 c. 4 d. 3
4) Execution time = _______.
a. No of T- state * Time for T-state b. No of frequency * No. of T- state
c. Time for T-state * No of frequency d. Not Defined
5) Full form of Opcode is_______,
a. Open Code b. Operation Code c. Operation Counter or bi-directional d. Open Circuit
6) Which of the following register is not used in opcode fetch operations?
a. Program counter b. Memory address register c. Memory data register d. Flag register
7) Which of the following is true about MOV A, B instruction?
a. It means move the content of register A to register B c. It uses immediate addressing mode
b. It doesn’t affect the flag register d. It is a 2-byte instruction
8) Which of the following is false about LDA instruction?
a. It is a 3-byte instruction b. It uses indirect addressing mode
c. It has 13 T-states d. It doesn’t affect any flags

Address: Block No: 402, Ankleshwar-Valia Road, AT & PO: Vataria, Ta: Valia, DIST: Bharuch-393135, Gujarat (India)
Email: [email protected], Website: upluniversity.ac.in, Tel: +91-9712177799, Mob: 9727745875/76
(Established under Gujarat Private Universities Act 2009)

Shroff S.R. Rotary Institute of Chemical Technology


9) Which is of the following is true about STA instruction?
a. It uses immediate addressing mode b. It required three machine cycles
c. It is a 3-byte instruction d. Accumulator is loaded with the content of memory
10) Suppose registers ‘A’ and ‘B’ contain 50H and 40H respectively. After instruction MOV A,
B, what will be the contents of registers A and B?
a. 40H, 40H b. 50H, 40H c. 50H, 50H d. 60H, 40H
11) The instruction that supports addition when carry exists is,
a. ADD b. ADC c. ADD&ADC d. None of these
12) The instruction that enables subtraction with borrow is,
a. SUB b. SBB c. SUB&SBB d. None of these
13) The flag that acts as Borrow flag in the instruction, SBB is,
a. Parity b. Zero c. Carry d. Auxiliary Carry
14) The CPU removes the ___ signal to complete the memory write operation:
a. Read b. Write c. Both d. None of these

Subjective:
1) Define opcode and operand.
2) What is opcode fetch cycle?
3) Define machine cycle & T-state.
4) What is the need for timing diagram?
5) Draw the Timing diagram for MOV A, B.
6) Give the types of machine cycles and explain any two.
7) Draw the Timing diagram for OUT F0H.
8) Compare Van Neumann and Harvard Architecture.
9) Compare CISC and RISC Processors.
10) Write 8085 Assembly language program to add two 8-bit numbers and store the result at
locations 8050H.
Solution:
MVI A, 32H ; Load 32H into the accumulator (A)
MVI B, 54H ; Load 54H into register B
ADD B ; add the contents of register B to the accumulator
STA 3050H ; Store the result from the accumulator at memory location 3050H
HLT

Address: Block No: 402, Ankleshwar-Valia Road, AT & PO: Vataria, Ta: Valia, DIST: Bharuch-393135, Gujarat (India)
Email: [email protected], Website: upluniversity.ac.in, Tel: +91-9712177799, Mob: 9727745875/76

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