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PI8100a Protocol

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0% found this document useful (0 votes)
5 views

PI8100a Protocol

Uploaded by

Dhiki Handika
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Appendix I.

RS485 Communication Protocol


Appendix I

I-1. Use introduce


This chapter introduces something about the install and handle of RS485 communication between
inverter and PLC, PC, factory computer.
RS485 standard interface
 Can communicate with all computer
 Using multi-drop link system, can link more to 127 inverters
 Completely isolated, and noise shield
 The user would use all types of RS232-485 inverter, if only the inverter had “automatic RTS
control” function inside.
I-2. Specification
Communication function
Items Specification
Communication baud
38400/19200/9600/4800/2400/1200 bps is selectable.
rate
Communication
Modbus protocal, RTU fomat
Protocol
Asynchronism communication methods, semi-duplex, the previous high byte,
Interface methods
low byte in the post, and low-effective-bit pre-emptive.
1 start bit, 8 data bits, 1 stop bit, No parity bit.
1 start bit, 8 data bits, 1 stop bit, even parity bit.
1 start bit, 8 data bits, 1 stop bit, odd parity bit.
Data fumula
1 start bit, 8 data bits, 2 stop bit, No parity bit.
1 start bit, 8 data bits, 2 stop bit, even parity bit.
1 start bit, 8 data bits, 2 stop bit, odd parity bit.
Slave addresses can be set up 1~ 127
Slave address
0 for broadcast address, host address 128 for the proportion of linkage
Communication
Terminals SG+, SG-, shield SH, Default 19200bps.
connect A
Communication
RJ45, 8-core shielded cable, fixed 19200bps, N parity bit
connect B

I-3. Communication connection


I-3-1. Definition for Communication port A:
 Link RS485 communication cables to inverter control terminals (SG+), (SG-).
 When using RS232-485 transform, connect Inverter “SG+” to RS485 “T+”, Inverter “SG-” to
RS485 “T-”.
 After Confirming connection again, turn on inverter power.
 If connection is right, set communication parameters as following:

120
Appendix I.RS485 Communication Protocol

 A26 baud rate 0: 1200, 1: 2400, 2: 4800, 3: 9600, 4: 19200, 5: 38400


 A27 current inverter communication address 1~127 (If there are more than 1 inverters, don‟t
use the same number);

Appendix I
 When using RS485 running control methods, set F05=0/1/2(Keypad + RS485/CAN)

Mach Resisitors
TX 120ohm 1/4W
RX RS485 T+
GND ConventerT-

SG- SG+ SG- SG+ SG- SG+


……
1# 2# N#
PC
Inventer Inventer Inventer

I-3-2. Definition for Communication port B:


Communication
1 2 3 4 5 6 7 8
Port B pins
Communication
GND +5V 485+ 485- 485+ 485- +5V GND
port B signal
White White white White
EIA/TIA T568A green blue orange brown
green orange Blue Brown
White White White White
EIA/TIA T568B Orange Blue green brown
Orange Green Blue Brown

I-3-3. Data safety and reliability

 The number of inverter can be connected is no more than 127.


 Though the length of communication cable can add up to 1300m, considering the stability,
the length limit within 800m.
 All the control signal cable use the screen cable, and is linked to the signal terminal “SH” of
RS485.
 Data packet using CRC (vertical lengthy test) frame detection to ensure data reliability.
 completely isolated RS485 communication module to ensure reliable communications,
support hot-swappable, after modular access, you can enter the work.
 the system is tested in 6 kinds of baud rate: 0:1200, 1:2400, 2:4800, 3:9600, 4:19200,
5:38400
 However, if under deteriorating environmental conditions, lowering the baud rate can
improve the communication quality.
 Interval time of sending from frame to frame is more than 50ms.

121
Appendix I.RS485 Communication Protocol

I-4. Communication Protocol


Communication architecture is inverter as a slave, the computer as a host.
Appendix I

I-4-1. The basic format description


1: start of frame
Interval> 2ms,

I-4-2. Slave Address


From the machine's local address, through the A27 parameter settings, can only have that
uniquely identifies a network's local address.
Setting Range 1 ~ 127.
00H = 0 ID address is broadcast mailing address, 128 ~ 255 reserved.

I-4-3. Function Code


Host to send commands from the machine to the command response.

Function Code Categories


0x02=read slave fault record
Frame start Slave Function Registers CRC frame end
address adress code address checksum address
Interval> 2ms Interval> 2ms
1 bytes 1 bytes 2 bytes 2 bytes
idle bit idle bit
Slave response
Frame start Slave Function Registers CRC frame end
address adress code address checksum address
Interval> 2ms Interval> 2ms
1 bytes 1 bytes 2 bytes 2 bytes
idle bit idle bit
0x03=read single register
Host command
Frame start Slave Function Registers CRC
frame end adress
address adress code address checksum
Interval> 2ms Interval> 2ms
1 bytes 1 bytes 2 bytes 2 bytes
idle bit idle bit
Slave response
Frame start Slave Function Registers CRC
frame end adress
address adress code address checksum
Interval> 2ms Interval> 2ms
1 bytes 1 bytes 2 bytes 2 bytes
idle bit idle bit
0x13=Read multiple registers
Host command
Frame start Slave Function Register Register Register CRC frame end

address adress code N. add.1 add. n. checksum adress
Interval> Interval>
1 bytes 1 bytes 1 bytes 2 bytes … 2 bytes 2 bytes
2ms idle bit 2ms idle bit

122
Appendix I.RS485 Communication Protocol

Slave response
Frame start Slave Function Register Register Register CRC frame end

address adress code N. add.1 add. n. checksum adress

Appendix I
Interval> Interval>
1 bytes 1 bytes 1 bytes 2 bytes … 2 bytes 2 bytes
2ms idle bit 2ms idle bit
0x06 = write to slave a single register (power-down does not save)
0x26 = write to slave a single register (power-down save)
Host Command
Frame start Slave Function Register Register CRC frame end
address adress code address data checksum adress
Interval> 2ms Interval> 2ms
1 bytes 1 bytes 2 bytes 2 bytes 2 bytes
idle bit idle bit
Slave response
Frame start Slave Function Register Register CRC frame end
address adress code address data checksum adress
Interval> 2ms Interval> 2ms
1 bytes 1 bytes 1 bytes 2 bytes 2 bytes…
idle bit idle bit
0x16 = Write multiple registers to the slave (power-down does not save)
0x36 = Write multiple registers to the slave (power-down save)
Host Command
Frame Slave CRC frame
Functio Registe Registe Registe Registe Registe
start adres … checksu end
n code r N. r add.1 r data 1 r add. n r data n
address s m adress
Interval Interval
1
> 2ms 1 bytes 1 bytes 2 bytes 2 bytes … 2 bytes 2 bytes 2 bytes > 2ms
bytes
idle bit idle bit
Response command
Frame start Slave Function Registers CRC
frame end adress
address adress code N. checksum
Interval> 2ms idle Interval> 2ms idle
1 bytes 1 bytes 1 bytes 2 bytes
bit bit
If slave response and get back to below function code, it means communications abnormal.
0xA0 = Invalid operation, setting under this state is invalid
0xA1 = function code is invalid
0xA2 = Fault record is empty
0xA3 = register address is invalid
0xA4 = slave is busy, EEPROM delay.
0xA5 = administrator restricted
0xA6 = set value is beyond limit.
0xA7 = CRC checksum error
0xA8 = frame format error

I-4-4. Register Address:

The register address includes two bytes, data setting is constituted by a two-byte.

123
Appendix I.RS485 Communication Protocol

Function code Register Address high byte Register Address low byte
Parameter group Parameter serial number
F 0x00 0~63
Appendix I

A 0x01 0~63
o 0x02 0~71
H 0x03 0~55
U 0x04 0~15
P 0x05 0~15
0x03/0x13 E 0x06 0~23
(read slave
C 0x07 0~47
function code
parameter) b 0x08 0~23
y 0x09 0~23
L 0x0A 0~31
S 0x0B 0~15
0x00 Running statusNOTE 2
0x01 Reserved status 1
R 0x10
0x02 Reserved status 2
0x03 Reserved status 3
Parameter group High byte data Low byte data
F 0x00 0~63
A 0x01 0~63
0x06/0x16(set o 0x02 0~71
slave function H 0x03 0~55
code parameter
U 0x04 0~15
and write
RAM) P 0x05 0~15
E 0x06 0~23
C 0x07 0~47
0x26/0x36(set b 0x08 0~23
slave function
y 0x09 0~23
code parameter
and write L 0x0A 0~31
EEPROM) 0x00 Running commandNOTE 3
0x01 Reserved status 1
R 0x10
0x02 Reserved status 2
0x03 Reserved status 3
Fault record data Fault inquiry content data
Faulty typeNOTE 4 0x00
Set frequency 0x01
Fault history record 1 0x00 Actual frequency 0x02
0x02(read the Fault history record 2 0x01
Actual current 0x03
fault record) Fault history record 3 0x02
Dc voltage 0x04
Fault history record 4 0x03
Fault history record 5 0x04 Running status NOTE 2 0x05
Running time 0x06
IGBT temperature 0x07

124
Appendix I.RS485 Communication Protocol

NOTE 1:
0x06/0x16 writing operation
Function 0x03/0x13 reading operation
0x26/0x36 reading operation

Appendix I
y00 reset the factory
Return 0 Only can write into 5
setting
y01 upload parameter
Return 0 Invalid operation
onto keyboad
y02 latest fault record Valid operation Invalid operation
Empty record 00H
y03~y07
New record 01H Invalid operation
fault history record
Confirmed record 02H
y08 reset fault record Return 0 Valid operation
y09 rated output current Valid operation Invalid operation
y10 rated output voltage Valid operation Invalid operation
80 0 3
Family Function Input voltage
y11 products series Invalid operation
serial code level
The number should be decimalization.
y12 soft ware version Valid operation Invalid operation
y13 product date –year Valid operation Invalid operation
y14 product month–date Valid operation Invalid operation
y15 user decode Valid operation Invalid operation
y16 user input password Valid operation Valid operation
y17 parameter group
Valid operation Valid operation
protection

NOTE 2:
BIT 15 BIT 14 BIT 13 BIT 12 BIT
0: confirmed
0: N fault 0: N fault
0: N fault fault
meaning 1: urgent stopping 1: decelerating
1: alarming fault 1: unconfirmed
fault fault
fault
bit 11 BIT 10 BIT、 9 BIT 8 BIT
0: N JOG.
meanning reserved reserved reserved
1: JOG running
bit 7 BIT 6 BIT 5 BIT 、 4 BIT
0: lower frequency 0: upper frequency 00: stopping 01:
not arriving not arriving accelerating
meaning
1: arrive lower 1: arrive upperer 10: decelerating
frequency frequency 11: running in a even speed
`bit 3 BIT 2 BIT 1 BIT 0 BIT
0: running reverse 0: V/F control
meaning reserve reserve
1: running forward 1: SV control

125
Appendix I.RS485 Communication Protocol

NOTE 3:
bit 15 BIT 14 BIT 13 BIT 12 BIT
Appendix I

meaning reserve reserve reserve reserve


Bit 11 BIT 10 BIT 9 BIT 8 BIT
meaning reserve reserve reserve reserve
bit 7 BIT 6 BIT 5 BIT 4 BIT
0: N free-stop 0: JOG stopping
meaning reserve reserve
1:free-stop command 1: JOG running
bit 3 BIT 2 BIT 1 BIT 0 BIT
0:reverse command
0:stop command
meaning reserve 1:forward reserve
1:run command
command

NOTE 4: fault style code


Serial nmber
LED display Fault message
nnnnumber
0 E.OCP IGBT power driver protect and produce hardware interrupt.
1 E.OCC OC signal from current self-inspected circuit impact.
2 E.OCF OC signal from drive circuit.
3 E.OU Over voltage
4 E.LU Lower voltage
5 E.OL Over load
6 E.UL Lower load
7 E.PHI Input phase lose
8 E.EEP EEPROM error
9 E.ntC Over heat
10 E.dAt Time limit fault
11 E.Set External fault
12 E.PId PID regulation fault
13 E.OHt Motor over heat fault
14 E.OL2 Motor over load falult
15 E.PG PG error
16 E.PHo Output phase lose
17 E.COA Rs485 communication connect A fault
18 E.COb Rs485 communication connect B fault
19 E.CAL Parameter Identification Failure

126
Appendix I.RS485 Communication Protocol

I-4-5. CRC checkup sum

Appendix I
Data meaning: data frame CRC checkup sum, using 2 bytes.
Checkup sum =all the CRC checkup sum in one data frame.
Valid setup and communications under normal circumstances, the host command and slave
responses are as follows:
Host Command
Host Registers CRC
Slave Setting
Frame start address command address checkup
address data
code sum
Interval> 2ms idle 0x0001
0x08 0x06 0x1388 0xD5C5
bit
Slave response
Host CRC
Slave Registers Setting
Frame start address response checkup
address address data
code sum
Interval> 2ms idle bit 0x08 0x06 0x0001 0x1388 0xD5C5

I-5. Example of communication protocol:


unsigned int cal_crc16 (unsigned char *data, unsigned int length)
{
unsigned int i, crc_result=0xffff;
while(length--)
{
crc_result^=*data++;
for(i=0;i<8;i++)
{
if(crc_result&0x01)
crc_result=(crc_result>>1)^0xa001;
else
crc_result=crc_result>>1;
}
}
crc_result=((crc_result&0xff)<<8)|(crc_result>>8);
return(crc_result);

127

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